JPS6386908A - Gain adjusting circuit - Google Patents

Abstract

PURPOSE:To reduce a noise level, and to improve an S/N by placing and providing a digital amplifier and a digital volume, and an analog volume on the front- stage of a D/A converting circuit, and the rear-stage, respectively, and executing the gain adjustment by dividing it into the digital stage before the D/A conversion, and the analog stage after the conversion. CONSTITUTION:In case of setting the overall gain to a range of rated gains G-0dB, an analog volume 4 is set to zero dB being roughly through, and a digital volume 3b is controlled within a range of '0'--GdB. As a result, the gain of a variable gain circuit 3 of a digital stage is controlled to a range of G-OdB, and the digital means executes an operation being near a full bit, therefore, a noise level itself is small relatively. In case of setting the overall gain to a range of '0'--infinity dB, the digital value 3b is set to zero dB being roughly through, and the analog volume 4 is controlled within a range of '0'--infinity dB, and an attenuation is executed by the analog volume. In this case, to a digital processing circuit of a D/A converter 2, etc., a signal is inputted in a state that it is about zero dB and not attenuated, therefore, the S/N is scarcely deteriorated.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention relates to a gain adjustment circuit having a circuit that adjusts the gain of a digital input using a digital amplifier and a digital volume, converts it into an analog signal, and outputs the analog signal. This comprehensively prevents S/N deterioration due to noise (error noise, quantization noise, etc.) in digital processing units such as A conversion.

(Background of the Invention) When providing a gain adjustment function in a circuit that inputs a digital signal, performs digital signal processing such as digital filtering and D/A conversion, and outputs the signal in analog form (for example, when a digital input terminal (when configuring an audio control amplifier, etc.), for example, the first
As shown in FIG. 7, a configuration can be considered in which a digital input is input to the variable gain circuit 1 (digital amplifier 1a and digital volume 1b), and its output is converted into an ablog signal by the O/A converter 2 and output.

Here, the digital amplifier 1a gives the rated gain G of the entire circuit, and in the case of the audio control amplifier 7, the gain is generally set to 20 (IB). This is used to adjust the gain, and generally the attenuation amount is varied in the range of 0 to -oodB, and the overall gain of the entire circuit is adjusted in the range of G to -oodB.The adjustment of the attenuation amount in the digital volume is as follows. For example, coarse adjustments can be made by bit shifting, and fine adjustments can be made by multiplication of coefficients.

[Problem that the invention seeks to solve]

If the variable gain circuit 1 is configured only in the digital processing section before D/A conversion as in the circuit configuration shown in FIG. 17,
Even if it is possible to perform variable gain processing on digital input signals, if the master volume is narrowed down (total gain is reduced), the D/A converter 2 and other variable gain circuits 1
The digital processing circuit (for example, digital tone control, etc.) placed between the D/A converter 2 and the
A signal will be input at the bell.

In general, the noise (error noise, matrix noise, etc.) generated in digital processing circuits such as D/A converters is fixed at a value determined by the number of processing bits, and low-level signals are The proportion will increase.

For this reason, the circuit configuration shown in FIG. 17 has the disadvantage that when the master volume is narrowed down, the proportion of noise in the digital processing section such as the D/A converter 2 increases, and the S/N ratio deteriorates.

This invention has been made in view of the above points, and in a gain adjustment circuit that has a circuit that adjusts the gain using a digital amplifier and a digital volume, converts it to an analog signal, and outputs it, even when the overall gain is narrowed down to a small value. This prevents deterioration of the S/N ratio even when the ratio is increased.

(Means for Solving the Problems) The gain adjustment circuit of the present invention includes a D/A conversion circuit that converts a digital signal into an analog signal, a digital amplifier and a digital volume disposed before the D/A conversion circuit. and an analog volume arranged at a stage subsequent to this D/A conversion circuit, and when increasing the overall gain, the analog volume is set to almost through,
When the digital volume is used to vary the gain to reduce the total gain, the digital volume is set so that both the digital amplifier and the digital volume are almost through, and the gain is varied using the analog volume. It is characterized by the following.

(Function) In this invention, gain adjustment is performed separately in the digital stage before D/A conversion and the analog stage after D/A conversion.In other words, in the digital stage, the total gain is almost through (0,
4B), and in the analog stage, gain adjustment is performed in a range where the total gain is approximately smaller than the through.

According to this, when the total gain is set to a range larger than approximately through, the gain is increased in the digital stage, the analog stage is approximately through, and when the total gain is set to a range smaller than approximately through, the gain is increased in the digital stage. is almost passed through, and attenuation is performed in the analog stage.

Therefore, by increasing the total gain, the digital stage can achieve almost full-bit operation, the noise level itself becomes relatively small, and since no noise amplification occurs in the analog stage, the S/N becomes better. . In addition, even if the total gain is reduced, the digital stage has approximately 0clB.
Since the signal level does not drop below this level, there is no deterioration of S/N in digital processing circuits such as D/A converters. Further, since the noise in the digital processing circuit is narrowed down in the analog stage, the noise level itself becomes smaller.

〔Example〕

Hereinafter, these nine inventions will be explained in detail.

FIG. 1 shows the basic configuration of this invention. The digital input is D/A converted by the D/A converter circuit 2 via the digital volume 3a and the digital amplifier 3b which connect the variable gain circuit 3 of the digital stage, and the output analog signal is sent to the variable gain circuit of the analog stage. The signal is outputted via the annular bore 4 that constitutes the .

The digital amplifier 3a is used to obtain the rated gain G of this circuit, and in the case of an audio control amplifier, G is normally set to 20 dB. Digital volume 3b
is used to adjust the gain of the digital stage and is itself 0.
The amount of attenuation is varied within the range of -GdB. Therefore, the variable gain of the digital stage (the gain of the 9 circuit 3 is varied in the range of G to 0).

Further, the attenuation stage of the analog volume 4 is variable in the range of 0 to -00 dB.

The gain control circuit 5 is designed to reduce the amount of attenuation between the digital volume 3b and the analog volume 4 by 1iI11[l, and the following is determined according to the total gain of the entire circuit (set by the master volume, etc.) to be set. Control as follows.

(2) When setting the overall gain in the five ranges from G (rated gain) to OdB, the analog volume 4 is set almost through (0, IB), and the digital volume 3b is controlled within the range from O to -GdB. As a result, the gain of the variable gain circuit 3 of the digital stage is controlled within the range of G to 0, and the overall gain is increased here. Naturally, since the digital stage operates close to full bits, the noise level itself is relatively small. Also, at this time, analog volume 4 is almost through, so the D/A
Noise generated in digital processing circuits such as converter 2 is not amplified.

■ When setting the overall gain in the range of O to -〇〇dB, digital volume 3b is set almost through (Odd), analog volume 4 is controlled in the range of O to -〇〇dB, and attenuation is performed with the analog volume. .

At this time, since the digital volume 3b is almost through, the digital processing circuit such as the D/A converter 2 has almost an Od.
Since the signal is input without being attenuated by B, even if error noise, octad noise, etc. occur in this digital processing circuit, the S/N ratio will not deteriorate much. Moreover, since these noises are narrowed down by the analog volume 4 at the subsequent stage, the noise level itself becomes small in the end.

Next, an embodiment in which the present invention is applied to an audio control amplifier will be described. In this embodiment, as shown in FIG. 10, which will be described later, a digital input is D/A converted via a digital volume 49 and a digital equalizer 42 by a D/A conversion circuit 46, and the analog output signal is converted via a VCA 32. It has a digital straight path 18 for output, and the present invention is applied to this path. That is, the digital volume 49 has the function of a digital amplifier. ) varies the gain in the range of the rated gain G (-+20 dB) to 0 (IB) of this control amplifier, and the gain of the VCA 32 is varied in the range of O to -cX) dB. Then, when the total gain is in the range of G to OdB, the VCA 32 is fixed to OcB, and the digital volume 4 is fixed.
9 controls the gain. Also, the total gain is 0~-〇〇d
In the range B, the digital volume 49 is fixed at O'' and the attenuation m is controlled by the VCA 32. Note that in this digital straight path 18, the digital equalizer 4
2 and the D/A conversion circuit 46 are sources of noise.

This example will be explained in detail below.

First, an overview of this control amplifier is not shown in Figure 2. In this control amplifier, as shown in the plan view of the listening room in Fig. 9, there is a path (
analog straight path 12, digital loop 14,
3 routes of digital straight route 18 and 4 routes of front, rear, left and right
Channel sound field effect speakers c, d, e, f (c
.

d is a sound field effect path 22 for supplying a sound field effect signal to main speakers a and b (can be substituted for main speakers a and b), and a main speaker a.
, b has a video signal path 24 for supplying a video signal to a television monitor Q placed at the center of the television monitors Q. Each route will be explained.

■ Analog straight path 12 This path amplifies the signal of the analog source 10 and outputs it as is (2 channels left and right). This is used when tone control or the like is not performed on the signal of the analog source 10.

The signal of the analog source 10 is inputted from the input terminal 11, and outputted from the VCA 26 and the output selection circuit 28 (either from the analog straight path 12 or from the digital path 15 (digital loop 14 or digital straight path 18).
mode selection circuit (selects whether to output from stereo output or monaural output) 301 is guided to the main signal output terminal 36 via VCA 32 and buffer amplifier 34.

The main signal output terminal 36 (two left and right channels) is connected to the main signal left and right input terminals of the power amplifier.

Note that the analog source 10 is used as a recording source signal.
It is led to an analog recording output terminal 38.

(2) Digital loop 14 This is a path that once converts the signal from the analog source 10 into a digital signal, performs digital signal processing such as tone control, and then returns it to an analog signal and outputs it. This is used when performing tone control or the like on the signal of the analog source 10.

The signal from the analog source 10 is converted into a digital signal via the VCA 26 by an A/D conversion circuit 40 with a built-in dither circuit, and then input to a digital signal generator 42 . The digital equalizer 42 is a digital equalizer processor, and is composed of a three-band parametric equalizer having band-to-bass characteristics, and the center frequency, Q, and level can be arbitrarily set for each divided band.

Furthermore, the cutoff frequencies of the low cut and high cut and the gradients (attenuation rates) of their slopes can be set arbitrarily.

The output tone-controlled by the digital equalizer 42 is then passed through the 4x overnumbering digital filter 44.
, the D/A conversion circuit 46, the output selection circuit 28, the mode selection circuit 30, the VCA 32, and the buffer amplifier 34, and are output to the main signal output terminal 36.

(2) Digital straight path 18 This path inputs the signal from the digital source 16 from the input terminal 17, processes the digital signal, converts it into an analog signal, and outputs the signal.

The digital source 16 signal is input to a digital I10 receiver 48. Digital I10 receiver 48
is a circuit that interfaces the input signal of the digital source 16 with the subsequent circuit. This digital I
The 10 receiver 48 has an internal PLL circuit, and the sampling frequency of the digital source 16 (for example, 44.1k in the case of a CD (compact disc)) lz, DAT (
48k for digital audio recorder)
14z), detects the presence or absence of the digital source 16, detects the presence or absence of errors (parity check), outputs subcodes, etc.

Note that if both analog and digital signals are input from the same input source, for example, CD, DAT, V
DP(7)1
automatically selects the high quality digital source 16 and outputs it to the digital equalizer 42, and the digital loop 14 of the analog source 10 is cut off. This results in
The digital processing circuit (D
/A converter, etc.), the high-precision digital processing circuit within the control amplifier can be used without using it, and a high-quality analog final output can be obtained.

The digital signal received by the digital I10 receiver 48 is processed by a digital volume 49, a digital equalizer, a 42.4 times oversampling digital filter 44, a D/A conversion circuit 46, an output selection circuit 28, a mode selection circuit 30, and a vC△32. and buffer amplifier 34
is led to the main signal output terminal 36 via.

Note that the signal of the digital source 16 is guided to the digital recording output terminal 50 as a recording source signal.

To summarize the above, three types of main signal paths 12.14
．． 18 can be used as follows.

(2) Sound field effect path 22 This path inputs a digitized source to the sound field processor 20 to create a sound field sound effect, converts it into an analog signal, and outputs it.

As shown in Figure 3, this sound field effect is achieved by emitting an impulse signal on an actual stage such as a hall, church, or studio, and placing a group of early reflected waves at the listener's seat that arrive at the listening point from all directions. A virtual sound source distribution is captured by 4-point (that is, 4 channels) microphones, and digitally processed from that data to store it for each direction of arrival.This is recalled during playback, the source signal is added to this, and the Miro 1
This system is designed to reproduce a sound field similar to that of the first fixed time (for details, refer to the specification of Japanese Patent Application No. 60-99244).

The feature of this method is that it does not emit the direction of reflected sound only by the arrangement direction of the speakers like a general processor, but it uses four speakers (c, d, e, f in Figure 9) to emit a large number of reflected sounds. This method simulates the direction, delay amount, and level as a three-dimensional space, so four speakers c, d, and e are used.

The pattern is to place f in the four corners of the room.

Therefore, rather than creating a sound field pattern during recording using components contained in the source, the sound field processor 20 selects a sound field pattern that is close to the intended purpose from among a number of completed sound field patterns stored in advance. For example, 8 as the initial reflected wave group.
If you memorize information about 8 channels (22 channels per speaker), a sound field similar to that of each hall will be faithfully reproduced in a listening room.

The sound field processor 20 has 1 preset as early reflection sound information and stored in the memory for practical sound field effect.
The output of the digital equalizer 42 is convoluted with the output of the digital equalizer 42 based on the six factory programs and one program selected by the user from among the 16 user programs created by the user by changing the parameters of the factory program. 4x oversampling digital filter 52, 54, D/A converter circuit 5 with digital volume for each front side signal and rear side signal (time division processing for left and right channels)
6.58, it is output to the sound field sound effect output terminal 60.62. The sound field effect output terminals 60 and 62 are connected to the sound field effect input terminal (4 channels) of the power amplifier.

This sound field effect path 22 is kept alive even when the digital equalizer 42 is turned off (a sound field effect signal is generated by inputting a signal with a flat characteristic).

(2) Video signal path 24 This is a path through which the signal of the video source 60 is input from the input terminal 61 and is directly led to the video recording output 62 and monitor output 64.

Here, the sound I! in the control amplifier shown in FIG. l
FIG. 10 shows the adjustment gain distribution. Each route will be explained.

(1) Analog straight path 12, digital loop 14, VCA26+VCA32 becomes the total gain between input and output.

VCA 26 has a maximum gain of +20 dB as the rated gain G of these paths 12.14, and +20 to Od
It is attenuated in the range B.

The VCA 32 has a maximum gain of 0 and is attenuated in the range of 0 to -00 dB.

As shown in FIG. 11, the VCA 26 and 32 operate in the range from +20 R (loud sound m) to 0 clB (no gain between input and output), and the VCA 32 becomes through (no gain). Also, when the total gain is in the range of OdB to 100dB, the VCA26 becomes through,
VCA32 works.

Therefore, in the digital loop 14, the 12th
As shown in the figure, when the sound range is set large (total gain +20 to 0 cIB), there is no gain after the A/D conversion circuit 40 or the D/A conversion circuit 46, so the residual noise (A/ The eugenic noise of D and the error noise of D/A) do not increase.

Also, when the volume is set low (total gain O~-oo
δ) is O for the digital processing circuit (A/D conversion circuit 40, digital equalizer 42, D/AI conversion circuit 46).
Since the signal is input in dB, the S/N ratio will not deteriorate even if residual noise occurs in this digital processing circuit. Also,
Since attenuation is performed at the subsequent stage of the digital processing circuit, the residual noise level itself is attenuated and output.

(2) Digital straight path 18 digital volume 49+VCA 32 becomes the total gain between input and output.

The digital volume 49 has a maximum gain of +206 as the rated gain G of this path 18, and is attenuated in the range of +20 to 0.

As mentioned above, VCA32 has a maximum gain OclB of 0.
It is attenuated in the range of ~--〇〇dB.

The digital volume 49 and VcA 32 have a total gain of +20 dB (maximum sound m) to 0 c as shown in FIG.
In the range E (no gain between input and output), the digital volume 49 operates and the VCA 32 becomes through (no gain). In addition, when the total gain is in the range from 0 to -oOcB, the digital volume 49 is through, and the VCA 32
works.

Therefore, in the digital straight path 18, as shown in FIG.
Total gain +2O-OdB) is digital equalizer 4
2 and the D/A conversion circuit 46, their residual noise ("D/A error noise") does not increase.

Also, when the volume is set low (total gain 0 to -oo
cE>, since a zero signal is input to the digital equalizer 42 and the D/A conversion circuit 46, these circuits 42
．． Even if residual noise occurs in 46, the S/N ratio will not deteriorate. Furthermore, since attenuation is performed at the subsequent stage of these circuits 42 and 46, the residual noise level itself is attenuated and output.

(3) Sound field effect path 22 In the case of analog source 10, VCA26 + D/A5
6.58, and in the case of digital source 16, digital volume 49+D/A5
Each digital volume within 6.58 is the total gain between input and output.

VCA 26 or digital volume 49 is connected to this path 2.
As the rated gain G of 2, the maximum gain + 20 d, respectively.
It has a gain of B and is attenuated in the range of +20 to 0.

The digital volume in the D/A conversion circuit 56, 58 has a maximum gain of OdB and is attenuated in the range of 0 to -000.

VCA26 or digital volume 49 and D/A56
．． The digital volume in 58 has a total gain of +20 dB (maximum volume) to 0 clB, as shown in Figure 11.
(no gain between input and output), the VCA 26 or the digital volume 49 moves, and the D/A conversion circuit 56.
The digital volume in 58 is through (no gain). Further, when the total gain is in the range of OdB to 100 cE, the VCA 26 or the digital volume 49 is passed through, and the digital volume in the D/A conversion circuit 56, 58 works.

The total gain of each path includes the main volume, left/right balance volume, audio muting, input level adjustment (which affects both the main and sound field effect signals),
Main signal muting (effects only main signal),
Sound field effect signal muting, sound field effect front and rear balance,
Sound self adjustment operation means such as sound field effect signal level (acts only on sound field effect signals above) (the contents of each will be described later).

) is determined by a microcomputer by comprehensively determining the amount of adjustment. Then, the microcomputer controls each sound m adjustment control means (VCA26) so that the total gain is obtained.
．． 32, digital volume 49, D/A conversion circuit 56
．． 58) to determine the gain distribution and control each gain.

Next, details of the control amplifier shown in FIG. 2 explained above will be explained.

FIG. 4 shows the front panel of the control amplifier shown in FIG. 2. Each part will be explained.

(1) Power switch 70 This is the power switch for the control amplifier. When turned on, an LED (light emitting diode) indicator 72 lights up. When the power switch 70 is turned on, each part of this control amplifier returns to the setting state before the power was turned off.

(2) Operation lock on/off key 73 This key is used to enable or disable parameter setting operations for the digital equalizer and sound field processor using the front panel keys. When turned on, the operation is locked and parameter setting operations are disabled (however, parameter setting operations using the remote control are accepted).

This can prevent setting values from being changed by a child or the like who mischievously manipulates the keys on the panel while the user is using the remote control. Also, when turned off, the lock is released and parameters can be set using the front panel (operations using the remote control are also possible).

(3) Input selector 74 This selector selects the input source connected to this control amplifier, and includes selector keys 74-1 to 74-11 configured with tactile switches. By pressing each selector key 74-1 to 74-11, the next input source is selected respectively.

74-1: Compact disc player (CD) 74
-2: Digital audio tape recorder 1 (DA
TI) 74-3: Digital audio tape recorder 2
(T2 to 〇) 74-4 Ni record player (PHONOAHP)
74-5: TUNER 74-6:
Analog audio tape recorder 1 (TAPE 1) 74-7: Analog audio tape recorder 2 (
TAPE 2) 74-8: Video Disc 7 Ray-11 (VDP 1) 7
4-9: Video disc player 2 (VDP 2)
74-10: Videotape L”: 1-11 (VTR1
)74-11: Hitote 7L/: I-ta 2 (V
TR2) Each input selector key 74-1 to 74-
11 is provided with LED indicators 76-1 to 74-11 adjacent to each other, and the one corresponding to the selected input source lights up in green. Further, here, if the signal of the selected input source is digital, the LED indicator 78 lights up, indicating that the digital input is selected.

(4) Record out key 80 inputs the signal from each recording device connected to this control amplifier <DATl, DAT2. TAPEL, T.
This key is used to output a recording source signal to the APE2°VCR1, VCR2). When this key 80 is turned on, L
The ED indicator 82 blinks for 5 seconds. The following operation modes are set by the operation during this 5 seconds.

(a) If the input selector 74 is operated while the LED IN 1 indicator 82 is blinking, the signal of the input source corresponding to the pressed key is supplied to each of the above recording devices (however, the signal of the input source corresponding to the pressed key is (not supplied to itself). Therefore, if a recording operation is performed on the recording device side, the signal of this input source will be recorded. At this time, the input source selected by the input selector 74 among the LED indicators 76-1 to 76-11 lights up in red.
1 is composed of two-color LEDs, green and red. ) indicates that the signal from that input source is being output as the recording source signal.

In addition, the input source used for playback such as normal speakers,
The input source used as the recording signal can be selected independently, and while enjoying music from one input source, the signal from another input source can be recorded on the recording device.

(b) Without operating the input selector key 74,
When the record out key 80 is pressed again, the output of the recording source signal is stopped and no longer supplied to any recording device. The red LED indicators 76-1 to 76-11 also turn off.

(C) If neither the input selector 74 nor the record out key 80 is operated within 5 seconds while the record out LED indicator 82 is flashing, the input source that was last selected as the recording source signal will be It is supplied to each recording device again, and the LED indicator 76
The corresponding one among -1 to 76-11 lights up in red. This simplifies the recording source signal selection operation by making it possible to select a signal from the same input source as the previous time without operating the input selector 74 each time.

(5) Mode key 84 This is used to select whether to output the main signal in stereo or monaural. When monaural is selected, the LED indicator 86 lights up.

(6) Input level setting key 88 Since the source signal level differs for each source, by adjusting the mutual sound ω ratio in advance on the control amplifier side, even if the input source is switched, the sound from that one and the master volume will be different. This eliminates the need to perform 8 adjustments. The input level setting key 88 is composed of a seesaw type switch.

When the left side of the input level setting key 88 is pressed with the input source selected by the input selector 74, the volume increases, and when the right side is pressed, the volume decreases. Sound m is 0.2dB
In the step, the initial value is 0 and it changes in the range of 0 to -6. At this time, the 16-line, 2-line LCD (liquid crystal display) 90 displays the fact that the input level setting operation is being performed, the name of the input source that is being set, and the level setting value, as shown in Figure 5. , the set value is stored in memory in real time. This setting value is retained even if the power switch 70 is turned off. When the input level setting key 88 is released, the input level setting mode is canceled 5 seconds later.

When an input source is selected with the input selector 74, the input level set for that input source is read out, and each volume adjustment control means VCA 26.
32, digital volume 49, D/A conversion circuit 56.
A digital volume within 58 is controlled to set an offset for main volume 94 to correct variations in source signal level for each input source.

As a result, even if the input source is switched using the input selector 74, the volume of each input source can be made the same without adjusting the main volume 94.

(7) Muting key 92 This is an audio muting key that attenuates the tone by -20.

When muting is on, the LED indicator 93 lights up in red. When muting is turned on, each sound 1 adjustment control means is controlled to perform audio muting.

Even when the selection of the input selector 74 is changed, 0
．． This audio muting works automatically for 2 seconds to fade out the input source before switching and fade in to the input source after switching, thereby preventing noise from being output when switching.

(8) Main volume 94 A variable resistor that divides a DC constant voltage is connected to the main volume 94, and the DC voltage value output from this variable resistor changes depending on the amount of rotation. After A/D converting this voltage value and converting the amount of rotation to a value using a microcomputer, the setting amount of other volume adjustment control means (input level by balance adjustment volume 96, muting key 92, input level setting key 88) The total gain is calculated by calculating the set amount), and from this total gain, each volume adjustment control means (VCA26.3
2. Digital volume 49, D/A conversion circuit 56.5
Find the gain distribution of the digital volume (within 8), and then
VC (VCA control voltage) and O→step signal (digital volume 1t11 plane signal) are converted to gain control for each to adjust the volume.

A motor is connected to the main volume 94, and the volume can also be adjusted by remote control operation.

(9) Balance adjustment volume 96 This is a volume for adjusting the left and right balance of the main signal and sound field effect signal. The amount of adjustment is processed by a microcomputer after A/D conversion, and the left-right balance is adjusted by adjusting the respective sound ω adjustment control means.

(10) Digital equalizer parameter setting section This is a section for setting parameters of the digital equalizer 42 (FIG. 2). Here, as shown in FIG. 6, the band is divided into three bands: low, middle, and high, and center frequencies f and fH are set for each band.

You can set the full level and Q. Further, the cutoff frequency fc and slope of low cut and high cut can be set.

The center frequency f, f, f, , of each band is L,
H Can be set in the following ranges in 1/60Ct steps.

f: 20~5001-1x [ fH: 100 to 5 f　　　　　：1～20 ■ However, it is set under the condition that f<f<fH.

The H level ranges from -6 to +6 d in 0.1 dB steps for each band.
It is set within the range of B.

Q is 0.7 for each band. 1.0. 1.4. 2.
It is set to either 0°3.0.

The low-cut and high-cut frequencies fc are each 2
It is set in the range of 0 to 200-15 to 18, and the slope is set to either 12 or 18 degrees 24 dB 10 ct.

FIG. 7 shows the digital equalizer parameter setting section 100.
This is an enlarged view. This parameter setting section 1
00 has an operation section 101 at the bottom and a display section 102 at the top.

The display unit 102 displays the set values of each of the parameters described above, and is composed of a backlit LCD. This display 102 shows each center frequency f, fH among the parameters of the three divided bands.

Shi = f H is a graphic display binding level on a scale, and Q is a numerical display. Since it is necessary to perform a huge amount of calculations to completely graphically display the comprehensive frequency characteristics, this is simply displayed, and the above configuration is adopted in consideration of the following points (1) to (2).

■ Since the center frequency is divided into three bands,
A graphical display on a scale is preferable in order to know the mutual positional relationship.

■ Levels have long been familiar even when expressed numerically, and are easy to recognize and understand.

■ Q is generally not understood, and if it can be recognized, it is sufficient for the purpose of reproducing characteristics.

With such a configuration of the display unit 102, it is possible to easily display frequency control characteristics that are easy to use and understand.

In the display section 102, the upper frequency scale 104 indicates the center frequency f in each band.

In other words, the positions of the set frequencies f , f , and f are displayed at three locations L HH .

Among the numerical displays, the left part 105 shows the 〇-cut frequency in the upper row, and the 〇-cut frequency in the lower row (12, 18゜24J10c).
t) are displayed respectively.

In the center section 106, the level is displayed in the upper row, and the Q is displayed in the lower row for the low range, middle range, and high range from the left. Right part 10
8 has a high cut frequency in the upper row and a slope (1
2, 18, or 24 dB10ct) are displayed respectively.

The operation unit 101 includes the following various keys configured as tact switches for setting parameters.

■ Equalizer on/off key 110 This is a key for turning on/off the function of the digital equalizer 42. When this key 110 is turned off, the characteristics of the digital equalizer 42 become flat. Furthermore, when the analog source 10 is input, the analog straight path 12 is utilized as the main signal path (FIG. 2).

Note that even if the switch is turned off, the parameter value before the switch is turned off is retained in the memory. Further, when this key 110 is turned off, the sound field effect on/off key 135 (FIG. 4) is activated, which indicates that the sound field processor 20 is turned off.

), the display on the display unit 102 disappears and the backlight also disappears. The state at this time is shown in FIG. Further, when the sound field processor 20 is turned on, only the frequency scale 104 is displayed (none of the scales are displayed on the upper scale, indicating that the characteristics are flat).

When the equalizer on/off key 110 is turned on, other equalizer related keys 112, 114, etc. are also turned on. ), each parameter returns to the state before it was turned off.

■ Frequency key 112 and Q/slope key 114 are keys to select the setting mode, respectively.
Or press when setting the slope. If neither is pressed, the mode will be set to level setting mode.

■ Up/down key 116 This key is used to raise/lower each set value.Press the right side to raise it, and press the left side to lower it.

(2) Low-cut key 118 This key is used to set the 0-cut characteristic. After pressing this key 118, pressing the frequency key 112 and operating the up/down key 116 sets the low-cut frequency.

Further, by pressing the low cut key 118, pressing the Q/slope key 114, and operating the up/down key 116, the slope of the low cut is set.

The low cut key 118 is of a toggle type. That is, it turns on/off every time it is pressed. When it is off, the low-cut slope becomes flat and the display on the display section 105 also disappears. Further, the operation of the up/down key 116 is no longer accepted. When turned on from off, the previous setting value is displayed.

■ Low key 120, mid key 122, high key 12
4 Keys used to set the characteristics of the three divided bands, corresponding to the low range, mid range, and high range, respectively. By pressing the low key 120 and operating the up/down key 116, the low frequency level is set. After pressing the low key 120, press the frequency key 112, and press the up/down key 116.
By operating , the center frequency f of the low range is set. Also, if you press the low key 120, press the Q/slope key 114, and operate the up/down key 116, you can adjust the low frequency Q.
is set.

For the midrange and high range, each parameter can be set by pressing the middle keys 122 and 124, respectively, and performing the same operation.

■ High-cut key 126: This key sets the high-cut characteristics.Low-cut key 1
The high cut frequency and slope are set by the same operation as in step 18. Further, when turned off, the high-cut slope becomes flat, the up/down key 116 is no longer accepted, and the display on the display section 108 disappears. (The setting value before turning off is retained in memory.)

(11) Sound field effect operation section 130 This section is used to call up sound field effect programs, change parameters, etc., and is provided with two display sections 132.90 and various operation keys.

The display section 132 displays the sound field processor 20 (
It displays the 16 types of sound field effect program numbers (1 to 16) for each of the factory programs and user programs stored in FIG. 2) and whether the program is a factory program or a user program.
It is composed of LEDs.

The display section 90 displays the called program name, parameter setting values, etc., and is composed of an LCD.

Various keys (all tact switches) of the sound field effect operation section 130 will be explained.

■ Main mute key 132 This is a toggle type key that turns on/off the output of the main signal. For muted poems, the LED indicator] 34 lights up.

■ Effect mute key 136 This is a toggle type key that turns on/off the output of the sound field effect signal. When muted, the ED indicator 138 lights up.

■ Sound field effect on/off key 135 This key turns on/off the sound field sound effect creation process. If you turn it on, a sound field sound effect will be created, and if you turn it off, a sound field sound effect will not be created (the state before turning it off will be retained).
. If you turn it on from the off state (other sound field effect related keys 14
It can also be turned on by 0,144.146, etc. ), returns to the state before turning off.

When it is off, if the digital equalizer 42 is also off (operated with the equalizer on/off key 110), the display FiS 90 will not display anything, and if the digital equalizer 42 is on, the rDsP will be displayed on the display section 90.
0FFJ (rDsPJ means sound field processor 20) is displayed.

■ Parameter selection key 140 This key is used to select the type of parameter when changing the parameters of the sound field effect. Each time the key is pressed, the type of parameter is selected in order. For example, the following sound field effect parameters are provided.

■ Room size A parameter that corresponds to the dimensions of a room; the larger the value, the larger the space. Extending the time axis of early reflections,
Shrink it.

@Liveness The value of the initial damping characteristic of the 18th note. The larger the value, the longer the decay time becomes, making it live.

θ Initial delay Changes the time difference between the start of the direct sound and the reflected sound. This is an important parameter that determines the positional relationship between the direct sound and the listening point in the sound field. If you reduce this value, the sound will be felt closer to the wall of the reproduced sound field (for example, inside a church), and if you increase it, the distance to the wall will be felt.

The optimal value varies depending on the source, early reflection data, and positional relationship between the main speaker and the sound field effect speaker, but by making subtle adjustments, the connection from the on-stage sound image to the surrounding sound field can be controlled.

■Bypass filter Cuts low frequencies by 6 dB/oct. Set the frequency in 32 steps from through to 1kHz.

■Low pass filter Cuts high frequencies with 6J10ct. 1 from through
Set the frequency in 36 steps up to kHz.

■ Effect level setting mode key 142 This is a key for setting the sound field sound effect level. Used to adjust the balance with the main signal.

■ Effect front/back balance setting mode key Sound field This key is used to set the front/back balance of the sound effect.

■ Select the mode with the up/down key 146, parameter selection key 1401, effect level setting mode key 142, and effect front/back balance key 144, and set the parameters, set the level of the sound field sound effect, and set the front/back balance of the sound field sound effect. This is what we do. If you press the left side, the set value will decrease, and if you press the right side, the set value will increase.

For example, operating the parameter selection key 140 enters the parameter selection mode, and by using this key 140 to select parameters in sequence and operating the up 7/down key 146, the value of each parameter is set. Also, effect level setting mode key 142
By operating , the effect level setting mode is entered, and by operating the up/down key 146, the sound field sound effect level is set. Further, by pressing the effect front/back balance setting mode key 144, the effect front/back balance setting mode is entered, and by operating the up/down key 146, the front/back volume balance of the sound field sound effect is set.

During these settings, the display unit 90 displays the setting mode name and setting value. Front/rear balance is displayed as a bar graph, and other settings are displayed as numerical values.

■Title edit key 148 This key is used to set the name of the user program.

When this key 148 is turned on, a cursor appears on the display section 9°, and each time this key 148 is pressed, the cursor moves. Then, the up/down key 146 changes the character on the cursor and gives a name to the program created by the user. If a predetermined period of time elapses after this operation is stopped, or if another key is operated, the set program name is stored and this mode is canceled.

■ Program key 150 161! ! This key selects the factory program and one of 16 user programs.

It has 16 keys, each of which is assigned one type of factory program and one type of user program. The selected program number is displayed on the display section 132.

■ Preset key 152 A key for calling up a factory program. When pressed, the program key 150 becomes a factory program selection key. The name of the called program is displayed in display section 9.
will be displayed.

O User program key 154 This key is used to set a program number when storing a user program or to call up a stored user program. When pressed, the program key 150 becomes a user program selection key. That is, when storing a user program, press the program key 15.
The user program is stored in the number pressed with 0, and when calling the user program, the user program stored in the number pressed with program key 150 is called. The name of the stored or called program is displayed on the display section 90.

Note that when the user program key 154 is pressed while the factory program is selected, the user program that was previously selected last is read out.

Furthermore, when the preset key 152 is pressed while a user program is selected, the factory program that was last selected is read out.

O User program memory key 156 This is created by calling up a user program created by the user (7) and changing its parameters. ) is the key to remember. When this is turned on, the rPROG, No., and J displays on the display section 132 will flash, and then by pressing any of the program keys 150, the program number will be displayed including the user program sound field effect level, front/rear balance, and program name. (The previous user program for that number is deleted.) The factory program is a program related only to sound field effects, but the user program is a program related to sound field effects and the digital equalizer 42 at that time. The settings are stored as a set. That is, even if the factory program is called, the settings of the digital equalizer 42 do not change, but when the user program is called, the settings of the digital equalizer 42 when the user program is stored are also called at the same time.

Next, detailed examples of the respective parts indicated as "8A shown", "8B shown", and "80th shown" in FIG. 2 are shown in the corresponding drawings.

(1) Figure 8A This is a part that includes an input terminal, an output terminal, and a selection circuit for input source and recording source output.

The input terminals are 5 terminals 17 for digital signals (time division input for left and right channels), 11 terminals each for analog signals 11a (for right channel) and 11b (for right channel), and 4 terminals 61 for video signals. It is equipped with Also, recording
The source output terminals are two for digital signals 50 (time division output for left and right channels), six each for analog signals 38a (for left channel) and 38b (for right channel), and two for video signals 62. It is equipped with

Each input source is connected to these input terminals and audio recording source output terminal as shown in the table below.

The analog input, digital input, and video input each have the following input lines and audio recording lines.

(1) Analog Input ■ Input Line The left channel analog inputs (11 types) input from the analog input terminal 11a are input to the input selection transistor 162 via the buffer amplifier 160, respectively. The input selection transistor 162 is a CP which will be described later.
Commands from U200 (Figure 8C) are sent to command signal line 1.
64 to the base via a decoder 166 and a driver 168, and input to the input selector 74 on the front panel.
The selected analog input is turned on and the selected analog input is connected to the analog signal line 1701. : asked and input to the VCA 26 in FIG. 8B, which will be described later.

Note that the input line for the analog signal of the right channel has a similar configuration and is not shown.

(1) Recording Source Output Line The left channel analog inputs (11 types) inputted from the analog input terminal 11a are inputted to the recording source selection transistor 172 via the buffer amplifier 160, respectively. The recording source selection transistor 172 is
A command from the CPU 200 is input to the base via the command signal line 164 through the decoder 174 and the driver 176, and the record out key 80 on the front panel is pressed to turn on the one selected by the input selector 74.
The selected analog input is the signal $! I am led to 178.

The analog input led to the signal line 178 is led to the analog recording source output terminal 38a (six) via six transistors 180 connected in parallel. transistor 18
0 prohibits output to the input source itself selected as the recording source, and the recording source output selection command is inverted by the inverter 182, inputted to the base via the driver 184, and output to the recording source output terminal 38a. The recording output is directed to a source other than the source selected as the recording output.

Note that the recording source output line for the analog signal of the right channel has a similar configuration and is not shown.

(2) Digital Input ■ Input Line Digital inputs (5 types) that are time-divisionally input from the left and right channels alternately from the digital input terminal 17 are input to the data selector 194 via inverters 190 and 192, respectively. The input selector 194 is
A command from 00 (3 bits) causes the digital input selected by the input selector key 74 on the front panel to be input to the digital I10 receiver 48 of FIG. 8C via the digital signal line 196.

(5) Recording Output Line Digital inputs (5 types) inputted alternately from the left and right channels in a time-division manner from the digital input terminal 17 are inputted to the digital recording source selector 198 via inverters 190 and 192, respectively. The digital recording source selector 198 receives a command (3 pins) from the CPU 200 to press the record out key 80 on the front panel and transfer the digital input selected by the input director 74 to the inverter 202, output buffer 204,
It is led to digital source output terminals 5o (two) via an output transformer 206. However, output to the input source itself is prohibited.

(3) Video Input ■ Input (Monitor Output) Video inputs (4 types) input from the line video input terminal 61 are input to the selector 208, respectively.

The selector 208 selects the video input selected by the input selector 74 on the front panel according to a command from the CPU 200, and guides it to the monitor output 64 via the amplifier 210.

@ Recording source output line Video input input from video input terminal 61 is input to selector 2
12 respectively. Selector 212 is CPU2
00, the record out key 80 on the front panel is pressed to select the video input selected by the input selector 74, and the video input is routed to the recording source output terminal 62 via the amplifiers 214 and 216. output is prohibited.

Line 220 is a main signal output line from the circuit of FIG. 8B and is led to two main signal output terminals 26 via a main mute circuit 222. The main mute circuit 222 mutes the main signal by turning on the transistor 224 and turning off the transistor 226 in response to a command from the CPU 200 based on the operation of the main mute key 132 (FIG. 4).

A line 226 is an output line for the sound field effect signal from the circuit of FIG. 8B, which leads the front sound signal to the output terminal 60 and the rear sound signal to the output terminal 62 via the effect mute circuit 228. The effect mute circuit 228 mutes the transistor 230 in response to a command from the CPU 200 based on the operation of the effect mute key 136 (FIG. 4).
is turned on and transistor 232 is turned off to mute the sound field effect signal.

[2] Figure 8B Figure 8B relates to the output lines of the analog straight path 12 and other paths.

The analog straight path 12 shows only one of the left and right channels. The selected analog input signal sent from the analog signal line 170 in FIG. 8A is input to the amplifiers 232 and 234 to produce a positive phase signal and a negative phase signal, which are input to the VCA 26. VCA26 is a balanced voltage control amplifier that inputs and amplifies positive-phase and negative-phase signals, and the maximum gain is +20L! B. The amount of attenuation is variably controlled in the range of +20 to 0. VCA26
The output of is outputted via a differential amplifier 236 and led to a line 237 of the digital loop 14.

Further, the output of the VCA 26 is input to the output selection circuit 28 via an analog signal line 238.

The output selection circuit 28 can utilize either the analog straight path 12 or the digital path (digital loop 14).
Alternatively, it is possible to select whether to make use of the digital straight path 18), and the selection is made by turning on and off the transistors 240 and 242 according to a command from the CPU 200.

When an analog input is selected as the input source and the function of the digital equalizer 42 is turned off by the equalizer on/off key 110, the transistor 240 is turned on and the transistor 242 is turned off, so that the analog straight path 12 is utilized. The analog input is output.

Furthermore, when analog input is selected as the input source and the equalizer on/off key 110 is turned on, the transistor 240 is turned off and the transistor 2
42 is turned on, and a signal processed through the digital loop 14 and subjected to D/A conversion is output from the line 244 through the transistor 242.

Also, if a digital input is selected as the input source, or an input source (DAT) that outputs both analog and digital signals.

CD, VDP) is selected, the transistor 240 is turned off and the transistor 242 is turned on, and the digital straight path 18 or the digital loop 14 is turned off.
The signal processed and D/A converted is sent to line 24.
4 through the transistor 242.

The output of the output selection circuit 28 is input to the mode selection circuit 30. The mode selection circuit 30 switches between stereo mode and monaural mode, and switches the mode in response to a command from the CPU 200 by operating the mode key 88.

In the mode selection circuit 30, in the stereo mode, transistors 246 and 252 are on and transistors 248 and 248 are on.
250 is turned off, and the left and right channel signals are output while being separated. In addition, in the monaural mode, transistors 246 and 252 are turned off, and transistors 248 and 252 are turned off.
250 is turned on, the signals of both the left and right channels are resistance-added and output.

The signal output from the mode selection circuit 30 is the amplifier 2
54.256, a normal phase signal and a negative phase signal are generated and input to the VCA 32. VCA32 is a balanced voltage control amplifier that inputs and amplifies a positive phase signal and a negative phase signal, and the maximum gain value is Odd and the attenuation value is O~
■It is variably controlled within the range of. The output of the VCA 26 is outputted via a differential amplifier 258 and led via an output line 220 to the main signal output terminal 26 of FIG. 8A.

In FIG. 8B, line 300 is the digital path D.
This is an output line (left channel) for the main signal after /A conversion, and the signal (analog signal) input from this line 300 is input to the output selection circuit 28 via the de-emphasis circuit 305 and the LPF 292.

Line 301 is the output line (right channel) for the main signal after D/A conversion in the digital path;
The signal input from 01 is sent to Dien 7792 circuit 303.
, right channel output selection circuit (
(not shown).

Lines 302, 304, 306, and 308 are output lines for sound effect signals, and are supplied with front left, front right, rear left, and rear right signals, respectively. Each sound effect signal input from these lines 302, 304, 306° 308 is sent to a de-emphasis circuit 312, respectively.
,314,316°318 to LPF322.324,
326° 328 to line 226, and the eighth
It is supplied to the sound effect output terminals 60 (front side) and 62 (rear side) in Figure A.

[3] Figure 8C Figure 8C shows the analog input digital loop path 14.
, digital straight path 18, sound field effect path 22,
It includes a control circuit 235.

The analog signal input from the signal line 237 of the digital loop 14 is input to the A/D conversion circuit with dither circuit 266 via a buffer amplifier 260, a low-pass filter 262, and a pre-emphasis circuit 264.

The configuration of the A/D conversion circuit 266 is shown in FIG.

This circuit performs successive approximation type A/D conversion.

In FIG. 13, a pseudo-random number generator 268 generates noise for dithering as a digital signal. This noise is transferred to the serial D through the parallel/serial converter 269.
/A converter converts it into an analog signal, and attenuator 2
Pre-emphasis circuit 26 with adder 272 via 70
It is added to the input signal from 4. This addition signal is input to comparator 276 via sample and hold circuit 294. The output of the successive approximation register 278 is the parallel D/A
It is input to comparator 276 via converter 280.

The comparator 276 successively compares the power of both people, and if the output of the sampling hold circuit 294 is larger, it sets "1".
If it is small, set “O” to that bit and do this and SB(
(lower bit).

As a result, digital data corresponding to the output of the sample and hold circuit 294 is held in the successive approximation register 278.

The data held in the successive approximation register 278 is passed through a parallel/serial converter 279 to a serial subtracter 281.
is input, the noise is subtracted, and the result is output. By performing this operation every time a signal is held in the sample-and-hold circuit 294, the serial subtracter 281 outputs a digital signal corresponding to the output analog signal (left channel) of the pre-emphasis circuit 264.

Note that the timing control circuit 283 controls the timing of each part of this circuit.

In FIG. 8C, the A/D conversion circuit 281 converts the input analog signal sent to the right channel digital loop (not shown) into a digital signal.
It has the same configuration as the A/D conversion circuit 266 in FIG.

The output digital signals of the A/D conversion circuits 266 and 280 are time-division multiplexed by a multiplexer 282.

A digital signal input from signal line 196 of digital straight path 18 is input to digital I10 receiver 48 .

As described above, the digital I10 receiver 48 is a circuit that interfaces the input digital signal with the subsequent circuit.

The output of digital I10 receiver 48 is input to digital volume 49. The digital volume 49 is
This corresponds to the VCA 26 (FIG. 8B) in the analog path and adjusts the level of the digital signal.

The digital signal of the digital loop 14 and the digital signal of the digital straight path 18 are connected to the selector 2.
90. The selector 290 is a digital 14
If the signal comes only from the side, this signal is output, and if the signal comes only from the digital straight path 18, this signal is output. Furthermore, when signals from the same source come from both the digital loop 14 and the digital straight path 18, the signal from the digital straight path 18 is output. That is, if there is a high-quality digital input source, it is output preferentially. Furthermore, when a data error is detected within the digital I10 receiver 48, a signal from the digital loop path 14 is output if an analog input is also input from the same source at the same time.

As a specific method of route selection by the digital I10 receiver 48, for example, the following method can be considered.

■ Voltage change in digital straight path 18 (
If there is a change, the digital straight path 18 is selected.

■ If more accurate, change the voltage in the digital straight path 18 ("1").

“O”) fundamental period (i.e. sampling frequency f,
), and if a periodic rubber corresponding to the sampling frequency f8 is detected, the digital straight path 1 is detected.
Select 8.

θ Detects whether or not the internal PLL is synchronized. In other words, even if a signal is supplied to the digital straight path 18, if there is a problem with the signal (dropout, failure, etc.) and the synchronization is lost, the digital loop 1
Select 4. The digital loop 14 is also selected when there is a data error.

The output of selector 290 is input to digital equalizer 42.

The digital equalizer 42 is a digital filtering processor as described above, and is composed of a 3-band parametric equalizer.
By commands from 00, the center frequency and Q rubel for each of the three divided bands, as well as the low-cut and high-cut frequencies and slopes, are set as per the set values by changing the filter configuration and filter coefficients by commands from CPIJ. be done. The digital signal input to the digital equalizer 42 is given each set filter characteristic. Note that the digital equalizer 42 is
For example, YM3608 manufactured by Nippon Musical Instruments Manufacturing Co., Ltd. can be used.

The output of the digital equalizer 42 is input as a main signal to a 4x oversampling digital filter 44.

The 4x oversampling digital filter 44 reduces the burden on the LPF 292 (Fig. 8B) after D/A conversion in the subsequent stage, and performs 4x oversampling of the input digital data (one sampling of the input source). Insert 3 pieces of interpolation data into the cycle to reduce sampling noise to B
Shift to the area side. )Output.

The 4 times oversampling digital filter 44 has 1
By performing convolution using highly accurate coefficients on a 6-bit input, accumulation of errors during convolution is prevented. (For the specific method, see, for example, the patent application filed by the present applicant dated September 29, 1985). Further, this digital filter 44 outputs a signal in 18 bits in order to perform highly accurate performance in the D/A conversion circuit 46 at the subsequent stage. This 18-bit signal is sent to the D/A conversion circuit 46.
is input.

The D/A conversion circuit 46 converts 8 bits based on the 18 bit input.
D/A conversion is performed M times. In other words, for example, the music signal on a CD is not always at a constant level, and may become louder.
It's getting smaller and changing dynamically. Generally C
The D/A converter has a conversion capability of 16 bits from the most significant bit to the least significant bit, but in digital signals encoded from actual music signals, the upper bits are often not used. Therefore, although it has a 16-bit conversion capability, it actually converts 15 bits, 14 bits, etc.
..., and the distortion and noise of the D/A converter are easily noticeable when the amplitude is small. Therefore, in the D/A conversion circuit 46, based on the 18-bit input, when the signal level is low, it is shifted up to 2 bits and
The D/
A conversion is performed. After D/A conversion, the level is adjusted by lowering the gain of the analog amplifier 344 at the subsequent stage by an amount corresponding to the shift up (1/4 attenuation with 2-bit shift up). In addition, by shifting up, all 18-bit output from the digital filter can be used, so re-encoding noise (
The cumulative error due to the convolution operation in the digital filter 44 at the previous stage can also be reduced to 1/4.

In the D/A conversion circuit 46, the digital filter 44
The left channel signal (18 bits) output from
The signal is input to the shifter 340, shifted up to 2 bits according to the amplitude level, and converted to D/A by the D/A converter 342.
A is converted.

The output analog signal of the D/A converter 342 is input to a variable amplifier 344. The gain of the variable amplifier 344 is reduced by the bit shift amount by the gain control circuit 346 (the entire D/A conversion circuit 46 has no gain). As a result, an analog signal that exactly corresponds to the output of the digital filter 44 is output from the line 300 as the main signal of the left channel.

FIG. 15 shows the operation of the D/A conversion circuit 46. The shifter 340 constantly detects the input signal level, and when it confirms that the level has dropped to the -643 area, it sets a dead zone of 0 and 1 bit (+6cE) after 18 seconds.
) is shifted up and attenuated by -6 dB with variable up 344. Similarly, after confirming that the level has decreased to the -12 dB area, the level shifts up by another 1 bit after 0.18 seconds (
+12 clB) and is attenuated by -12 clB by the variable amplifier 344.

No dead zone is provided when the input signal level increases.

D/A conversion circuit 3 for right channel main signal
48 is also configured similarly to the left channel circuit 347.

Next, the sound field sound effect creation process will be explained.

The output of the digital equalizer 42 is guided to the sound field effect path 22 and input to the sound field processor 20 in order to create a sound field sound effect ((left channel + right channel)/2 depending on the content of the program). (or the left channel - right channel signal is input).

The sound field processor 20 is a processor (for example, YM3804 manufactured by Nippon Gakki Manufacturing Co., Ltd., commonly known as DS).
P) 350 and three sets of 24-bit x 16 word signal delay memory (dynamic RAM) 352, each of which handles front sound, rear sound, and common signal processing for front and rear, and controls the sound field effect of the front panel. Sound field sound effects are created according to program selection operations and parameter change operations on the operation unit 130. As for the created sound field sound effects, the front sound is output from line 356 and the rear sound is output from line 358 (time-division output for each left and right channel).

The modulation circuit 354 is for providing other sound field effects (for example, chorus, tremolo, symphonic, etc.).This sound field effect is an artificially created program not based on actual reflected sound data. You can create interesting sound effects.For example, delay allows you to enjoy three-dimensional sound by delaying the sound of the four channels little by little, stereo echo allows you to create an echo effect by slightly shifting the left and right sounds, and the sound quality changes. Stereo 7 lunging that creates a undulating effect, chorus that expresses a drifting sound wave, stereo 7 lunging that creates a unique sound with a sense of rotation, tremolo that creates a glossy sound wave, and lyrical and glittering. There are symphonic instruments that create a sense of harmonious sound, and echo rooms that create the feeling of being inside a recording studio's echo chamber.

The front sound signal time-divisionally output from the left and right channels from the line 356 is oversampled four times by the digital filter 52, and is input to the D/A conversion circuit 56 in 18 bits.

The D/A conversion circuit 56 has a digital volume and D
/A converter, which converts the input signal into D/A and converts the gain to be set (see FIG. 0.2dB as shown in
It is determined in 480 steps, that is, in the range of O to -96 dB. )give.

An example of the configuration of this D/A conversion circuit 56 is shown in FIG.

The input signal (left and right channel time-division input) is input to a multiplier 422 via an input control circuit 420.

Further, the gain information from the CPU 200 is given as up/down information to distinguish between increasing and decreasing directions, and a change layer is given as a pulse corresponding to 1 pulse of 0.2 cB.

This pulse and up/down information is sent to an up/town counter 424 for up/down counting. Each time the up/down counter 424 overflows or underflows, it outputs one pulse along with up information or down information, causing the up/down counter 426 to count up/down.

As a result, gain information is stored in the up/down counters 424 and 426, separated into a mantissa and an exponent.

The mantissa held in the up/down counter 424 is R
The OM 428 converts it into 10 (1→1inear), and the multiplier 422 multiplies the input signal.

The output multiplied value of the multiplier 422 is sent to a shifter 434, and the level is detected by a floating level detector 430. The shift controller 432 controls the shifter 43 when the detected level is small.
4 to shift up the multiplication value to 2 hits (same operation as the shifter 34a in the main signal path).

The output of the shifter 434 is D/A converted by a D/A converter via an output control circuit 436, and is then D/A converted by an attenuation circuit 440.
442.

The attenuation circuit 440 is 1 (through), 1/'2°1/4,
Attenuator with attenuation of 1/8 and 1/16 (with sample and hold circuit >440a,...)

440e and 442a, . . . , 440e, into which both left and right channel signals are input.

On the other hand, the shift controller 432 subtracts the shift amount bit-shifted by the shifter 434 from the exponent value of the gain information given from the up/down counter 426.
The attenuator required to realize the gain commanded by the PU is found, and the address encoder 444 outputs the attenuation amount information.

This attenuation amount information is given as a sampling pulse to attenuation circuits 440 and 442 via an address decoder 446. As a result, the attenuators 440a, . . . , 4
40e and 442a,...

The output of the D/A converter 438 is sampled and held in one of 442e corresponding to the attenuation amount information (the left and right channels are also separated by this sample and hold), and outputted with a predetermined attenuation amount.

As a result, an analog signal obtained by multiplying the input signal by a predetermined gain is output.

In this way, the word length of the D/A converter 438 can be effectively used by dividing the gain information into a mantissa and an exponent, first multiplying the mantissa by D/A conversion, and multiplying the analog output by the exponent. A digital volume with few errors can be realized. Furthermore, bit shifting by the shifter 434 also contributes to reducing errors in the D/A converter 438.

The left and right channel outputs of the attenuators 440 and 442 are the 8th
LPF in Figure 8B via lines 302 and 304 in Figure C
322 and 324, respectively.

Note that the mode controller 446 in the D/A conversion circuit 56 shown in FIG. 14 switches the operation mode of this D/A conversion circuit 56. That is, D/A in FIG.
The conversion circuit 56 is a D/A conversion circuit (eighth
It can also be used as (Figure C). In that case, the multiplier circuit 422 is turned on so that the shift controller 432 does not receive exponent information from the up/down counter 426. In this way, the D/A conversion circuit 56 has no gain and only performs bit shift → D/A conversion → attenuation, so that it can be used as the D/A conversion circuit 46. Setting of this mode is performed by mode switching commands M, M sent from the CPU 200.

In FIG. 8C, the sound field processor 20
The backward sound signal time-divisionally output from left and right channels to lines 358 is oversampled four times by the digital filter 54 and input to the D/A conversion circuit 58 . D
The /A conversion circuit 58 is configured in the same manner as the D/A conversion circuit 56 shown in FIG. 14, for example. The left and right channel sound effect signals of the rear sound output from the D/A conversion circuit 58 are output from lines 306 and 308, respectively, and are connected to L in FIG. 8B.
They are respectively input to PF326 and 328.

A control circuit 335 controls each part of this amplifier. In the control circuit 335, the variable resistor 382 is interlocked with the main volume 94 and outputs a DC voltage according to its rotation level. Further, the variable resistor 384 is linked to the balance adjustment volume 96 and outputs a DC voltage according to the rotation a thereof. These DC voltages are A/D converted by a volume control circuit (A/D converter) 386.

Sent to CPU.

The CPU 408 provides on/off information 391 for the power switch 70 and information 390 for various control keys on the front panel.
, remote control information 392 is input, and the operation contents are sent to the CPU 200.

Based on the operation contents, the CPU 200 controls the analog switches of each section to turn on/off via the analog switch control circuit 388. In addition, various volume adjustment operation means (main volume 94, left/right balance volume 96,
The audio muting key 92, input level setting key 88, main mute key, and CPU 200 control the sound field processor 20 via the interface 395.

The ROM 400 stores programs such as those for sound field effects. The RAM 402 stores a program that is a combination of the user-defined O-gram for sound field effects and the settings of the digital equalizer 42, input level settings, current settings of each part, and the like. This memory does not disappear even if you turn off the power switch.

A motor drive 410 drives the main volume with a step motor 412 based on remote control operation.

〔Effect of the invention〕

As explained above, according to the present invention, the gain adjustment is performed by D.
/A conversion is performed separately before and after A conversion, and when the total gain is made to be almost through or higher, the latter stage of D/A conversion is almost through, and the gain is adjusted in the front stage of D/A conversion to make the total gain almost equal to or less than through. In this case, the first stage of D/A conversion is almost passed through and the gain (attenuation amount) is adjusted at the second stage of D/A conversion, resulting in the following effects.

■ When the total gain is large, the stage before the D/A conversion, that is, the digital processing circuit, operates close to full bit, and the internal level becomes relatively small, and the stage after the D/A conversion is through, so it occurs in the digital processing circuit. Yes, the noise level created will not be amplified at all.

■ When the total gain is small, the input to the digital processing circuit is not attenuated because the stage before D/A conversion is through, and the operation uses the largest number of bits possible.
Since the noise level is prevented from increasing unnecessarily here, deterioration of the S/N ratio in that part is prevented. Further, even if noise is generated in the digital processing circuit, it is attenuated in the subsequent stage of D/A conversion, so the noise level itself becomes small.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the basic configuration of the present invention. FIG. 2 is a block diagram showing one embodiment of a control amplifier to which the present invention is applied, and FIG. 8A, FIG. 8B, and FIG.
This diagram shows the direct essentials of the specific circuit shown in Figure C. FIG. 3 is a diagram showing the principle of the sound field effect system incorporated in the control amplifier shown in the embodiment. FIG. 4 is a front view showing the configuration of the front panel of the control amplifier according to the embodiment. FIG. 5 is a front view showing an example of the display on the display section 90 on the front panel of FIG. 4, when the input level is set. FIG. 6 shows an example of the filter characteristics of the digital equalizer 42 set by the digital equalizer parameter setting section 100 on the front panel of FIG. 4. FIG. 7 is an enlarged view of the digital equalizer parameter setting section 100 on the front panel of FIG. FIG. 8A, FIG. 8B, and FIG. 8C are detailed views of each part indicated by the same figure number in FIG. 2. FIG. 9 is a plan view showing an example of the arrangement of speakers, etc. in a listening room to which the control amplifier shown in this embodiment is applied. FIG. 10 is a block diagram showing gain distribution within the control amplifier shown in the embodiment. FIG. 11 is a diagram illustrating the gain distribution in FIG. 10. FIG. 12 is a diagram showing the noise level according to the gain distribution shown in FIG. 10. FIG. 13 is a block diagram showing a configuration example of the dithered A/D conversion circuit 266 in FIG. 8C. FIG. 14 is a block diagram showing an example of the configuration of the D/A conversion circuit 56 in FIG. 8C. FIG. 15 is an explanatory diagram of the operation of the D/A conversion circuit 46 in FIG. 8C. FIG. 16 is a diagram showing the display state in the digital equalizer parameter setting section 100 when the equalizer on/off key 110 is turned off in the control amplifier shown in the embodiment. FIG. 17 is a block diagram showing the configuration of a gain adjustment circuit that includes the problems to be solved by the present invention. 2...D/A converter, 3b...digital volume, 4...analog volume. 1? Ha%'+07ij[l VV+a! 1%Q
%ll:F! 'IJ Figure 13 Penumbra °, 0. Grade 11 Positive Number (Method) 19861
February 110

Claims (1)

[Scope of Claims] A D/A conversion circuit that converts a digital signal into an analog signal, a digital amplifier and a digital volume placed before the D/A conversion circuit, and a digital volume placed after the D/A conversion circuit. When increasing the total gain, set the analog volume to almost through and use the digital volume to vary the gain. When decreasing the total gain, use the digital amplifier and the digital volume. A gain adjustment circuit characterized in that the digital volume is set so that both of them together are almost through, and the gain is varied by the analog volume.