JPH02270365A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH02270365A
JPH02270365A JP9251789A JP9251789A JPH02270365A JP H02270365 A JPH02270365 A JP H02270365A JP 9251789 A JP9251789 A JP 9251789A JP 9251789 A JP9251789 A JP 9251789A JP H02270365 A JPH02270365 A JP H02270365A
Authority
JP
Japan
Prior art keywords
thick film
conductor pattern
film conductor
insulating board
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9251789A
Other languages
Japanese (ja)
Inventor
Masanori Koga
雅典 古賀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9251789A priority Critical patent/JPH02270365A/en
Publication of JPH02270365A publication Critical patent/JPH02270365A/en
Pending legal-status Critical Current

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  • Parts Printed On Printed Circuit Boards (AREA)

Abstract

PURPOSE:To obtain a semiconductor device, where an insulating board can be miniaturized, a coil and a manual soldering operation can be dispensed with, a production time can be shortened, component parts can be lessened in number and so on, by a method wherein a multilayered thick film conductor pattern is formed on an insulating board provided with a high frequency semiconductor element and others. CONSTITUTION:A multilayered thick film conductor pattern 6 is formed on an insulating board 7 provided with a high frequency semiconductor element and a capacitive element. For instance, the thick film conductor pattern 6 is formed on the upper side of the insulating board 7, the insulating board 7 is soldered to the upside of as copper plate 8 which serves also as a heat sink, and moreover the copper plate 8 functions as an earthing too. An over-glass is used as an insulator 10 which is employed as an interlaminar insulating layer when the thick film conductor pattern 6 is formed into a multilayered structure, and the over-glass is formed by repeating a process in which Ag-Pt alloy paste, for instance, is printed and sintered into a layer, and a glass coat is printed thereon and sintered again, and furthermore Ag-Pt alloy paste is printed thereon and sintered. When the thick film conductor pattern 6 is required to change in length, parts 6a and 6b shown in a figure are directly connected together.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発F!Aは高周波厚膜混成集積回路に適用し。[Detailed description of the invention] [Industrial application field] This departure F! A is applied to high frequency thick film hybrid integrated circuits.

セラミック基板を用いたV)IF帯、UHIF帯の高周
波電力増幅用モジュールに使用して特に有効な半導体装
置に関するものである。
The present invention relates to a semiconductor device that is particularly effective for use in a high-frequency power amplification module in the V) IF band and UHIF band using a ceramic substrate.

〔従来の技術〕[Conventional technology]

近年、無線通信装置の電力増幅部をハイブリッド型の集
積回路装置としてモジュール化したものが多く提供され
、より小型化へと向ってい□る。、 この種の半導体装
置について図面を参照−して説明する。WJ8図は従来
の半導体装置において高周波電力増幅用モジュールth
atする等価回路図を示し、特に半導体増幅素子間の整
合回路部分のみを図示している。図において、111.
121は半導体増幅素子s 131 e ’41 + 
+51汀キヤパシタンス素子で1例えば積層セラミック
コンデンサを用いる。161は主線路を形成する厚膜導
体パターンで1例えばAy−pt金合金ペースト状にし
たものを印刷・焼結して形成したマイクロストリップラ
インである。半導体増幅素子I11 、121間を厚膜
導体パターン(6)のL成分とキャパシタンス素子14
1 t 151のO成分により整合回路が構成されてい
る。厚膜導体パターン(6)を具体的に構成した一例が
第4図及び第す図である。′第4図は従来の半導体装置
の上面図、第5図は@4図のY、Yにおける断面図であ
る。
In recent years, many hybrid integrated circuit devices have been provided in which the power amplifying section of wireless communication devices is modularized, and the trend is towards further miniaturization. , This type of semiconductor device will be explained with reference to the drawings. Figure WJ8 shows a high-frequency power amplification module th in a conventional semiconductor device.
An equivalent circuit diagram is shown, in particular, only a matching circuit portion between semiconductor amplification elements is shown. In the figure, 111.
121 is a semiconductor amplification element s 131 e '41 +
For example, a multilayer ceramic capacitor is used as a +51 phase capacitance element. Reference numeral 161 denotes a microstrip line formed by printing and sintering a thick film conductor pattern forming a main line, for example, an Ay-pt gold alloy paste. The L component of the thick film conductor pattern (6) and the capacitance element 14 are connected between the semiconductor amplification elements I11 and 121.
A matching circuit is constructed by the O component of 1 t 151. An example of a concrete structure of the thick film conductor pattern (6) is shown in FIGS. 'FIG. 4 is a top view of a conventional semiconductor device, and FIG. 5 is a sectional view taken along Y and Y in FIG.

図において厚膜導体パターン(6)は絶縁基板(71上
面に形成され、絶縁基板17)はヒートシンクを兼ねる
鋼プレート(8)上面にはんだ付けされ、鋼プレート1
g+ riアースラインとしても使用される。
In the figure, the thick film conductor pattern (6) is formed on the upper surface of an insulating substrate (71), and the insulating substrate 17 is soldered to the upper surface of a steel plate (8) which also serves as a heat sink.
Also used as g+ri ground line.

(91ハ絶縁基板(1)の面積が狭く、充分な厚膜導体
パターン(6)の長さが取れない場合に挿入されるコイ
ルで、その両端は厚膜導体パターン(6)にはんだ付け
されている。
(91c) A coil inserted when the area of the insulating substrate (1) is small and a sufficient length of the thick film conductor pattern (6) cannot be obtained, and both ends of the coil are soldered to the thick film conductor pattern (6). ing.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来の半導体装置は以上のように構成されているので、
厚膜導体パターンの占める面積が広くなり、またコイル
の挿入などで手作業によるはんだ付けが必要で作業効率
の低下などの問題があった。
Conventional semiconductor devices are configured as described above, so
The thick-film conductor pattern occupies a large area, and manual soldering is required to insert the coil, resulting in problems such as a decrease in work efficiency.

この発明は上記のような問題点を解決するためになされ
たもので、絶縁基板の小型化ができると共に、コイルか
不要になり、人手によるはんだ付は作業が省けるので、
製造時間の短縮。
This invention was made to solve the above-mentioned problems, and in addition to making the insulating board smaller, it also eliminates the need for a coil and eliminates manual soldering.
Reduced manufacturing time.

部品点数削減及び信頼性向上につながる半導体装Itを
得ることを目的とする。
The purpose is to obtain a semiconductor device It that reduces the number of parts and improves reliability.

〔課題を解決する念めの手段〕 この発明に係る半導体装置は、高周波半導体素子を有す
る絶縁基板上に多層化した厚膜導体パターンを形成し虎
ものである。
[Preparatory Means for Solving the Problems] The semiconductor device according to the present invention is a device in which a multilayered thick film conductor pattern is formed on an insulating substrate having a high frequency semiconductor element.

〔作用〕[Effect]

この発明における半導体装置は厚膜導体パターンを多層
化したことにより、従来のように実gciii積が広が
ることもなく、コイルも使用せずに済む。
Since the semiconductor device according to the present invention has a multilayer thick film conductor pattern, the actual Gciii product does not increase as in the conventional case, and there is no need to use a coil.

〔実施例〕〔Example〕

以下、この発明の一実施gAJを図によって説明する。 Hereinafter, one embodiment gAJ of the present invention will be explained with reference to the drawings.

wc1図は半導体装置の上面図、第8図は第1図のx、
xにおける断面図である。
wc1 figure is a top view of the semiconductor device, figure 8 is x of figure 1,
FIG.

図において16)〜18+ #i第4図及び第6図の従
来例に示したものと同等であるので説明を省略する。
In the figure, 16) to 18+ #i are the same as those shown in the conventional example of FIGS. 4 and 6, so the explanation will be omitted.

1101は絶縁基板+?l上面に形成された厚膜導体パ
ターン+6111r多層化する際に、各層間を絶縁する
絶縁体で例えばオーバーガラスを用いる。この製置方法
の一例としてはAP −Pt i金をペースト状にした
ものを印刷・焼結した上面にガラスコート全印刷・焼結
し、更にkf −Pt合金の印刷・焼結を行う工程を繰
り返して形成してもよい。
Is 1101 an insulating board+? Thick film conductor pattern formed on top surface of l+6111r When multilayering is performed, an insulator for insulating between each layer is used, for example, over glass. An example of this manufacturing method is to print and sinter a paste of AP-Pt i gold, completely print and sinter a glass coat on the top surface, and then print and sinter the kf-Pt alloy. It may be formed repeatedly.

また厚膜導体パターン1B)の長さを変えたい場合には
、厚膜導体パター16)の厚さが10μm程度であるた
め、第3図に示す部分(6a) 、 (6b)を直結す
ることによって得られる。
Also, if you want to change the length of the thick film conductor pattern 1B), the thickness of the thick film conductor pattern 16) is about 10 μm, so parts (6a) and (6b) shown in FIG. 3 should be directly connected. obtained by.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば半導体装置において厚
膜導体パターンを多層化して形成するように構成し虎の
でパターン面積が縮小され、モジュールの小型化1てつ
ながり、!九、コイルが不要になる効果がある。
As described above, according to the present invention, a semiconductor device is structured so that thick film conductor patterns are formed in multiple layers, so that the pattern area is reduced, leading to miniaturization of the module. 9. It has the effect of eliminating the need for a coil.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例による半導体装置會示す上
面図%第8図は第1図のX、Xにおける断面図、第3図
は従来の半導体装置を構成する一部の等価回路図、第4
図は従来の半導体装置を示す上面図、第5図fl第4図
のY、Yにおける断面図である。 図において161は厚膜導体パターン(tta)、(6
b)は部分、+71 ij絶縁基板、(8)汀鋼プレー
ト、(1αは絶縁体である。 なお、図中、同一符号は同一、又は相当部分t−示す。
FIG. 1 is a top view showing a semiconductor device according to an embodiment of the present invention. FIG. 8 is a sectional view taken along the lines X and X in FIG. 1, and FIG. 3 is an equivalent circuit diagram of a part of a conventional semiconductor device. , 4th
The figures are a top view showing a conventional semiconductor device, and a sectional view along Y and Y in FIG. 5 fl and FIG. 4. In the figure, 161 is a thick film conductor pattern (tta), (6
b) is a part, +71 ij insulating substrate, (8) steel plate, (1α is an insulator. In the figure, the same reference numeral indicates the same or equivalent part t-.

Claims (1)

【特許請求の範囲】[Claims] 高周波半導体素子及びキャパシタンス素子を有する絶縁
基板上に多層化した厚膜導体パターンを形成したことを
特徴とする半導体装置。
A semiconductor device characterized in that a multilayered thick film conductor pattern is formed on an insulating substrate having a high frequency semiconductor element and a capacitance element.
JP9251789A 1989-04-11 1989-04-11 Semiconductor device Pending JPH02270365A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9251789A JPH02270365A (en) 1989-04-11 1989-04-11 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9251789A JPH02270365A (en) 1989-04-11 1989-04-11 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH02270365A true JPH02270365A (en) 1990-11-05

Family

ID=14056518

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9251789A Pending JPH02270365A (en) 1989-04-11 1989-04-11 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH02270365A (en)

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