JPH0226386B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming a three-dimensional wiring in a semiconductor device, and more particularly to a method for forming an air-insulated three-dimensional wiring.

Semiconductor elements, especially junction gate field effect transistors (hereinafter referred to as
GaAs MESFET) has been put into practical use as a microwave transistor that overcomes the characteristic limits of Si bipolar transistors. The output power of such a GaAs MESFET in the microwave can be increased by increasing the total gate width.
Therefore, GaAs MESFETs for power use are usually
As shown in the plan view of figure a, a comb-shaped drain electrode 1
1 and source electrodes 12 are arranged alternately, and a gate electrode 13 is arranged between them. In order to achieve such a configuration, the wiring 121 to the source electrode 12 and the power supply wiring 131 to the gate electrode 13 must necessarily be three-dimensionally wired (crossover) at a position such as point 14. Usually these crossovers are shown in Figure 1b and A in Figure 1a.
As shown in the cross section of the -A' section, a structure is adopted in which the two wiring electrodes are insulated by the SiO ₂ film 15.

However, at ultra-high frequencies above the X band, the parasitic capacitance generated in these three-dimensional wiring sections cannot be ignored compared to the gate-source depletion layer capacitance CGS of the FET itself, and together with dielectric loss, the gain or band characteristics deteriorate. This is a contributing factor. Although the parasitic capacitance can be reduced to some extent by reducing the width of the three-dimensionally intersecting electrodes, an increase in wiring resistance is not preferable because it causes electromigration of the wiring electrodes. The most effective way to significantly reduce parasitic capacitance without increasing parasitic resistance is to insulate the intersection with air without using a dielectric (air crossover structure).

Several devices with air crossover structures have been reported so far, but all of their formation methods mainly utilize etching selectivity. In other words, an air crossover structure is obtained by forming a spacer material (copper is commonly used) between both wiring electrodes by electrolytic plating, etc., and then selectively etching away only the spacer material. It is.

Using traditional methods like this
When trying to make a GaAs MESFET into an air crossover, the following problems arise. (1) Sensitive to acid or alkaline solutions
It is difficult to obtain an etching solution that can selectively remove only the spacer material without attacking gate electrodes made of GaAs or Al. (2) It is difficult to process spacer materials formed to a thickness of several μm with good uniformity within a wafer.

An object of the present invention is to provide a new method for forming air-insulated three-dimensional interconnections that eliminates these conventional problems.

According to the present invention, a first photoresist layer consisting of a thick film is formed on a strip-shaped electrode serving as a first wiring on a substrate, and electrolytic plating is performed using the photoresist layer as a mask to selectively form a thick film. In the step of forming the electrode, a photoresist with high viscosity is formed to flatten the surface, and then the entire surface is irradiated with an O ₂ ion beam in a shower shape to form a layer on the first wiring part approximately to the thickness of the thick film electrode. a step of selectively leaving a first photoresist layer of equal thickness, after depositing a metal film for power supply on the entire surface, forming a third photoresist layer with an opening at the intersection with the first wiring; forming a second wiring that intersects the first wiring by performing electrolytic plating again; and after removing the third photoresist layer, using the second wiring as a mask, forming a second wiring that intersects the first wiring; A method for forming an air-insulated three-dimensional wiring is obtained, which comprises the steps of selectively etching away the film and then removing the second photoresist layer.

According to the present invention, since the photoresist itself, which can be easily processed in a normal photolithography process, is used as a spacer material, the steps required to form three-dimensional wiring are greatly simplified compared to conventional methods.

Below, as an example of the present invention
This will be explained in detail using the air crossover of GaAs MESFET as an example.

Figures 2 and 3 are diagrams for explaining one embodiment of the present invention, Figures 2a to 3g are plan views of main parts of the manufacturing process, and Figures 3a to 3g are A in Figure 2. −A′,
B-B', C-C', D-D', E-E', F-F', G-
A sectional view of the main part of G′ is shown. First of all, semi-insulating
On the active layer 21 epitaxially grown on the GaAs substrate 20, a gate electrode 22 made of Al for forming a shot key barrier, and an ohmic source electrode 23 and drain electrode 24 made of AuGeNi are lifted off by normal optical exposure. (Figure 2a). Next, a SiO ₂ film 25 serving as a protective film for the Al gate electrode 22 is deposited on the entire surface of the wafer to a thickness of about 3000 Å by CVD, and windows are opened in the source and drain electrode extraction portions 231 and 241 and the gate electrode extraction portion 221. Next, the gate pad part 222 made of Al and the Au drawn out from there.
After selectively forming a reaction prevention electrode 223 made of, for example, Ti/Pt on the gate pad portion 222 in order to prevent reaction with the bonding line made of Ti/Pt, a /Au to a thickness of about 500 Å each (FIG. 3b). Next, photoresist 2 such as AZ1350J (product name)
7 to a thickness of 4 to 6 μm, for example, and then patterned so as to selectively cover the power supply wiring 224 to the gate electrode 22 (see FIG. 2 c). region). Next, as shown in FIG. 3c, thick-film wiring 28 having a thickness of about 5 μm is formed by applying A-nitrification to the shaded area in FIG. 2d. Next, the photoresist layer 27
After removing the photoresist, a relatively high viscosity photoresist (AZ1375) is overcoated by spin coating to form a photoresist layer 29 with an almost flat surface as shown in FIG. 3d. Next, the entire surface was ion-etched for about 6 minutes under the conditions of an accelerating voltage of 500 V and an oxygen ion current density of 0.8 mA/cm ² , as shown in Figure 3e.
The thick film wiring 28 is exposed as shown in FIG. At this time, a photoresist layer 29 having a thickness corresponding to the thickness of the thick film wiring 28 selectively remains on the power supply wiring 224 portion. Next, a power supply metal film 30 similar to that described above is formed again by vapor deposition over the entire surface, and then a photoresist such as AZ1350J is applied so that the intersection with the power supply wiring 224 is opened, that is, the second Patterning is performed so that the shaded area in FIG. f is selectively covered. If there is a step between the thick film wiring 28 and the photoresist layer 27, the power supply metal film 30 may be removed at the step.
As a result, during patterning of the second photoresist layer 31, the first photoresist layer 27 is also dissolved and the power supply metal film 30
is deformed or lifted off, making it difficult to form a crossover electrode later. Next, using the photoresist layer 31 as a mask, Au plating is applied again to form a crossover electrode 32 with a thickness of, for example, 2 to 3 μm.
(Fig. 3 f). Next, after removing the photoresist 31 with an organic solvent such as acetone, using the crossover electrode 32 as a mask, Ar ion beam etching or _I2 :KI: _H2O -based and
Remove the unnecessary power supply metal film 32 other than the crossover electrode 32 using an H ₂ SO ₄ based etching solution, and then completely remove the exposed photoresist layer 29 using a resist remover (J-100). do.
Finally, by selectively removing the unnecessary metal film 26 for power supply using the same etching solution as described above, the gate power supply wiring 22 as shown in FIG.
4 and the crossover electrode 32 are air-insulated, thereby completing an air crossover structure.

As described above, by using the forming method according to the present invention, it is possible to easily form a spacer material using a conventional photo process, which requires a complicated process, thereby improving productivity, yield, and reliability. It has become possible to significantly improve

[Brief explanation of drawings]

Figure 1 a and b are for general electric power, respectively.
11, 12, and 13 are the drain, source, and gate electrodes, respectively; 15 is the SiO ₂ film; and 12
Reference numeral 1 indicates a source wiring, and reference numeral 131 indicates a gate wiring 14, which indicates a three-dimensional wiring portion of the source wiring 121 and the gate wiring 131. Figures 2a-g and 3a-g are diagrams for explaining one embodiment of the present invention, and Figures 2a-g are plan views of main parts of the manufacturing process, and Figures 3a-g are FIG. 3 is a sectional view of the main part of FIG. 2; In each figure, 20...semi-insulating GaAs substrate,
21... Operating layer, 22, 23, 24... Gate, source, drain electrode, respectively, 25... SiO ₂
Membrane, 26, 30... Metal membrane for power feeding, 27, 29,
31...Photoresist, 28...Thick film wiring, 32
...Crossover electrode, 221, 231, 24
1...gates opened in the SiO ₂ film 25,
Windows for source and drain electrodes, 222... gate pad, 223 metal film for reaction prevention, 224...
The wiring for gate power supply is shown.

Claims (1)

[Claims] 1 Covering the first wiring provided on the board,
selectively forming a thick film electrode using the first photoresist layer as a mask; removing the first photoresist layer; The second photoresist layer having a thickness approximately equal to the thickness of the thick film electrode is formed between the thick film electrodes by forming a photoresist layer on the entire surface and flattening the surface, and ion etching the entire surface. a step of selectively leaving a second wiring, and then a second wiring that intersects with the first wiring;
An air-insulated three-dimensional wiring comprising the steps of: forming a wiring on the thick film electrode and the remaining second photoresist layer; and then removing the second photoresist layer. Formation method.