JPH02259728A - Liquid crystal display device - Google Patents

Liquid crystal display device

Info

Publication number
JPH02259728A
JPH02259728A JP8084989A JP8084989A JPH02259728A JP H02259728 A JPH02259728 A JP H02259728A JP 8084989 A JP8084989 A JP 8084989A JP 8084989 A JP8084989 A JP 8084989A JP H02259728 A JPH02259728 A JP H02259728A
Authority
JP
Japan
Prior art keywords
conductive film
common electrode
transparent conductive
film
liquid crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8084989A
Other languages
Japanese (ja)
Inventor
Kazuo Inoue
和夫 井上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP8084989A priority Critical patent/JPH02259728A/en
Publication of JPH02259728A publication Critical patent/JPH02259728A/en
Pending legal-status Critical Current

Links

Landscapes

  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

PURPOSE:To miniaturize a liquid crystal display device and to reduce mounting cost by forming a common electrode in structure obtained by laminating a transparent conductive film and an upper layered metal provided through an interlayer insulating film having a connection hole on the transparent conductive film. CONSTITUTION:The common electrode 16 of the liquid crystal display device is constituted of the transparent electrode film 18 and the upper wiring 24 provided through the interlayer insulating film 20. A power source and a control signal are supplied from the common electrode 16 to a semiconductor integrated circuit 14 through the upper wiring 24. The insulating film 20 having insulating ability is formed on the crossed area of the upper wiring 24 with the adjacent transparent conductive film 18 being the lower layer of the common electrode 16 between the wiring 24 and the conductive film 18, so that short circuit between the conductive film 18 and the wiring 24 is prevented. The connection area among a projecting electrode 25 formed on the circuit 14, the common electrode 16 and an output electrode 34 is constituted of one layer of the transparent conductive film 18. Then, the power source and the control signal are inputted in the circuit 14 from the common electrode 16 through the upper wiring 24 and the circuit 14 outputs an image to be displayed to the output electrode 34.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は液晶表示装置の構造に関し、とくに液晶表示装
置の基板上に実装した半導体集積回路へ電源および制御
信号を供給するための共通電極の構造に関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to the structure of a liquid crystal display device, and in particular to the structure of a common electrode for supplying power and control signals to a semiconductor integrated circuit mounted on a substrate of a liquid crystal display device. Regarding structure.

〔従来の技術〕[Conventional technology]

液晶表示装置を構成するガラス基板の周辺部を拡張し、
この拡張した領域に複数の半導体集積回路を搭載した従
来例として、例えば特開昭62−44787号公報に記
載のものがある。この公報に記載された液晶表示装置の
構造を第2図に示す。
Expanding the periphery of the glass substrate that makes up the liquid crystal display device,
A conventional example of mounting a plurality of semiconductor integrated circuits in this expanded area is, for example, the one described in Japanese Patent Application Laid-Open No. 62-44787. The structure of the liquid crystal display device described in this publication is shown in FIG.

透明導電膜上に直接ニッケル、銅などを被覆した共通電
極16と、出力電極64とを基板12上に設ける。半導
体集積回路14は、第1の導線30と第2の導線32と
を形成した絶縁性の可撓性フィルム基板28上に固定す
る。この第1の導線30および第2の導線32と、半導
体集積回路14とは、ボンディングワイヤ66により接
続する。可撓性フィルム基板28と基板12との接続は
、ハンダ接続により、共通電極16および出力電極64
と、第1の導線60および第2の導線62とを接続する
ことによって、半導体集積回路14を実装した可撓性フ
ィルム基板28を基板12上に固定する。
A common electrode 16 in which a transparent conductive film is directly coated with nickel, copper, etc., and an output electrode 64 are provided on the substrate 12. The semiconductor integrated circuit 14 is fixed onto an insulating flexible film substrate 28 on which a first conductive wire 30 and a second conductive wire 32 are formed. The first conductive wire 30 and the second conductive wire 32 are connected to the semiconductor integrated circuit 14 by a bonding wire 66. The flexible film substrate 28 and the substrate 12 are connected by soldering to the common electrode 16 and the output electrode 64.
By connecting the first conductive wire 60 and the second conductive wire 62, the flexible film substrate 28 on which the semiconductor integrated circuit 14 is mounted is fixed onto the substrate 12.

共通電極16によって第1の導線30を介して半導体集
積回路14に電源および制御信号が入力され、この半導
体集積回路14は画像を表示するための出力信号を第2
の導線32を介して出力電極64に出力する。
Power and control signals are input to the semiconductor integrated circuit 14 through the common electrode 16 via the first conducting wire 30, and the semiconductor integrated circuit 14 inputs an output signal for displaying an image to the second conductor 30.
It outputs to the output electrode 64 via the conducting wire 32 .

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

第2図を用いて説明した従来技術においては、共通電極
16と半導体集積回路14との接続が、二層配線やジャ
ンパー線を用いることなく行なうことができる利点があ
る。しかしながら可撓性フィルム基板28上に半導体集
積回路14を接続し、この可撓性フィルム基板28を基
板12に実装しているため、液晶表示装置の小型化に対
する対応は充分でない。そのうえボンディングワイヤ3
6により半導体集積回路14と可撓性フィルム基板28
とを接続し、さらにハンダにより可撓性フィルム基板2
8と基板12とを接続している。このため実装コストが
高くなるという問題点がある。
The prior art described with reference to FIG. 2 has the advantage that the common electrode 16 and the semiconductor integrated circuit 14 can be connected without using double-layer wiring or jumper wires. However, since the semiconductor integrated circuit 14 is connected to the flexible film substrate 28 and the flexible film substrate 28 is mounted on the substrate 12, it is not sufficient to cope with miniaturization of the liquid crystal display device. Moreover, bonding wire 3
6, the semiconductor integrated circuit 14 and the flexible film substrate 28
and then connect the flexible film substrate 2 with solder.
8 and the substrate 12 are connected. Therefore, there is a problem that the implementation cost becomes high.

本発明の目的は、液晶表示装置の小型化に対応可能で、
さらに実装コストが低い液晶表示装置の構造を提供する
ことKある。
An object of the present invention is to be able to respond to miniaturization of liquid crystal display devices, and to
Furthermore, it is an object of the present invention to provide a structure of a liquid crystal display device with low mounting cost.

〔課題を解決するための手段〕[Means to solve the problem]

上記目的を達成するため本発明の共通電極は、透明導電
膜と、この透明導電膜上に設けかつ接続穴を備える層間
絶縁膜を介して設ける上層金属との積層構造により構成
する。
In order to achieve the above object, the common electrode of the present invention has a laminated structure of a transparent conductive film and an upper metal layer provided on the transparent conductive film with an interlayer insulating film provided with connection holes interposed therebetween.

〔実施例〕〔Example〕

以下本発明の実施例を第1図を用いて説明する。 Embodiments of the present invention will be described below with reference to FIG.

第1図(a)は本発明における液晶表示装置の構成を示
す平面図、第1図Tb)は第1図(a)におけるA−A
断面を示す断面図である。なお第1図は複数の半導体集
積回路を基板に実装する液晶表示装置のうち、1つの半
導体集積回路実装領域を示す。
FIG. 1(a) is a plan view showing the configuration of a liquid crystal display device according to the present invention, and FIG.
It is a sectional view showing a cross section. Note that FIG. 1 shows one semiconductor integrated circuit mounting area of a liquid crystal display device in which a plurality of semiconductor integrated circuits are mounted on a substrate.

共通電極16は、透明導電膜18と、層間絶縁膜20の
接続穴22を介して設ける上層配線24とから構成する
。絶縁性を有する層間絶縁膜20を介瞥て積層した透明
導電膜18と上層配線24とが上下で重なった領域は、
透明導電膜18と上層配線24とは、同一平面パターン
で構成する。
The common electrode 16 is composed of a transparent conductive film 18 and an upper layer wiring 24 provided through a connection hole 22 in an interlayer insulating film 20. The area where the transparent conductive film 18 and the upper layer wiring 24, which are laminated through the interlayer insulating film 20 having insulating properties, overlap vertically is
The transparent conductive film 18 and the upper layer wiring 24 are formed in the same plane pattern.

この共通電極16から半導体集積回路14へ、の電源お
よび制御信号の供給は、上層配線24により行なう。こ
の上層配線24と隣接する共通電極16下層の透明導電
膜18との交差領域は、絶縁性を有する層間絶縁膜20
が両者の間に形成されているため、透明導電膜18と上
層配線24との短絡は発生しない。
Power and control signals are supplied from the common electrode 16 to the semiconductor integrated circuit 14 through the upper layer wiring 24. The intersection area between the upper layer wiring 24 and the transparent conductive film 18 below the adjacent common electrode 16 is covered with an interlayer insulating film 20 having an insulating property.
is formed between the two, so that no short circuit occurs between the transparent conductive film 18 and the upper layer wiring 24.

半導体集積回路14に形成した突起電極26と、共通電
極16および出力電極64との接続領域は、透明導電膜
181層で構成する。
The connection region between the protruding electrode 26 formed on the semiconductor integrated circuit 14 and the common electrode 16 and output electrode 64 is made of a transparent conductive film 181 layer.

電源および制御信号は共通電極16から上層の上層配線
24を介して半導体集積回路14に入力し、この半導体
集積回路14は画像を表示するための信号を出力電極3
4に出力する。
Power and control signals are input from the common electrode 16 to the semiconductor integrated circuit 14 via the upper layer wiring 24, and the semiconductor integrated circuit 14 sends signals for displaying an image to the output electrode 3.
Output to 4.

次に以上の構造を形成するための製造方法を、第1図を
用いて説明する。
Next, a manufacturing method for forming the above structure will be explained with reference to FIG.

まず基板12上の全面に透明導電膜18として、酸化イ
ンジウA (In2O5)と酸化スズ(Sn02)との
固溶体いわゆるITOを、真空蒸着法あるいはスパッタ
リング法により膜厚200nm程度形成する。その後フ
ォトエツチングにより透明導電膜18をエツチングし、
透明導電膜18からなる、一部は第1図(a)の破線で
示す、共通電極16下層膜を形成する。この透明導電膜
18の形成工程は、液晶表示装置の画素電極形成と同時
に行なう。透明導電膜18としては上記のITO以外に
も、酸化スズに酸化アンチモンを添加したもの、あるい
は酸化亜鉛に酸化アルミニウムを添加したものなど可視
域で透過率が高く、導電性の良い材料であれば適用でき
る。
First, a solid solution of indium oxide A (In2O5) and tin oxide (Sn02), so-called ITO, is formed as a transparent conductive film 18 on the entire surface of the substrate 12 to a thickness of about 200 nm by vacuum evaporation or sputtering. After that, the transparent conductive film 18 is etched by photoetching,
A lower layer film of the common electrode 16 is formed of the transparent conductive film 18, a part of which is indicated by the broken line in FIG. 1(a). This step of forming the transparent conductive film 18 is performed simultaneously with the formation of pixel electrodes of the liquid crystal display device. In addition to the above-mentioned ITO, the transparent conductive film 18 may be made of a material with high transmittance in the visible range and good conductivity, such as tin oxide with antimony oxide added, or zinc oxide with aluminum oxide added. Applicable.

次に層間絶縁膜20として、全面にプラズマ化学気相成
長法により窒化シリコン膜(SixNy)を膜厚400
nm程度形成する。その後フォトエツチングにより、こ
の層間絶縁膜20をエツチングして接続穴22を形成す
る。層間絶縁膜20としては、窒化シリコン膜以外にも
酸化シリコン膜などの無機絶縁膜、あるいはポリイミド
樹脂などの有機絶縁膜が適用できる。この層間絶縁膜2
0は、液晶を時分割駆動するパッシブマトリクス方式で
は液晶配向を行なうための配向膜で兼用することが可能
で、さらに薄膜トランジスタや非線形素子を各画素に配
置しこれらの能動素子で液晶を駆動するアクティブマト
リクス方式では半導体膜と配線との間に設ける層間膜で
兼用することができる。
Next, as an interlayer insulating film 20, a silicon nitride film (SixNy) is deposited to a thickness of 400 mm over the entire surface by plasma chemical vapor deposition.
Form about nm. Thereafter, this interlayer insulating film 20 is etched by photo-etching to form a connection hole 22. As the interlayer insulating film 20, in addition to the silicon nitride film, an inorganic insulating film such as a silicon oxide film, or an organic insulating film such as a polyimide resin can be used. This interlayer insulating film 2
In the passive matrix method, which drives the liquid crystal in a time-division manner, 0 can also be used as an alignment film for aligning the liquid crystal, and in the active matrix method, in which thin film transistors and nonlinear elements are placed in each pixel, and these active elements drive the liquid crystal. In the matrix method, an interlayer film provided between the semiconductor film and the wiring can also be used.

次に上層金属24として、アルミニウムを全面に500
nm程度の厚さで真空蒸着法あるいはスパッタリング法
にて形成し、フォトエツチングを行ない共通電極16の
上層膜としての上層金属24を形成する。上層金属24
としては、アルミニウムなどの金属膜以外にも、モリブ
デンなどの高融点金属、もしくはこれらの硅化物で構成
しても良い。この上層金属24は、アクティブマトリク
ス方式では配線で兼用することができる。
Next, as the upper layer metal 24, 500% aluminum is applied to the entire surface.
The metal layer 24 is formed to a thickness of approximately nm by vacuum evaporation or sputtering, and photoetched to form an upper layer metal 24 as an upper layer film of the common electrode 16. Upper layer metal 24
In addition to a metal film such as aluminum, the film may be made of a high melting point metal such as molybdenum, or a silicide thereof. This upper layer metal 24 can also be used as wiring in the active matrix method.

基板12と半導体集積回路14との接続は、導電性接着
剤を用いる方法、あるいは突起電極26を軟質金属で構
成し熱硬化型または紫外線硬化型でかつ硬化後収縮応力
が発生する絶縁性接着剤を用いる方法で行なうことがで
きる。
The substrate 12 and the semiconductor integrated circuit 14 can be connected by using a conductive adhesive, or by using an insulating adhesive in which the protruding electrodes 26 are made of a soft metal and which is thermosetting or ultraviolet curable and generates shrinkage stress after curing. This can be done using a method using

本発明における共通電極16は、層間絶縁膜20を介し
て透明導電膜18と上層金属24との2層構造になって
いる。したがって第2図に示す従来例のように可撓性フ
ィルム基板を用いることなく、共通電極16と半導体集
積回路14との接続を行なうことが可能となり、液晶表
示装置の小型化および実装コストを低くすることができ
る。
The common electrode 16 in the present invention has a two-layer structure including a transparent conductive film 18 and an upper metal layer 24 with an interlayer insulating film 20 interposed therebetween. Therefore, it is possible to connect the common electrode 16 and the semiconductor integrated circuit 14 without using a flexible film substrate as in the conventional example shown in FIG. can do.

さらに共通電極16は、層間絶縁膜20に一定間隔で形
成した複数の接続穴22を介して透明導電膜18と上層
金属24との2層構造になっている。したがって従来例
の透明導電膜上に直接ニッケル、銅などを被覆した構造
と比較して、本発明における共通電極16は断線が発生
しにくい構造となっている。
Further, the common electrode 16 has a two-layer structure including a transparent conductive film 18 and an upper metal layer 24 via a plurality of connection holes 22 formed at regular intervals in an interlayer insulating film 20. Therefore, compared to the conventional structure in which a transparent conductive film is directly coated with nickel, copper, etc., the common electrode 16 in the present invention has a structure in which disconnection is less likely to occur.

なお以上の説明においては、基板12と半導体集積回路
14との接続に導電性接着剤あるいは絶縁性接着剤を用
いる例で説明したが、上層金属24をニッケルや銅など
のハンダ付可能な金属で構成(、突起電極26をハンダ
で構成し、ハンダを溶融して基板12と半導体集積回路
14とを接続しても良い。あるいは上層金属24をアル
ミニウムや金などのワイヤーポンディング可能な金属で
構成し、基板12と半導体集積回路14とをボンディン
グワイヤにより接続しても良い。
Note that in the above explanation, an example is given in which a conductive adhesive or an insulating adhesive is used to connect the substrate 12 and the semiconductor integrated circuit 14, but the upper layer metal 24 may be made of a solderable metal such as nickel or copper. Structure (The protruding electrodes 26 may be made of solder and the solder may be melted to connect the substrate 12 and the semiconductor integrated circuit 14. Alternatively, the upper layer metal 24 may be made of a wire-bondable metal such as aluminum or gold. However, the substrate 12 and the semiconductor integrated circuit 14 may be connected by bonding wires.

さらに透明導電膜18と上層金属24とが上下で重なっ
ている領域は、同一平面パターンで構成した例で説明し
たが、この透明導電膜18と上層金属24とは、同一平
面パターンで構成しなくても良い。例えば上層金属24
のパターン幅を透明導電膜18パタ一ン幅より大きくす
れば、共通電極16の配線抵抗を低くすることができる
Furthermore, although the region where the transparent conductive film 18 and the upper metal layer 24 overlap in the vertical direction has been described as an example in which the area is configured with the same plane pattern, the transparent conductive film 18 and the upper layer metal 24 are not configured in the same plane pattern. It's okay. For example, the upper layer metal 24
By making the pattern width larger than the pattern width of the transparent conductive film 18, the wiring resistance of the common electrode 16 can be lowered.

〔発明の効果〕〔Effect of the invention〕

以上の説明で明らかなように、本発明の液晶表示装置の
構成により、液晶表示装置の小型化と実装コストを低く
することとが達成できる。
As is clear from the above description, the configuration of the liquid crystal display device of the present invention can achieve miniaturization of the liquid crystal display device and reduction in mounting cost.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(at、(b)は本発明における液晶表示装置の
構造を示し、第1図(a)は平面図、第1図(b)は第
1図(a) A −A断面を示す断面図、第2図は従来
例における液晶表示装置の構造を示す斜視図である。 14・・・・・・半導体集積回路、16・・・・・・共
通電極、18・・・・・・透明導電膜、20・・・・・
・層間絶縁膜、22・・・・・・接続穴、24・・・・
・・上層配線。 第1図 16、共it極 22、将梵穴 1ム ノ 18、透[1ノー尊1腺
FIGS. 1(a) and 1(b) show the structure of a liquid crystal display device according to the present invention, FIG. 1(a) is a plan view, and FIG. 1(b) is a cross section taken along line A-A in FIG. The cross-sectional view and FIG. 2 are perspective views showing the structure of a conventional liquid crystal display device. 14... Semiconductor integrated circuit, 16... Common electrode, 18... Transparent conductive film, 20...
・Interlayer insulating film, 22... Connection hole, 24...
...Upper layer wiring. Figure 1 16, common IT pole 22, Shobonana 1 Muno 18, Toru [1 Noson 1 gland]

Claims (1)

【特許請求の範囲】 複数の画素電極を備えた基板と、該基板上に実装する複
数の半導体集積回路と、前記基板上に形成し該半導体集
積回路へ電源および制御信号を供給するための共通電極
とを備える液晶表示装置において、 該共通電極は、前記基板上に設ける透明導電膜と、該透
明導電膜上に設けかつ接続穴を備える層間絶縁膜を介し
て設ける上層金属とからなることを特徴とする液晶表示
装置。
[Scope of Claims] A substrate having a plurality of pixel electrodes, a plurality of semiconductor integrated circuits mounted on the substrate, and a common substrate formed on the substrate for supplying power and control signals to the semiconductor integrated circuits. In the liquid crystal display device comprising an electrode, the common electrode includes a transparent conductive film provided on the substrate, and an upper layer metal provided on the transparent conductive film with an interlayer insulating film provided with a connection hole interposed therebetween. Characteristic liquid crystal display device.
JP8084989A 1989-03-31 1989-03-31 Liquid crystal display device Pending JPH02259728A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8084989A JPH02259728A (en) 1989-03-31 1989-03-31 Liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8084989A JPH02259728A (en) 1989-03-31 1989-03-31 Liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH02259728A true JPH02259728A (en) 1990-10-22

Family

ID=13729797

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8084989A Pending JPH02259728A (en) 1989-03-31 1989-03-31 Liquid crystal display device

Country Status (1)

Country Link
JP (1) JPH02259728A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5592199A (en) * 1993-01-27 1997-01-07 Sharp Kabushiki Kaisha Assembly structure of a flat type device including a panel having electrode terminals disposed on a peripheral portion thereof and method for assembling the same
JP2003255381A (en) * 2001-12-28 2003-09-10 Advanced Display Inc Image display device and manufacturing method therefor
JP2007065157A (en) * 2005-08-30 2007-03-15 Seiko Epson Corp Electrooptical device and electronic equipment equipped with same
JP2013231977A (en) * 2013-06-04 2013-11-14 Semiconductor Energy Lab Co Ltd Display device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5592199A (en) * 1993-01-27 1997-01-07 Sharp Kabushiki Kaisha Assembly structure of a flat type device including a panel having electrode terminals disposed on a peripheral portion thereof and method for assembling the same
US5670994A (en) * 1993-01-27 1997-09-23 Sharp Kabushiki Kaisha Assembly structure of a flat type device including a panel having electrode terminals disposed on a peripheral portion
JP2003255381A (en) * 2001-12-28 2003-09-10 Advanced Display Inc Image display device and manufacturing method therefor
US7286202B2 (en) 2001-12-28 2007-10-23 Kabushiki Kaisha Advanced Display Image display and manufacturing method thereof having particular internal wiring structure
JP2007065157A (en) * 2005-08-30 2007-03-15 Seiko Epson Corp Electrooptical device and electronic equipment equipped with same
JP2013231977A (en) * 2013-06-04 2013-11-14 Semiconductor Energy Lab Co Ltd Display device

Similar Documents

Publication Publication Date Title
US7477351B2 (en) Liquid crystal display
JP3406727B2 (en) Display device
JP2555987B2 (en) Active matrix substrate
JPH11305681A (en) Display device
JP3285168B2 (en) Display device mounting structure and mounting method
JP3081474B2 (en) Liquid crystal display
JP2002107753A (en) Liquid crystal display device
KR100695642B1 (en) Display device and method of manufacturing display device
JPH08264796A (en) Display device and its forming method
JPH02259728A (en) Liquid crystal display device
JP2000164874A (en) Thin-film transistor array substrate, manufacturing method for it, and liquid-crystal display device
KR100623974B1 (en) Liquid Crystal Display and Manufacturing Method Thereof
JPH03249735A (en) Manufacture of thin film transistor
KR20010056897A (en) a thin film transistor array panel for a liquid crystal display
JP2539360B2 (en) Liquid crystal display
JPH0261620A (en) Liquid crystal display device
JP2001117112A (en) Liquid crystal panel and production thereof
JP3023052B2 (en) Display substrate
JP2002236458A (en) Mounting structure for display device
JP2003007749A (en) Integrated circuit and display
JPH10253991A (en) Liquid crystal display device
JPH04104226A (en) Liquid crystal display device
JPH0256943A (en) Connection of electronic circuit element to circuit board, connecting structure and display using it
JP2000235195A (en) Active matrix substrate, process for producing active matrix substrate and process for producing liquid crystal display device
KR101027842B1 (en) Lcd and method for manufacturing lcd