JPH02254747A - Chip package - Google Patents

Abstract

PURPOSE:To make it possible to use all leads connected to the peripheral part of a semiconductor component as leads for signal use by a method wherein power electrodes and grounding electrode are formed on the central part of the surface of the semiconductor component and a supply of a power supply and the ground is performed through the electrodes. CONSTITUTION:A semiconductor chip 1 is installed facing the surface of a circuit to its lower side and power electrodes 4 provided closer to the central part of the circuit surface and pads 8 for power electrode use are connected to each other by soldering. Moreover, leads 3 are connected to pads 7 for lead use provided on the periphery of the circuit surface of the chip 1 by thermocompression bonding. In short, a signal is transmitted in the order of the chip 1 - bump electrodes 2 - the leads 3 - the pads 7 - internal wirings 10. Moreover, a power supply and the ground are connected with the chip - the electrodes 4 - the pads 8 - the wirings 10 and the power supply and the ground can be supplied to the chip 1. Thereby, all the leads can be used as leads for signal use.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a chip package for high-density packaging of semiconductor elements.

[Conventional technology]

Conventionally, as shown in FIG. 3, this type of chip package includes a semiconductor component 12 with leads 13 bonded to bumps 14 formed on the periphery, and a semiconductor component 12 to which the leads 13 are connected or a pad 15 for input/output. Board 17 with terminals 18
, a silicone rubber 16 for holding the semiconductor component 12 on the substrate 17, a sealing cap 19, and a heat sink 2°.
), and another conventional chip package is a flip chip in which bumps are formed on the entire semiconductor circuit surface.

[Problem to be solved by the invention]

In the conventional package as shown in FIG. 3, the semiconductor chip 12 is connected to the outside only through leads 13. Therefore, leads for power supply and ground supply are required, so 50 of the total number of leads are required for signal leads.
Only ~60% can be used.

In addition, since power and ground are supplied via leads, there is a problem that as the number of pins on chips increases and the leads become smaller, the resistance in the leads increases, making it difficult to supply power and ground. . In addition, in flip-chip type packages, cracks are likely to occur in the solder joints due to the difference in thermal expansion between the semiconductor chip and the substrate, and the bump formation area is limited to the center, which means that the number of terminals that can be formed is spaced apart. 0For example, if the formation possible area is 4 dragons and the formation pitch is grid points every 0.5m, the number of bumps is (
410,5) = only 64 digits.

This number is sufficient for power supply and ground supply, but is small for signal use.

[Means to solve the problem]

The chip package of the present invention includes a semiconductor chip in which bumps are formed on the periphery of a circuit surface and a power supply electrode for supplying power (including ground) is formed in the center of the circuit surface, and the semiconductor chip is connected to the power supply electrode. An electrode pad is provided at the center of the front surface, a lead pad is provided at the periphery of the front surface, an input/output terminal is provided at the back surface, and an interior connecting the input/output terminal with the electrode pad or the lead pad. It is configured to include a wiring board in which wiring is provided, and leads connected to the bumps and the lead bumps.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG. 2 is a plan view of a semiconductor chip 1 used in this embodiment.

In FIG. 1, a board 6 has a lead pad 7 around the front surface and a power supply electrode pad 8 on a convex portion in the center of the front surface, and an input/output terminal 1 for external connection on the back surface.
1 is formed. Internal wiring 10 is formed inside the substrate 6.

The semiconductor chip 1 is installed with the circuit side facing down (
(face down), the power supply electrode 4 provided near the center of the circuit surface and the power supply 1 scratching pad 8 are connected by soldering. The leads 3 are connected to lead pads 7 provided around the circuit surface of the semiconductor chip 1 by thermocompression bonding. In other words, the signal is from semiconductor chip 1 to bread 1
2 - lead 3 - lead pad 7 - internal wiring 10 are connected. In addition, the power supply and ground are connected to the semiconductor chip 1~
It is connected to the power supply electrode 4, power supply electrode pad 8, and internal wiring 10, so that power and ground can be supplied to the semiconductor chip 1. The power supply/ground supply route is almost the shortest route, and the resistance can be lower than that using leads.

Next, in FIG. 2, 112 leads 3° for signals are bonded to bumps 2 on the periphery of the semiconductor chip 1, so that it can be connected to the outside via leads 3. The central part of the surface of the semiconductor chip 1 is provided with a power source.
Sixty-four power supply electrodes 5 are formed for ground.

In a conventional package, out of 112 leads, 50 are required for power supply and ground supply, and only 62 leads can be used for signals.However, according to this embodiment, 112 leads are used for signals. leads become available.

Note that a heat sink 5 is bonded to the chip 1.

〔Effect of the invention〕

As explained above, the present invention forms power and ground electrodes in the center of the surface of a semiconductor component, and supplies power and ground from the electrodes, thereby connecting all leads connected to the periphery of the semiconductor component. It can be used for signals and has the effect of increasing the number of leads for signals. Further, there is an effect that the resistance of the ground/power supply section can be reduced.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing one embodiment of the present invention, and FIG.
FIG. 3 is a plan view of the semiconductor chip 1 used in the embodiment shown in the figure, and a cross-sectional view showing a conventional chip package. 1.12...Semiconductor parts, 2,14...Bumps, 3
, 13... Lead, 4... Power supply electrode, 8... Power supply electrode pad, 7, 15... Lead pad, 5, 2
゜... Heat sink, 6.17... Board, 1o...
・Internal wiring, 11.18...Input/output terminals.

Claims (1)

[Claims] a semiconductor chip in which bumps are formed on the periphery of a circuit surface and a power supply electrode for power supply is formed in the center of the circuit surface;
An electrode pad connected to the power supply electrode is provided at the center of the front surface, a lead pad is provided at the periphery of the front surface, and an input/output terminal is provided at the back surface, and the input/output terminal and the electrode pad or the lead are provided on the back surface. What is claimed is: 1. A chip package comprising: a wiring board having internal wiring provided therein for connecting to a lead pad; and a lead connected to the bump and the lead bump.