JPS5892230A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5892230A
JPS5892230A JP56191171A JP19117181A JPS5892230A JP S5892230 A JPS5892230 A JP S5892230A JP 56191171 A JP56191171 A JP 56191171A JP 19117181 A JP19117181 A JP 19117181A JP S5892230 A JPS5892230 A JP S5892230A
Authority
JP
Japan
Prior art keywords
semiconductor substrates
gold wires
substrates
pads
main
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56191171A
Other languages
Japanese (ja)
Other versions
JPS6347259B2 (en
Inventor
Hidenobu Ishikura
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56191171A priority Critical patent/JPS6347259B2/ja
Publication of JPS5892230A publication Critical patent/JPS5892230A/en
Publication of JPS6347259B2 publication Critical patent/JPS6347259B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16135Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
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    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48145Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/15165Monolayer substrate
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Abstract

PURPOSE:To permit high speed and to increase the reliability of a wiring connection and integration by a method wherein various kinds of semiconductor substrates having different sizes and projected electrodes formed on the main surfaces of integrated circuits are alternately and three dimensionally stacked by projected inter-electrode connections or connections between the rears of the semiconductor substrates. CONSTITUTION:In the drawing, the numeral 1 is a ceramic substrate, 3 are internal leads, 4 are metallic leads such as gold wires, Al wires, 6 are pads formed by locating at the circumference sections on the main surfaces of the semiconductor substrates, and 8 are projected electrodes formed on the main surfaces of the semiconductor substrates. Said substrates are the semiconductor substrates formed different sized memory circuits and the substrates are three diemensionally stacked on the ceramic substrate 1 in the order of larger semiconductor substrates. Electrical contacts are available for the integrated circuits on the semiconductor substrates through external and internal leads 3-gold wires 4 by electrical paths made by the combinations of interbumps 8-pads 6-gold wires 4 or interbumps 8-gold wires 4-pads 6 or the like.
JP56191171A 1981-11-27 1981-11-27 Expired JPS6347259B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56191171A JPS6347259B2 (en) 1981-11-27 1981-11-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56191171A JPS6347259B2 (en) 1981-11-27 1981-11-27

Publications (2)

Publication Number Publication Date
JPS5892230A true JPS5892230A (en) 1983-06-01
JPS6347259B2 JPS6347259B2 (en) 1988-09-21

Family

ID=16270076

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56191171A Expired JPS6347259B2 (en) 1981-11-27 1981-11-27

Country Status (1)

Country Link
JP (1) JPS6347259B2 (en)

Cited By (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6262451U (en) * 1985-10-04 1987-04-17
US5222014A (en) * 1992-03-02 1993-06-22 Motorola, Inc. Three-dimensional multi-chip pad array carrier
US5381039A (en) * 1993-02-01 1995-01-10 Motorola, Inc. Hermetic semiconductor device having jumper leads
US5485292A (en) * 1993-06-24 1996-01-16 North American Philips Corporation High voltage differential sensor having a capacitive attenuator
US5614766A (en) * 1991-09-30 1997-03-25 Rohm Co., Ltd. Semiconductor device with stacked alternate-facing chips
US5715144A (en) * 1994-12-30 1998-02-03 International Business Machines Corporation Multi-layer, multi-chip pyramid and circuit board structure
US5773896A (en) * 1996-02-19 1998-06-30 Matsushita Electric Industrial Co., Ltd. Semiconductor device having offsetchips
US5907903A (en) * 1996-05-24 1999-06-01 International Business Machines Corporation Multi-layer-multi-chip pyramid and circuit board structure and method of forming same
US6014586A (en) * 1995-11-20 2000-01-11 Pacesetter, Inc. Vertically integrated semiconductor package for an implantable medical device
US6172417B1 (en) * 1993-06-25 2001-01-09 Lucent Technologies Inc. Integrated semiconductor devices
US6365500B1 (en) * 1994-05-06 2002-04-02 Industrial Technology Research Institute Composite bump bonding
US6452279B2 (en) * 2000-07-14 2002-09-17 Mitsubishi Denki Kabushiki Kaisha Semiconductor device
US6590282B1 (en) * 2002-04-12 2003-07-08 Industrial Technology Research Institute Stacked semiconductor package formed on a substrate and method for fabrication
US6593647B2 (en) * 2001-06-15 2003-07-15 Oki Electric Industry Co., Ltd. Semiconductor device
US6646342B2 (en) 2001-03-14 2003-11-11 Matsushita Electric Industrial Co., Ltd. Semiconductor chip and multi-chip module
WO2004038798A2 (en) * 2002-10-22 2004-05-06 Unitive International Limited Stacked electronic structures including offset substrates
US6833626B2 (en) 2001-07-09 2004-12-21 Matsushita Electric Industrial. Co., Ltd. Multichip module structure
US6914259B2 (en) 2001-10-03 2005-07-05 Matsushita Electric Industrial Co., Ltd. Multi-chip module, semiconductor chip, and interchip connection test method for multi-chip module
US6975039B2 (en) 1998-08-20 2005-12-13 Oki Electric Industry Co., Ltd. Method of forming a ball grid array package
US7071546B2 (en) * 2002-01-16 2006-07-04 Alfred E. Mann Foundation For Scientific Research Space-saving packaging of electronic circuits
US7211884B1 (en) 2002-01-28 2007-05-01 Pacesetter, Inc. Implantable medical device construction using a flexible substrate
US8089142B2 (en) * 2002-02-13 2012-01-03 Micron Technology, Inc. Methods and apparatus for a stacked-die interposer
US8674494B2 (en) 2011-08-31 2014-03-18 Samsung Electronics Co., Ltd. Semiconductor package having supporting plate and method of forming the same
US8748229B2 (en) 2008-06-11 2014-06-10 Fujitsu Semiconductor Limited Manufacturing method including deformation of supporting board to accommodate semiconductor device

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5081475A (en) * 1973-11-19 1975-07-02
JPS51102566A (en) * 1975-03-07 1976-09-10 Suwa Seikosha Kk Shusekikairo
JPS5337383A (en) * 1976-09-20 1978-04-06 Hitachi Ltd Semiconductor integrated circuit
JPS56103455A (en) * 1980-01-22 1981-08-18 Fujitsu Ltd Semiconductor ic device
JPS56137665A (en) * 1980-03-31 1981-10-27 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor device
JPS56148857A (en) * 1980-04-18 1981-11-18 Mitsubishi Electric Corp Semiconductor device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5081475A (en) * 1973-11-19 1975-07-02
JPS51102566A (en) * 1975-03-07 1976-09-10 Suwa Seikosha Kk Shusekikairo
JPS5337383A (en) * 1976-09-20 1978-04-06 Hitachi Ltd Semiconductor integrated circuit
JPS56103455A (en) * 1980-01-22 1981-08-18 Fujitsu Ltd Semiconductor ic device
JPS56137665A (en) * 1980-03-31 1981-10-27 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor device
JPS56148857A (en) * 1980-04-18 1981-11-18 Mitsubishi Electric Corp Semiconductor device

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6262451U (en) * 1985-10-04 1987-04-17
US5614766A (en) * 1991-09-30 1997-03-25 Rohm Co., Ltd. Semiconductor device with stacked alternate-facing chips
US5222014A (en) * 1992-03-02 1993-06-22 Motorola, Inc. Three-dimensional multi-chip pad array carrier
US5381039A (en) * 1993-02-01 1995-01-10 Motorola, Inc. Hermetic semiconductor device having jumper leads
US5485292A (en) * 1993-06-24 1996-01-16 North American Philips Corporation High voltage differential sensor having a capacitive attenuator
US6172417B1 (en) * 1993-06-25 2001-01-09 Lucent Technologies Inc. Integrated semiconductor devices
US6365500B1 (en) * 1994-05-06 2002-04-02 Industrial Technology Research Institute Composite bump bonding
US5715144A (en) * 1994-12-30 1998-02-03 International Business Machines Corporation Multi-layer, multi-chip pyramid and circuit board structure
US6014586A (en) * 1995-11-20 2000-01-11 Pacesetter, Inc. Vertically integrated semiconductor package for an implantable medical device
US5773896A (en) * 1996-02-19 1998-06-30 Matsushita Electric Industrial Co., Ltd. Semiconductor device having offsetchips
US5907903A (en) * 1996-05-24 1999-06-01 International Business Machines Corporation Multi-layer-multi-chip pyramid and circuit board structure and method of forming same
US6975039B2 (en) 1998-08-20 2005-12-13 Oki Electric Industry Co., Ltd. Method of forming a ball grid array package
US6452279B2 (en) * 2000-07-14 2002-09-17 Mitsubishi Denki Kabushiki Kaisha Semiconductor device
US6646342B2 (en) 2001-03-14 2003-11-11 Matsushita Electric Industrial Co., Ltd. Semiconductor chip and multi-chip module
US6593647B2 (en) * 2001-06-15 2003-07-15 Oki Electric Industry Co., Ltd. Semiconductor device
US6833626B2 (en) 2001-07-09 2004-12-21 Matsushita Electric Industrial. Co., Ltd. Multichip module structure
US6914259B2 (en) 2001-10-03 2005-07-05 Matsushita Electric Industrial Co., Ltd. Multi-chip module, semiconductor chip, and interchip connection test method for multi-chip module
US7071546B2 (en) * 2002-01-16 2006-07-04 Alfred E. Mann Foundation For Scientific Research Space-saving packaging of electronic circuits
US7211884B1 (en) 2002-01-28 2007-05-01 Pacesetter, Inc. Implantable medical device construction using a flexible substrate
US8089142B2 (en) * 2002-02-13 2012-01-03 Micron Technology, Inc. Methods and apparatus for a stacked-die interposer
US8476117B2 (en) 2002-02-13 2013-07-02 Micron Technology, Inc. Methods and apparatus for a stacked-die interposer
US6590282B1 (en) * 2002-04-12 2003-07-08 Industrial Technology Research Institute Stacked semiconductor package formed on a substrate and method for fabrication
WO2004038798A3 (en) * 2002-10-22 2004-07-29 Unitive Int Ltd Stacked electronic structures including offset substrates
WO2004038798A2 (en) * 2002-10-22 2004-05-06 Unitive International Limited Stacked electronic structures including offset substrates
US7495326B2 (en) 2002-10-22 2009-02-24 Unitive International Limited Stacked electronic structures including offset substrates
US8748229B2 (en) 2008-06-11 2014-06-10 Fujitsu Semiconductor Limited Manufacturing method including deformation of supporting board to accommodate semiconductor device
US8674494B2 (en) 2011-08-31 2014-03-18 Samsung Electronics Co., Ltd. Semiconductor package having supporting plate and method of forming the same
US9412720B2 (en) 2011-08-31 2016-08-09 Samsung Electronics Co., Ltd. Semiconductor package having supporting plate and method of forming the same

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