JPS60138948A - Package for semiconductor device - Google Patents

Package for semiconductor device

Info

Publication number
JPS60138948A
JPS60138948A JP24687883A JP24687883A JPS60138948A JP S60138948 A JPS60138948 A JP S60138948A JP 24687883 A JP24687883 A JP 24687883A JP 24687883 A JP24687883 A JP 24687883A JP S60138948 A JPS60138948 A JP S60138948A
Authority
JP
Japan
Prior art keywords
pad
pin head
substrate
external terminals
pin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24687883A
Other languages
Japanese (ja)
Inventor
Masanobu Obara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP24687883A priority Critical patent/JPS60138948A/en
Publication of JPS60138948A publication Critical patent/JPS60138948A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PURPOSE:To enable to perform necessary wirings on the substrate up to the neighborhood of a pin head provided on the substrate by a method wherein a pad for the pen head is made as small as possible and an area of the junction between the pad and the pin head to be performed using a solder material is made smaller, and at the same time, an adhesion to act between the other parts of the pin head and the substrate is held to the same degree as an adhesion at a time when a pad of the conventional size was used, by using together a soldering material and a bonding agent. CONSTITUTION:A pad 4 is made smaller to a degree that the pad 4 can be satisfied electrically necessary conditions and the pad 4 is adhered to a pin head 5b using a soldering material 5c such as a silver solder, etc. Moreover, the other parts of the pin head 5b are adhered to a substrate 1 with a bonding agent 5d such as an epoxy and a polyimide, etc., having an insulating property. As a result, it becomes possible to perform wirings 7 on the package substrate 1 located on the lower side of the pin head 5b, thereby enabling to cope with an augmentation of external terminals to be accompanied by an integration of elements. Incidentally, the external terminals are limited to a pin 5. So long as the external terminals are fine strips in a lead type, etc., that will do, and also, the terminals are limited to configuration and material.
JP24687883A 1983-12-27 1983-12-27 Package for semiconductor device Pending JPS60138948A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24687883A JPS60138948A (en) 1983-12-27 1983-12-27 Package for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24687883A JPS60138948A (en) 1983-12-27 1983-12-27 Package for semiconductor device

Publications (1)

Publication Number Publication Date
JPS60138948A true JPS60138948A (en) 1985-07-23

Family

ID=17155078

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24687883A Pending JPS60138948A (en) 1983-12-27 1983-12-27 Package for semiconductor device

Country Status (1)

Country Link
JP (1) JPS60138948A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH022151A (en) * 1988-06-15 1990-01-08 Hitachi Ltd Package structure
WO1992020100A1 (en) * 1991-04-30 1992-11-12 International Business Machines Corporation A ceramic substrate having a protective coating and method of protection
EP0595752A1 (en) * 1992-10-30 1994-05-04 International Business Machines Corporation Interconnect structure having improved metallization
JP2009283815A (en) * 2008-05-26 2009-12-03 Kyocera Corp Substrate for mounting electronic component
JP2010109058A (en) * 2008-10-29 2010-05-13 Kyocera Corp Electronic component mounting board

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH022151A (en) * 1988-06-15 1990-01-08 Hitachi Ltd Package structure
WO1992020100A1 (en) * 1991-04-30 1992-11-12 International Business Machines Corporation A ceramic substrate having a protective coating and method of protection
JPH05136313A (en) * 1991-04-30 1993-06-01 Internatl Business Mach Corp <Ibm> Protective coating on ceramic board
EP0595752A1 (en) * 1992-10-30 1994-05-04 International Business Machines Corporation Interconnect structure having improved metallization
US5436412A (en) * 1992-10-30 1995-07-25 International Business Machines Corporation Interconnect structure having improved metallization
JP2009283815A (en) * 2008-05-26 2009-12-03 Kyocera Corp Substrate for mounting electronic component
JP2010109058A (en) * 2008-10-29 2010-05-13 Kyocera Corp Electronic component mounting board

Similar Documents

Publication Publication Date Title
JPH022655A (en) Cooling method/device for integrated circuit package
JPS59222954A (en) Laminated semiconductor integrated circuit and manufacture therrof
JPS61274333A (en) Semiconductor device
JPH03255657A (en) Hybrid integrated circuit device
JPS60138948A (en) Package for semiconductor device
JPS58154254A (en) Semiconductor device
JPS6352461A (en) Semiconductor device
JPS6384128A (en) Hybrid integrated circuit device
JPS6267828A (en) Mounting structure of semiconductor device
JPS6089951A (en) Manufacture of flip chip ic
JPS59215759A (en) Semiconductor device
JPH03196650A (en) Flip chip bonding
JPS5874048A (en) Semiconductor integrated circuit mounting system
JPS5943553A (en) Electrode structure for semiconductor element
JPS60225438A (en) Ic-mounting structure
JPS624353A (en) Face-to-face junction type integrated circuit device
JPH04102366A (en) Packaging structure of two-chip circuit
JPS60262434A (en) Semiconductor device
JPH03187227A (en) Semiconductor device
JPS6173341A (en) Semiconductor device
JPS59227148A (en) Lead frame for integrated circuit
JPS6021534A (en) Circuit mounting structure
JPH0382047A (en) Film carrier semicodcutor device
JPS60171747A (en) Semiconductor device
JPS59208865A (en) Semiconductor device and manufacture thereof