JPH02207360A - Information history storage - Google Patents

Abstract

PURPOSE:To simplify software and to shorten editing time by writing the state information of a common bus on plural information history memory circuits at every bus request origin on the common bus. CONSTITUTION:The state information of the common bus 10 is written on the plural information history memory circuits 12-14 while bus transfer between the bus request origin and a bus request destination is completed, and stored history information is read out at need. Thereby, in a system comprising of plural information processors connected to the common bus, the analysis of the history information can easily be performed when a fault is detected at the bus request origin or the bus request destination. Furthermore, since the edit of the history information stored in the history information memory circuit provided at every bus request origin can be simplified, labor saving can be attained, and profitability can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to storage of information history in a central processing unit;
In particular, it relates to a control method for collecting information history over the common bus.

(Prior Art) Conventionally, this type of information history storage device stores the state information of the common bus regardless of the bus requesting device of the common bus, and stores the state information of the common bus when any device on the common bus uses the common bus. Status information on the bus was stored in an information storage device.

(Problems to be Solved by the Invention) In the conventional information history storage device described above, when any device uses the common bus, the state information on the common bus is stored on the common bus regardless of the device using the common bus. status information was stored in the information storage device. For this reason, there are disadvantages in that software complexity and editing time increase for analysis of history information on the common bus or editing of history information in trouble handling.

An object of the present invention is to write common bus status information to a plurality of information history storage circuits for each bus request source on the common bus until the bus transfer between the bus request source and the bus request destination is completed. The information history storage device is constructed in such a way that the above-mentioned drawbacks can be removed by reading out the history information stored in the information history storage circuit in accordance with the information history storage circuit, thereby simplifying the software and shortening the editing time. It is about providing.

(Means for Solving the Problems) An information history storage device according to the present invention includes a plurality of information history storage circuits, an information history storage writing circuit, and an information history storage reading circuit.

The plurality of information history storage circuits are for storing state information of the common bus for each bus requesting device that acquires and uses the common bus.

The information history storage write circuit is for writing status information into the information history storage circuit.

The information history storage and readout circuit is for reading state information stored in the information history storage circuit.

(Example) Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a system using an information history storage device according to the present invention.

In FIG. 1, 1 and 2 are processors, 3 and 4 are main storage devices, 5 and 6 are input/output control devices, 7 is an information history storage device, and 8 is a common bus.

Processors 1, 2, main storage devices 3, 4, input/output control device 5
, 8 and the information history storage device 7 are each connected to a common bus 8.

FIG. 2 is a block diagram showing an embodiment of the information history storage device according to the present invention. In FIG. 2, 10 is a common bus, 11 is an information history storage device, 19 is a bus request source device,
23 is a bus request destination device, 12 to 14 are information history storage circuits, 17 is an information history storage write circuit, 18 is an information history storage address circuit, and 24 is an information history storage readout circuit.

The information history storage device 11 includes information history storage circuits 12 to 14, an information history storage write circuit IT, and an information history storage address circuit 18 and an information history storage readout circuit 24.

In FIG. 2, the information history storage device 11 is a common bus IO
The state information on the common bus 10 is given to the information history storage circuits 12 to 14 from the signal line 15. Further, status information indicating the bus request source of the common bus 10 is provided to the information history storage/writing circuit 17 from the signal line IB. When the information history storage/writing circuit 17 receives status information indicating the bus request source from the signal line 1B, it selects one of the information history storage circuits 12, 13, 14 corresponding to the bus request source.

This causes the write signal to reach 20.2 signal lines.

22, and address control signals are sent on signal lines 40 to 4.
2 to the information history storage address circuit 22.

The write signals on signal lines 20 to 22 are from the path request source equipment gt.
Until the bus transfer is completed between the common bus 10 and the bus request destination device 23, the state information sent from the common bus 10 to the signal line 15 continues to be transmitted for storage in the information history storage circuits 12 to 14.

The information history storage address circuit 17 inputs the signal lines 30 to 3 every time an address control signal on the signal lines 40 to 42 is received.
Add the address signals above 2.

Information history storage and reading circuit 24! d, information history storage circuits 12 to 1 specified by address signals on signal lines 30 to 32;
4, the information history signals of the storage area are read out onto the signal lines 40 to 42, and the specified information history signal is selected.

(Effects of the Invention) As explained above, the present invention stores common bus state information for each bus request source on the common bus until the bus transfer between the bus request source and the bus request destination is completed. By storing the history information stored in the information history storage circuit and reading it out as necessary, the bus request source can be , or when a failure is detected at a bus request destination, the history information of the common bus can be easily analyzed, and the history information stored in the information history storage circuit provided for each bus request source can be edited. Since the process is simplified, it is possible to save labor and improve economic efficiency.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a system using an information history storage device according to the present invention. FIG. 2 is a block diagram showing an embodiment of the information history storage device according to the present invention. 1.2 - Processor 5.4 Main memory 5.8 Input/output control device 7 Information history storage device 8.10 Common bus 11 Information history storage device 12.1M, 14...Information history storage circuit 11...Circuit including information history storage circuit 1B...Information layer M storage address circuit 1B+1-・Bus request source device 23...Bus request destination device 24@・・Information history storage and reading circuit 15.16.20-22, 26.28.30-32.4
0~42”-”” signal line

Claims (1)

[Claims] a plurality of information history storage circuits for storing status information of the common bus for each bus requesting device that acquires and uses the common bus; and an information history for writing the status information into the information history storage circuit. An information history storage device comprising: a storage write circuit; and an information history storage/readout circuit for reading out the status information stored in the information history storage circuit.