JPH02162727A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the disconnection from occurring and to form a stable wiring by a method wherein, in order to perform the initial heat treatment process after the electrode wiring pattern formation process using a metal.metallic silicide, a heat treatment is performed at specific temperature as the preceding process. CONSTITUTION:When the whole body is heat-treated at 500-800 deg.C as for the said preceding process, the disconnection due to the inner stress as well as the volumic contraction resultant from the progress of crystallization can be avoided. For example, oxide films 2 as element isolating oxide films are formed on a silicon substrate 4. Next, a gate oxide film 3 is formed on an element forming region; the whole surface is coated with molybdenum disilicide by sputtering process; a specific pattern is transferred using a resist and then the surface is etched to form a gate electrode 1. Successively, a source region 6 and a drain region 7 are respectively formed by ion- implantation. Later, the whole body is annealed in nitrogen gas atmosphere at 700 deg.C for 60sec with lamp annealing process. Next, an NSG film is deposited by atmospheric CVD process using SiCl4+O2 at evaporation temperature of 380-420 deg.C. The inner stress of silicon thin film reaches peak value at around the said evaporation temperature however no disconnection is caused since the inner stress is relieved by the heat treatment at 700 deg.C in the preceding process.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a semiconductor device using metal or metal silicide as an electrode wiring material.

BACKGROUND OF THE INVENTION In recent years, devices using metals or metal silicides as electrode wiring thin films have been developed.

FIG. 2 shows a cross-sectional view of an example in which such a material is used as a gate electrode wiring thin film of an MO3 field effect transistor.

First, L is formed on the silicon substrate 4 as an element isolation oxide film.
An oxide film 2 is formed using the OCO8 method. In the element formation area,
A gate oxide film 3 is formed, and a gate electrode 6 is formed using the metal or metal silicide described above as a gate electrode wiring thin film. Subsequently, a source region and a drain region 7.8 are respectively formed by ion implantation. Through the above steps, an MO8 field effect transistor is formed.

Problems to be Solved by the Invention In the conventional manufacturing method, during the first thermal step after forming the thin film electrode wiring, disconnection of the wiring occurs at the stepped portion due to thermal stress.

That is, the treatment temperature of this first heat step is 300°C to 5°C.
When the temperature is 00°C, the internal stress of the electrode thin film material increases, and when the temperature is 900°C or higher, the volume shrinks due to the progress of crystallization of the electrode thin film material, causing disconnection at the weakest interconnect step. .

Disconnection also occurs in metal wiring due to similar reasons.

An object of the present invention is to provide a method for manufacturing a semiconductor device that prevents disconnection of wiring and forms stable wiring when performing the first thermal process after forming an electrode wiring pattern using metal or metal silicide. It is something to do.

Means for Solving the Problems In order to solve this problem, the method for manufacturing a semiconductor device of the present invention has a method for manufacturing a semiconductor device in which, when performing a thermal process for cutting out the electrode wiring pattern forming process, which causes disconnection, As a pre-process, heat treatment is performed at 500°C to 800°C.

Effects According to this heat treatment at 500° C. to 800° C., the electrode wiring thin film of metal or metal silicide undergoes the following effects.

■ At the above heat treatment temperature, the internal stress of the thin film is 30
In the case of heat treatment from 0° C. to 500° C., the internal stress of the thin film deviates from the peak value and also becomes significantly small, so that the occurrence of wire breakage due to internal stress can be avoided.

■ The above heat treatment temperature corresponds to the transition state of the crystallization progress of the wiring material, so volumetric shrinkage accompanying the progress of crystallization that occurs at heat treatment temperatures of 900°C or higher does not occur, and the occurrence of wire breakage due to this is avoided. can.

Due to the above action, as a pre-process of the heat process, 500℃~8
Heat treatment at 00°C prevents wiring breakage,
Stable wiring can be formed.

Embodiment An embodiment of the method for manufacturing a semiconductor device according to the present invention will be described with reference to the process cross-sectional diagram of an MO8 field effect transistor shown in FIG.

Molybdenum disilicide (hereinafter abbreviated as MoSi2), which is one of metal silicides, is used as the gate electrode wiring thin film.

First, LO is formed on the silicon substrate 4 as an element isolation oxide film.
An oxide film 2 is formed using the CO8 method. The thickness of the element isolation oxide film 2 is 100OOA. A gate oxide film 3 is formed in the element formation region, and molybdenum disilicide (hereinafter abbreviated as MoSi2) is deposited by sputtering.
A gate electrode 1 is formed by transferring a desired pattern onto the film using a resist and etching it. The thickness of this gate electrode 1 is 4000A. Subsequently, source and drain regions 6 and 7 are formed by ion implantation.

After that, lamp annealing was performed at 700°C.

Anneal the silicide under nitrogen gas for 60 seconds.

Next, an NSC film, which is also a cap material for cap annealing of MoSix, which is a gate electrode, and is also an interlayer insulating film with the next layer wiring, is grown by normal pressure CVD. The thickness of this film is 4000A.

This atmospheric pressure CVD method is carried out under the following conditions.

Vapor deposition temperature 380-420°C Gas S i C (14+Ch Therefore, originally, the internal stress of the silicide thin film is
Since the peak value is reached near this vapor deposition temperature, wire breakage occurs. However, as a pre-process to this heat process, 700
Since internal stress is relaxed by heat treatment at ℃, wire breakage does not occur.

In addition, although the example dealt with the relaxation of the internal stress of silicide, by performing heat treatment as a step before this thermal process, it can also be used to alleviate the volumetric contraction of silicide, or the internal stress and volumetric contraction of a metal thin film. It goes without saying that it can be done.

Effects of the Invention According to the method for manufacturing a semiconductor device of the present invention, when performing a thermal process excluding the electrode wiring pattern forming process using metal or metal silicide, in the pre-process of the thermal process, 500 to 8
By performing heat treatment at 00° C., it is possible to control disconnection of the electrode wiring thin film at the step portion of the base.

[Brief explanation of the drawing]

FIG. 1 is a process cross-sectional view of an MO8 field effect transistor showing an embodiment of the semiconductor device manufacturing method of the present invention, and FIG. 2 is a cross-sectional view of an MO8 field effect transistor showing a conventional semiconductor device manufacturing method. 1... Gate electrode of molybdenum disilicide, 2... LOCO3 oxide film, 3... Gate oxide film, 4... Silicon substrate, 5...・
... NS metal, metal silicide gate electrode, S region, 8...Drain region. Name of agent: Patent attorney Shigetaka Awano G, 6... 7... Thor and 1 other person s---tvscl

Claims (1)

[Claims] A method for manufacturing a semiconductor device, which comprises performing preliminary heat treatment at 500° C. to 800° C. immediately after forming an electrode wiring pattern using metal or metal silicide.