JPH02148725A - Manufacture of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To avoid unnecessary etching of the conductive film of a contact part by a method wherein a first photoresist layer and a second photoresist layer are patterned by a photolithography method and a conductive film is subjected to dry etching and then to wet etching and the like. CONSTITUTION:A contact hole is formed in a silicon oxide film 11 on a semiconductor substrate 10 and an Al-Si system conductive film 13, a first resist layer 14, an intermediate layer 15 and a second resist layer 16 are built up. The resist layer 16 is patterned by a photolithography method and the layer 15 is etched and the resist 16 is removed. Then, if the layer 13 is subjected to dry etching by utilizing the layer 15, further the resist layer 14, as masks, protrusions 17 and 18 are formed on the side surface. If wet etching is performed in this state, the protrusions 17 and 18 are removed while the contact part is protected from being unnecessarily etched by the resist layer 14. If the resist layer 14 is removed after that, an excellent semiconductor integrated circuit whose conductive film in the contact part is not unnecessarily etched can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a semiconductor integrated circuit device that can remove protrusions caused by dry etching of an A& series conductive film.

2. Description of the Related Art As semiconductor devices become smaller and more highly integrated, it becomes difficult to form fine patterns.

For example, when a fine AQ-8i wiring pattern is formed by dry etching, polymers are generated on the etching mask material and the walls of the wiring pattern due to reactions in plasma. This polymer remains even after the etching mask material is removed and forms protrusions on the edges of the wiring pattern, so when an insulating film is later formed on the wiring pattern, the step coverage of the insulating film becomes poor. There's a problem.

Conventionally, in order to solve this problem, there is a technique of removing the protrusions by wet etching after removing the etching mask material.

The manufacturing method is shown in FIGS. 3(A) to (1).

First, a silicon oxide film 2 is formed on a semiconductor substrate 1, and then a resist pattern 3 is formed (FIG. 3(A)).
.

Next, using the resist pattern 3 as a mask material, a desired region of the silicon oxide film 2 is removed by etching, and then the resist pattern 3 is removed to form a contact hole for forming an electrode.

(Figure 3 (B)).

Next, Al-3i is deposited on the semiconductor substrate 1 and the silicon oxide film 2.
System conductive film 4. First layer resist5. Middle class 6. A second layer resist 7 is sequentially formed (FIG. 3(C)).

Next, a desired region of the second layer resist 7 is removed by photolithography to form a mask for processing a wiring pattern made of the Al-8i conductive film 4 (FIG. 3(D)).

Next, a desired region of the intermediate layer 6 is removed by etching using the second layer resist 7 as a mask material, and then the second layer resist 7 is removed (FIG. 3(E)).

Next, a desired region of the first resist layer 5 is removed by dry etching using the intermediate layer 6 as a mask material, and then the intermediate layer 6 is removed by dry etching. In this case, when dry etching the first layer resist, ions in the plasma sputter AlSi-based conductive @4, and Al-3i
The atoms of the conductive film 4 adhere to the side walls of the first resist layer 5, and when the intermediate layer 6 is dry etched, a polymer is formed on the side walls of the first resist layer 5 by plasma polymerization, resulting in protrusions. Object 8 occurs (Figure 3 (F))
.

Next, a desired region of the AzSi-based conductive film 4 is removed by dry etching using the first layer resist 5 as a mask material.

At this time, the first layer resist 5 and Ai! A polymer is produced by dry etching on the side wall portion of the -8i thread conductive film 4, forming protrusions 9 (FIG. 3(G)).

Next, the first layer resist 5 is removed using oxygen radicals (FIG. 3(H)).

Next, the protrusions 8 and 9 are removed by wet etching (FIG. 3(I)).

Problems that the invention aims to solve Problems with the above manufacturing method will be described below with reference to FIG.

In the above manufacturing method, when the protrusions 8 and 9 are removed by wet etching, the etching solution penetrates into the contact hole, resulting in poor film quality of the Al-3i conductive film 4 in the contact hole (the portions with a high etch rate are etched). Therefore, as shown in Fig. 3 (1), the wiring material Al-3i is removed in the contact hole.
The system conductive film 4 is disconnected, causing contact failure.

Means for Solving the Problems The present invention provides a step of applying a photoresist to an Al-based conductive film on a semiconductor substrate and forming a resist pattern by photolithography, a step of etching the Al-based conductive film, and a step of etching the Al-based conductive film on the semiconductor substrate. A method for manufacturing a semiconductor integrated circuit device, comprising the steps of immersing the resist pattern in an etching solution and removing the resist pattern.

Unnecessary etching of the Al-based conductive film in the working contact portion can be prevented, and contact failure can be prevented.

Embodiment An embodiment of the present invention will be described with reference to FIGS. 1(A) to 1(1).

First, a silicon oxide film 11 is formed on a semiconductor substrate 10, and then a resist pattern 12 is formed (see FIG.
A)).

Next, using the resist pattern 12 as a mask material, a desired region of the silicon oxide film 11 is removed by etching, and then the resist pattern 12 is removed to form a contact hole for forming an electrode (see FIG. 1(B)). ).

Next, At' is deposited on the semiconductor substrate 10 and the silicon oxide film 11.
-3i conductive film 13. First layer resist 14° Middle layer 15
．． Sequentially forming the second layer resist 16 (FIG. 1(C))
.

Next, a second layer resist 16 is formed using photolithography technology.
A desired region of is removed to form a mask for processing a wiring pattern made of the Al-8i conductive film 13 (FIG. 1(D)).

Next, a desired region of the intermediate layer 15 is removed by etching using the second layer resist 16 as a mask material, and then the second layer resist 16 is removed (FIG. 1(E)).

Next, a desired region of the first layer resist 14 is removed by dry etching using the intermediate layer 15 as a mask material, and then,
The intermediate layer 15 is removed by dry etching. In this case, when dry etching the first layer resist 14,
Ions in the plasma are At! When the -8i conductive film 13 is sputtered, the atoms of the A(-3i conductive film 13 are attached to the side walls of the first layer resist 14, and when the intermediate layer 15 is dry etched, the first layer is formed by plasma polymerization. The protrusions 1 are formed by forming a polymer on the side wall of the resist 14.
7 occurs (Figure 1 (F)).

Next, a desired region of the AlSi-based conductive film 13 is removed by dry etching using the first layer resist 14 as a mask material. At this time, a polymer is generated by dry etching on the side wall portions of the first layer resist 14 and the Al-8i conductive film 13, forming protrusions 18 (FIG. 1(G)).

Next, the protrusions 17 and 18 are removed by wet etching. If wet etching is performed with the first layer resist 14 remaining in the contact hole in this way, the At! The thin portion of the -3i conductive film 13 is protected from the etching solution by the first resist layer 14, and At! -8i-based conductive film 13 is not cut and contact failure is not caused (Fig. 1 (H))
).

Next, the first resist film 14 is removed by oxygen radicals (FIG. 1(I)) Next, another embodiment of the present invention will be described with reference to FIGS. 2(A) to 2(C).

As shown in FIG. 2A, after forming an A (1-3i conductive film 21) on a semiconductor substrate 19 and a silicon oxide film 20, a film with a thickness of 1100 mm with high wet etching resistance is applied thereon.
A high melting point metal film 22 of about n is formed. For example, if the etching solution is fluoronitric acid, molybdenum may be used. Further, instead of the high melting point metal, an insulating film such as a silicide of a high melting point metal, a silicon oxide film, a silicon nitride film, etc. may be used. If the Al-3i conductive film 21 is coated with the high melting point metal film 22 in this way, when the protrusions 23 and 24 are removed by wet etching in FIG. The thin (and poor quality) portions of the conductive layer 21 will not be etched.

Therefore, as shown in FIG. 2(C), the protrusions 23 and 24 can be removed without causing contact failure. Furthermore, the high melting point metal film 22 allows At!
Since the -8i conductive film 21 is mechanically reinforced, it also contributes to improving the reliability of wiring against electromigration, stress migration, hillocks, and the like.

Effects of the Invention Since the protrusions are removed by wet etching while leaving the first layer resist inside the contact hole, the quality of the Al-8i conductive film inside the contact hole is poor and the etch rate is high due to the first layer resist. parts are protected. Therefore, Al, which is the wiring material, is
The protrusion can be removed without disconnecting the -8i conductive film.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of the manufacturing process of a semiconductor integrated circuit showing one embodiment of the present invention, FIG. 2 is a sectional view of the manufacturing process of a semiconductor integrated circuit showing another embodiment of the invention, and FIG. 1 is a manufacturing process cross-sectional view for explaining a conventional technique. 10...Semiconductor substrate, 11...Silicon oxide film, 12...Resist pattern, 13...
...Al-8i-based conductive film, 14...1st
Layer resist, 15... Middle layer, 16...
・Second layer resist, 17...Protrusions, 18...
・・・Protrusion. Name of agent: Patent attorney Shigetaka Awano and one other person Figure W/4 Tumor diagram/X Figure

Claims (2)

[Claims] (1) A step of applying a photoresist to an Al-based conductive film on a semiconductor substrate and forming a resist pattern using photolithography technology, a step of etching the Al-based conductive film, a step of immersing the semiconductor substrate in an etching solution,
A method for manufacturing a semiconductor integrated circuit, comprising the step of removing the resist pattern. (2) a step of forming a high melting point metal film on an Al-based conductive film on a semiconductor substrate; a step of applying a photoresist to the high melting point metal film and forming a resist pattern by photolithography; A method for manufacturing a semiconductor integrated circuit, comprising the steps of etching the Al-based conductive film, removing the resist pattern, and immersing the semiconductor substrate in an etching solution.