JPH05315459A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To remove an organic attaching film and to prevent coverage defect and void generation by forming a through-hole in a layer insulation film and burying metal by changing conditions by the same RIE device. CONSTITUTION:After a contact hole 2' is formed in a layer insulation film 2 on a semiconductor substrate 1 and a metallic wiring 3 is deposited, an insulation film 4 is formed. A resist film 5 is formed and a through-hole 5' is made by photolithography technique. If a through-hole 4' is made by anisotropically etching the layer insulation film 4 by an RIE device using the resist 5 as a mask, an organic adhering film 7 is attached to a sidewall. Then, the resist film 5 and the organic adhering film 7 are ashed and removed by changing conditions inside the RIE device and a part of the metallic wiring 3 is made to adhere to the sidewall and buried by reverse sputtering. Furthermore, the metallic wiring 9 and a passivation film 10 are formed one by one and a two- layer wiring is acquired. The adheriang film can be removed inside the same RIE device, producing good effect on the countermeasure against particles.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a multi-layer wiring.

[0002]

2. Description of the Related Art In recent years, multilayer wiring structures of semiconductor devices have been particularly utilized and diversified, and the formation process of through-holes is an important point in the formation thereof. FIG. 2 shows an example of a conventional method for manufacturing a multilayer wiring structure. In FIG. 2, a first interlayer insulating film 2 is formed on a semiconductor substrate 1 and a contact hole 2'is formed therein.

A first metal wiring 3 made of a material such as aluminum is formed on the first interlayer insulating film 2.
Next, the second interlayer insulating film 4 is formed. Through holes 4'are formed in the second interlayer insulating film 4 by using a conventional photolithographic technique.

Next, as shown in FIG. 2b, a second layer metal wiring 9 is formed. Then, as shown in FIG. 2c, a third interlayer insulating film 10 may be provided to further form another metal wiring in the same manner, or a passivation film, that is, a surface protective film may be formed instead of the third interlayer insulating film. A two-layer wiring structure may be used.

[0005]

In the multilayer wiring forming method described above, a fine pattern is required more and more, and the reliable formation of fine through holes determines the quality of the product. The formation of fine through-holes, that is, through-holes with a high aspect ratio, is required, but etching of minute contacts requires a stronger anisotropy, and as a result, as shown in FIG. An organic film 7, which is a so-called deposit film, adheres to the side wall of the. When etching is continued, the adhesion film 7
Metal adheres to the top, which is one of the causes of defective through holes.

Therefore, it is necessary to remove the attached film 7, but this is very difficult. Further, since the through-hole 4'has a high aspect ratio, when the second-layer metal wiring 9 is vapor-deposited on it, it is inevitable that the wiring 9 will be discontinuous as shown in FIG. is there.
After that, when the second interlayer insulating film or the surface protective film 10 is formed, voids (holes) 11 may occur in the contact holes as shown in FIG. 2c.

Further, the adhered film and the reaction product generated during etching become particles, which causes a pattern defect of the wafer.

The present invention eliminates the above-mentioned problems of poor coverage of the organic adhesion film and the second layer metal wiring and the occurrence of voids in the second interlayer insulating film when the through hole having a high aspect ratio is formed by etching. Moreover, the purpose is to reduce particles.

[0009]

According to the present invention, in a method for manufacturing a multi-layer wiring, a second interlayer insulating film is first etched under the conditions of reactive ion etching (RIE) to form a through hole, and then an organic compound is formed in the same batch. The conductive adhesive film is removed, and the portion of the first metal wiring under the through hole is reattached to the contact hole to fill the through hole formed in the second interlayer insulating film.

[0010]

In the method of manufacturing a multi-layer wiring, when the through hole is formed in the second interlayer insulating film by the resist mask in the RIE apparatus, the adhesion film formed on the side wall of the through hole is removed together with the resist mask, and the Same process for filling the through hole with the portion of the first metal wiring thereunder
This is done by changing the parameters in the IE device.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. FIG. 1 is a cross-sectional view of a semiconductor device according to a method step of the present invention, in which parts not directly related to the present invention are omitted.

First, as shown in FIG. 1a, as in the conventional case, a first interlayer insulating film 2 is formed on a semiconductor substrate 1, a contact hole 2'is formed, and a first metal wiring 3 is deposited thereon. The interlayer insulating film 4 is formed. Next, the resist film 5
And a through hole 5'is formed using the photolithographic technique.

Next, with an RIE device, CF ₄ + CHF
A mixture of ₃ , CO ₂ and Ar is used as an etching gas, the pressure thereof is set to 1.7 Torr, the RF power is set to 700 W, and the first interlayer insulating film 4 is anisotropically etched using the resist 5 as a mask to form through holes 4 '. Are formed (FIG. 1b).
At this time, due to the anisotropic etching, the through holes 4 '
The organic adhesion film 7 is formed on the side wall of the above as described above.

Next, the resist film 5 and the organic adhesion film 7 are ashed and removed by changing the conditions in the RIE apparatus (FIG. 1c).
That is, the used gas is O ₂ , and the pressure is 1.0 To.
rr, RF power is set to 600 W to form an oxidizing plasma, and this is made to flow. As a result, a fine through hole 4'having a high aspect ratio is formed.

Next, the gas of the RIE apparatus is again set to argon, the pressure is set to 2 to 4 mm Torr, and the RF is set.
By setting the power to 250 W and attaching the portion of the first metal wiring 3 under the through hole 4'to the side wall of the through hole 4'by reverse sputtering, the through hole 4 '
Embedded with metal (FIG. 1d).

Next, the second metal wiring 9 is formed thereon (FIG. 1e). Then, the passivation film 10 is formed thereon to form a two-layer wiring (FIG. 1f). When metal wiring is further provided, a third interlayer insulating film is formed instead of the passivation film 10 and the above steps are repeated.

According to the present invention, the formation of the through hole in the second interlayer insulating film, the removal of the adhering layer, and the filling of the through hole with metal can be achieved by changing the conditions in the same RIE apparatus chamber. Through holes with high aspect ratio can be formed relatively easily. Further, in forming the passivation film 10, since there is no significant step in the metal wiring 9 on the through hole 4'in which the metal is embedded in advance, the occurrence of voids can be avoided.

[0018]

As described above, according to the manufacturing method of the present invention, the deposited film (polymer) after the etching of the interlayer insulating film is removed in the chamber of the same RIE apparatus. It is cleaned and effective against particles. Furthermore, the reverse sputtering phenomenon is used as it is to attach a part of the metal wiring to the side wall of the through hole, which has the effect of embedding, which improves the contact between the second layer wiring and the through hole and causes the occurrence of voids in the subsequent insulation film formation. Disappear. It seems that the processing time is long because a series of steps are performed in the same chamber, but the conventional method uses a different apparatus for each process, so that the present invention has a shorter TAT.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a semiconductor device formed by a method of the present invention at each forming step.

FIG. 2 is a cross-sectional view of a semiconductor device formed by a conventional method at each forming step.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2 First interlayer insulating film 2'Contact hole 3 First metal wiring 4 Second interlayer insulating film 4'Through hole 5 Resist film 7 Organic adhesion film 8 Embedded metal 9 Second metal wiring 10 Passivation film

Claims (3)

[Claims] 1. A first step of forming a first interlayer insulating film on a semiconductor substrate and forming a contact hole in the first interlayer insulating film; and a first metal on the first interlayer insulating film. A second step of depositing wiring, a third step of forming a first interlayer insulating film on the first metal wiring, and a resist film on the second interlayer insulating film and through holes Forming a through hole by anisotropically etching the second interlayer insulating film using the resist film as a mask, and removing the resist film by ashing. Step 6, and by etching the portion of the first metal wiring exposed in the through hole of the second interlayer insulating film and attaching the material to the sidewall of the through hole, the through hole is substantially made of a metal material. The seventh step of filling The method of manufacturing a semiconductor device characterized by having a eighth step of depositing a second metal interconnection on the serial second interlayer insulating film. 2. The method of manufacturing a semiconductor device according to claim 1, further comprising a ninth step of forming a surface protective film on the second metal wiring after the eighth step. 3. The fifth, sixth and seventh steps are carried out in one reactive ion etching apparatus in which a gas, its pressure and RF are used.
The method of manufacturing a semiconductor device according to claim 1, wherein the method is performed continuously by changing the power.