JPH0590198A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the integration degree of a semiconductor device by a method wherein in a method of forming a contact hole, the smallest machining dimension of the contact hole is set equal to that of a line pattern. CONSTITUTION:A resist 4 is applied to an insulating film 3, a line pattern 6, which includes an element part 2 and is extended in the formation direction of a metal wiring or in the direction perpendicular to the formation direction, is opened in the resist 4 and the film 3 is etched to half of the thickness (t) of the film 3 using the resist 4 as a mask to form a thinwalled part 7. Then, a resist 8 is applied to the film 3 including the part 7, a line pattern 9, which includes the element part 2 and is extended in the direction perpendicular to the opening direction of the pattern 6, is opened in the resist 8 and the film 3 is etched by the amount of the thickness of the part 7 using the resist 8 as a mask to form a contact hole 10.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing method, and more particularly, to a contact hole forming method.

With the recent increase in the degree of integration of semiconductor devices, not only the width of the line pattern but also the contact hole for connecting the underlying contact material such as the element portion or the wiring and the metal wiring formed on the insulating film are formed. It is required that the processing size can be reduced.

[0003]

2. Description of the Related Art A conventional contact hole is formed in the manufacture of a semiconductor device by forming a square contact hole pattern in a resist in a lithography (exposure) step and etching an insulating film using the resist as a mask in an etching step. It is done by. However, regarding the relationship between the minimum processing size and the resolution in the lithography process, when the resolution is increased as shown in FIG. 6, the minimum processing size of one side of the contact hole shown by the broken line is the minimum processing size of the width of the line pattern shown by the solid line. Will be much larger than Therefore, FIG.
As shown in FIG. 3, the wiring 30 can be miniaturized, but the contact hole 31 cannot be miniaturized, so that the contact 32 connected to the wiring 30 cannot be miniaturized.

Further, in the conventional manufacturing of semiconductor devices, in order to cope with the miniaturization of contact holes, bias sputtering, tungsten silicide (WSi) burying technology, etc. are used to improve the step coverage. FIG. 8 shows bias sputtering of aluminum (Al),
A part of the insulating film 35 formed on the semiconductor substrate 33 is etched to the element portion 34 to form a contact hole 36. Then, after the aluminum layer 37 is formed by sputtering to the position shown by the solid line, the aluminum layer 37 including the protrusion 37a in the contact hole is ground as shown by the broken line by using this aluminum layer 37 as a target, and the aluminum layer 37 is again sputtered. 37 is formed up to the position shown by the chain double-dashed line.

FIG. 9 shows tungsten silicide (WS
i) burying technique is shown. A tungsten layer 38 is formed in the contact hole 36 up to near the upper edge of the insulating film 35 by a CVD method (chemical vapor deposition method), and an aluminum layer 39 is formed on the insulating film 35 by sputtering. Is forming.

[0006]

However, in the conventional lithography process in the manufacture of semiconductor devices, the minimum processing dimension of one side of the contact hole cannot be made as fine as the minimum processing dimension of the width of the line pattern, which improves the degree of integration. Will be a problem above.

The present invention has been made in order to solve the above problems, and the minimum processing dimension of one side of the contact hole can be made equal to the minimum processing dimension of the width of the line pattern. The purpose is to be able to improve.

It is another object of the present invention to easily improve the step coverage of metal wiring without using bias sputtering or tungsten silicide burying technology.

[0009]

In order to achieve the above object, the present invention forms an insulating film above an underlying contact material such as an element portion or a wiring on the underlying contact material by etching the insulating film above the underlying contact material. In a method for manufacturing a semiconductor device in which a contact hole for connecting with a metal wiring is formed, after coating a resist on the insulating film, the resist includes a hole forming position and a metal wiring forming direction or A first step of forming a thin portion by opening a line pattern extending in a direction orthogonal to the forming direction and etching the insulating film to an intermediate portion in the thickness direction using this resist as a mask; After applying a resist on the insulating film,
A hole is formed by opening a line pattern including a hole forming position and extending in a direction orthogonal to the opening direction of the line pattern in the first step, and etching the insulating film by the thickness of the thin portion using the resist as a mask. And a second step of forming a contact hole at the formation position.

[0010]

Therefore, since the minimum processing dimension of one side of the contact hole becomes the minimum processing dimension of the width of the line pattern, the integration degree of the semiconductor device can be improved.

Further, since the thin portion is formed at the periphery of the contact hole, the step coverage of the metal wiring can be easily improved without using the bias sputtering or the tungsten silicide burying technique.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment embodying the present invention will now be described with reference to FIGS.
It will be described with reference to FIG. FIG. 1 shows a manufacturing process of one embodiment. As shown in FIG. 1A, the semiconductor substrate 1 has an element portion 2 (for example, MOS
A source region or a drain region of a transistor is formed, and an insulating film 3 is formed on the semiconductor substrate 1. First, after applying the resist 4 on the insulating film 3, a line pattern 6 including the hole forming position on the element portion 2 and extending in the forming direction of the aluminum wiring 5 (shown by a chain double-dashed line) as a metal wiring (see FIG. 2). (See) is opened in the resist 4.
Subsequently, as shown in FIG. 1B, the insulating film 3 is etched to a half (h / 2) of the thickness h using the resist 4 as a mask to form a thin portion 7 and the resist 4 is removed.

Next, as shown in FIG. 1C, the thin portion 7
After the resist 8 is coated on the insulating film 3 so as to include the line pattern 9 (see FIG. 2) including the hole forming position on the element portion 2 and extending in a direction orthogonal to the opening direction of the line pattern 6 (see FIG. 2). 3) is opened in the resist 8. Subsequently, as shown in FIG. 1D, the insulating film 3 is etched by the thickness h / 2 of the thin portion 7 using the resist 8 as a mask to form a contact hole 10 reaching the element portion 2. Remove 8. By the etching using the resist 8 as a mask, a thin portion 11 having a thickness of h / 2 is also formed as shown in FIG.

Then, as shown in FIG. 1E, the insulating film 3
An aluminum layer 1 formed on the above by a conventionally known sputtering.
After forming 2, the aluminum layer 12 is etched using a resist (not shown) having a line pattern as a mask to form an aluminum wiring 5 shown by a chain double-dashed line in FIG.

As described above, in this embodiment, the processing dimension (width) of the line patterns 6 and 9 becomes the processing dimension (length of one side) of the contact hole 10 as it is. Therefore, by setting the line patterns 6 and 9 as the minimum processing size, the minimum processing size of the contact hole 10 is set to the line patterns 6 and 9.
Therefore, the level of integration of the semiconductor device can be improved.

Further, the step coverage of the aluminum wiring 5 is improved as the thickness of the insulating film surrounding the contact hole is reduced, but in the present embodiment, half the thickness h of the insulating film 3 is formed around the contact hole 10. Since the thin portions 7 and 11 having the thickness h / 2 are formed, the step coverage of the aluminum wiring 5 can be easily improved without using the conventional bias sputtering or the tungsten silicide burying technique.

In this embodiment, a line orthogonal to the line pattern 6 is formed after the etching step of forming the thin portion 7 by using the resist 4 having the opening of the line pattern 6 extending in the forming direction of the aluminum wiring 5 (metal wiring) as a mask. Although the contact hole 10 is formed by performing the etching step using the resist 8 having the pattern 9 opened as a mask, the order of these two steps may be reversed.

Further, in the present embodiment, an etching process for forming the thin portion 7 using the resist 4 having the line pattern 6 opened as a mask, and an etching process using the resist 8 having the line pattern 9 orthogonal to the line pattern 6 as a mask. Although the contact hole 10 is formed by the two steps described above, another etching step may be added between these two steps. For example, after forming the thin portion 7 as shown in FIG. 1C, as shown in FIG. 5, etching is performed using a resist as a mask, which extends in the same direction as the line pattern 6 and has a line pattern shorter than the line pattern 6 opened. Is performed on the thin portion 7 to form the second thin portion 13. Then, a contact hole 10 is formed by etching using a resist 8 having a line pattern 9 which is orthogonal to the line pattern 6 as a mask. By doing so, the second thin portion 13 thinner than the thin portion 7 is formed on the periphery of the contact hole 10, so that the step coverage of the aluminum wiring 5 can be further improved.

Further, although the underlying contact material is the element portion 2 in this embodiment, the lower layer wiring may be used as the underlying contact material to form a contact hole.

[0020]

As described above in detail, according to the present invention, the minimum processing dimension of one side of the contact hole can be made equal to the minimum processing dimension of the width of the line pattern, and the integration degree of the semiconductor device is improved. In addition to the above, there is an excellent effect that the step coverage of the metal wiring can be easily improved without using the bias sputtering or the tungsten silicide burying technology.

[Brief description of drawings]

1A to 1E are cross-sectional views showing a manufacturing process of an embodiment.

FIG. 2 is a plan view of FIG. 1 (b).

FIG. 3 is a plan view of FIG. 1 (d).

FIG. 4 is a perspective view of FIG. 1 (d).

FIG. 5 is a sectional view showing another embodiment.

FIG. 6 is a diagram showing a relationship between a minimum processing dimension and resolution in exposure of a semiconductor device.

FIG. 7 is a plan view showing conventional wiring and contact holes.

FIG. 8 is a cross-sectional view showing a conventional wiring process.

FIG. 9 is a cross-sectional view showing a conventional wiring process.

[Explanation of symbols]

 2 Element part as base contact material 3 Insulating film 4, 8 Resist 5 Metal wiring 6, 9 Line pattern 7 Thin part 10 Contact hole

Claims (1)

[Claims] 1. A base contact material (2) for an insulating film (3) above a base contact material (2) such as an element portion or a wiring.
In a method for manufacturing a semiconductor device, a contact hole (10) for connecting a base contact material (2) and a metal wiring (5) formed on an insulating film (3) is formed by etching After applying the resist (4) on the insulating film (3), the resist (4) includes a hole forming position and a metal wiring (5).
The line pattern (6) extending in the forming direction or the direction orthogonal to the forming direction is opened, and the resist film (4) is used as a mask to etch the insulating film (3) to an intermediate portion in the thickness direction thereof to form a thin portion (7). ) Is formed, and after the resist (8) is applied on the insulating film (3) so as to include the thin portion (7), the resist (8) includes a hole forming position and The line pattern (9) extending in the direction orthogonal to the opening direction of the line pattern (6) in the step 1 is opened, and the resist film (8) is used as a mask to form the insulating film (3) in the thickness of the thin portion (7). And a second step of forming a contact hole (10) at a hole forming position by etching only a portion thereof.