JP3232773B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device by a lift-off method, for example, to a method of manufacturing a semiconductor device which facilitates formation of an electrode of a field effect transistor (FET) which is required to have fine and dimensional accuracy. .

[0002]

2. Description of the Related Art Conventionally, as a method for manufacturing a semiconductor device, a photoresist is coated on a substrate, an electrode portion is patterned, post-baked, and then etched, and then the patterned photoresist is removed from above. A manufacturing method in which an electrode is formed by vapor deposition is known. In this case, if the recess of the planar structure or the gate portion is shallow, the deposited metal 22 on the substrate 21 and the deposited metal 24 on the photoresist 23 are connected as shown in FIG. 2, making lift-off difficult. Therefore, in order to prevent this, as shown in FIG.
5, the electrode 24 is formed by vapor deposition from above the patterned photoresist 23, and is then treated with chlorobenzene to remove the photoresist 23 on the opening wall surface, retreat the wall surface, and widen the space below this. An eave 26 is formed on the photoresist 23 and the substrate 2 on the electrode 24 is formed.
There is also known a manufacturing method in which a recess groove 27 is formed in the substrate 1 to facilitate lift-off. There is also a method of manufacturing a semiconductor device by a process such as a multilayer photoresist.

[0003]

According to the above-described conventional method of manufacturing a semiconductor device in which the lower portion of the photoresist is widened and the eaves are formed on the upper portion, the lower surface of the photoresist is treated by chlorobenzene. The spacing is widening. Therefore, the width of the recess groove becomes wider than in the case where the gate length is the same as the case where the recess of the gate portion is shallow, and the source resistance of the FET element increases,
There is a problem of deteriorating electrical characteristics. Further, the method of forming the eaves on the upper portion has a problem that the dimensional accuracy of the distance between the opening at the upper portion of the photoresist and the photoresist at the lower portion is inferior to the method of not forming the eaves. A method of manufacturing a semiconductor device by a process such as a multi-layer photoresist has problems such as complicated processes and damage to a substrate.

The present invention has been made in view of the above-mentioned conventional problems, and has as its object to provide a method of manufacturing a semiconductor device which facilitates lift-off in forming an electrode on a substrate by a lift-off method. In particular, it is an object of the present invention to provide a method of manufacturing a semiconductor device which facilitates formation of a fine electrode requiring dimensional accuracy, such as formation of a gate electrode of an FET, and improves the yield.

[0005]

According to a method of manufacturing a semiconductor device according to the present invention, a semiconductor substrate is coated with a photoresist, an electrode is patterned, post-baked, etched, and then patterned. In a method for manufacturing a semiconductor device, comprising a step of forming an electrode on a resist, an electrode lower layer portion is formed on each of the etched photoresist and the substrate, and then heat is applied to the substrate to form the photoresist. The distance is widened, and the electrode lower layer portion is protruded in an eaves shape on the photoresist, and thereafter, an electrode is formed again on the electrode lower layer portion.

[0006]

As described above, in the method of manufacturing a semiconductor device according to the present invention, an electrode lower layer portion is formed on a patterned photoresist and a substrate, respectively, and then the photoresist is shrunk by applying heat to the substrate. Since the distance between the wall surfaces is increased by retreating the wall surface of the electrode, the electrode lower layer portion is protruded in an eaves shape on the photoresist, and then the electrode is formed again on the electrode lower layer portion.
The opening width of the portion of the photoresist in contact with the substrate matches the width of the electrode to be deposited later, and the width of the recess groove relative to the width of the electrode metal is smaller than that of the conventional chlorobenzene treatment technique. can do.

[0007]

An embodiment of the present invention will be described below with reference to the drawings. 1 (a) to 1 (e) are cross-sectional views at a main stage for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention. First, as shown in FIG. 1A, an electrode portion is patterned on a photoresist 3 coated on the surface of a GaAs semiconductor substrate 1 by known photolithography, and developed to form an opening 3a. Subsequently, after post-baking, as shown in FIG. 1B, etching is performed using the photoresist 3 as a mask to form a recess groove 6.
To form At this time, the width of the opening 3a in the portion of the photoresist 3 in contact with the substrate 1 matches the width of an electrode to be deposited later. Next, as shown in FIG. 1C, electrode lower layers 2 and 4 are deposited from above the etched substrate 1 and photoresist 3. Next, as shown by an arrow in FIG.
Is contracted and the wall surface of the photoresist 3 is retracted to increase the interval. At this time, the heating temperature of the substrate 1 is
The temperature must be higher than the post-bake temperature of the resist. For example, if the photoresist is AZ-1350 (a product of Hoechst), the substrate 1 is heated at 150 ° C. for 30 minutes. As a result, the electrode lower layer portions 2 and 4 which have already been deposited maintain the same shape, and the eaves 5
Will be formed. Further, as shown in FIG. 1E, the electrode upper layers 2a and 4a are again laminated on the electrode lower layers 2 and 4 by vapor deposition to form electrodes. In this case, the metal deposited earlier is an eave 5 on the resist 3.
, The lift-off is easy. Although the GaAs semiconductor substrate has been described in the above embodiment,
Other compound semiconductors, polycrystalline, amorphous, and semi-amorphous semiconductors may be used. Also, the example in which the electrodes are formed by vapor deposition has been described, but the method of forming the electrodes is not limited to vapor deposition, and the same applies to other methods such as sputtering. The temperature and the time for heating the photoresist and the semiconductor substrate are only examples, and other resists can be used or the shape of the resist can be changed even if the conditions for heating the semiconductor substrate are changed. Further, the present invention can be applied to a planar structure FET. In addition, it goes without saying that the present invention can be implemented by those skilled in the art by changing and modifying the scope without changing the gist.

[0008]

According to the method of manufacturing a semiconductor device according to the present invention, like the conventional technique of processing with chlorobenzene,
The width of the recess groove does not significantly increase with respect to the width of the electrode metal, so that fine processing can be performed and an electrode with extremely high dimensional accuracy can be formed. Further, without complicating the process, the lift-off property can be greatly improved without damaging the substrate, and the yield can be improved. In particular, when it is used for forming a gate electrode of a recessed FET, the source resistance does not increase due to the expansion of the recess width, so that it is very effective without deteriorating the electrical characteristics of the FET.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view at a main stage for describing a method of manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a sectional view showing a semiconductor device according to a conventional example.

FIG. 3 is a sectional view showing a semiconductor device according to another conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2, 4 Lower electrode part 2a, 4a Upper electrode part 3 Photoresist

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Claims (1)

(57) [Claims] 1. A method of manufacturing a semiconductor device, comprising: coating a photoresist on a semiconductor substrate, patterning an electrode, post-baking, etching, and forming an electrode on the patterned photoresist. In the method, an electrode lower layer portion is formed on each of the etched photoresist and the substrate, and then heat is applied to the substrate to widen the interval between the photoresists, and the electrode lower layer portion is overlaid on the photoresist. A method of manufacturing a semiconductor device, comprising forming an electrode on the electrode lower layer portion again.