JPH02128223A - Operational processor - Google Patents

Abstract

PURPOSE:To speed up operation by checking whether the number of operations or an operation result in a preceding instruction is continuously used in a subsequent instruction or not when a decimal operation instruction continues and using data held in an operational processor when used. CONSTITUTION:A memory 2, a basic instruction operation part 3 and a decimal instruction operation part 4 are connected through a bus 1, and the basic instruction operation part 3 and the decimal instruction operation part 4 are controlled by a controller 5. When the decimal operation instruction continues, operand information of the previous decimal instruction is compared with operand information of the decimal instruction in the middle of execution. When the compared result disagrees, operand data is read from the memory 2, and operand data held inside is used as operational processing data as it is when it agrees. The allignment time of data and a data type conversion time can be eliminated since data used in the previous instruction is used.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an arithmetic processing device, and more particularly to a decimal arithmetic processing device that performs data processing under microprogram control.

(Prior art) A conventional decimal arithmetic device reads an instruction string from memory, calculates the operand type, operand length, and operand address, and then reads the operand from memory based on this operand information. , the result value was written to memory again. In this way, in conventional arithmetic processing devices, even if decimal arithmetic instructions are consecutive, the same processing is performed without any particular awareness.

(Problems to be Solved by the Invention) In the conventional decimal arithmetic device described above, time is spent reading operand data from memory for each instruction.

However, in a program that actually processes decimal numbers,
It often happens that the operation result of a certain instruction during a sequence of consecutive instructions becomes the operand data of the next instruction. it is,
This occurs when one operand data in a high-level language is processed by multiple instructions because one statement in a high-level language (such as COBOL) is expanded into multiple machine languages.

Therefore, the result value of each instruction is held in the arithmetic unit, and if the operand data used in the next instruction is the operand value used in the immediately previous instruction, that data can be used.

The present invention stores the operand data used in each instruction in the arithmetic unit, if possible, instead of reading it from the memory, and uses the data used in the previous instruction, which takes up a large amount of the computation time. The present invention aims to provide an arithmetic processing device that eliminates read time data alignment time and data format conversion (pack type←→unback type) time.

(Means for Solving the Problems) An arithmetic processing device according to the present invention includes a memory for storing operand data, operand information of a previous decimal instruction when decimal operation instructions are consecutive, and a memory for storing operand data. A means for comparing operand information of a decimal instruction, and when the comparison result does not match, reads the operand data from the memory, and when a match occurs, causes the internally held operand data to be used as is as arithmetic processing data. and means.

(Example) Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of an arithmetic processing device according to the present invention. The memory 2, the basic instruction calculation unit 3, and the decimal instruction calculation unit 4 are connected via the bus 1, and the basic instruction calculation unit 3 and the decimal instruction calculation unit 4 are controlled by the control device 5.

The basic instruction calculation unit 3 fetches an instruction from the memory 2, and if the instruction is a basic instruction, the basic instruction calculation unit 3 performs the calculation, and if it is a decimal instruction, it is decoded and the decimal calculation unit 4 and causes the decimal calculation unit 4 to execute the calculation. A decimal instruction is composed of multiple words: a word of the instruction code part and a word of the information part of the data of operands 1 and 2. number, fetch 10
The decimal calculation unit 4 is notified.

The flip-flop 6 stores whether the previous instruction was a decimal instruction when the basic instruction calculation unit 3 fetches an instruction, determines the current instruction based on the set contents, and controls the control device 5 depending on whether decimal instructions are consecutive. Set/reset. In other words,
The flip-flop 6 determines whether the decimal instructions are consecutive. Register 7 stores information on operands 1.2 of the previous decimal instruction. Also, register 101
Information on operands 1 and 2 of the instruction being executed is stored in . 102 is a data register. Pointer 105 indicates a register that stores operand 1 data.

The operation of the control device 5 in the embodiment shown in FIG. 1 will be described below with reference to the flowchart in FIG. 2.

The control device 5 determines the set contents of F/F '6 (step S1), and when the set is in the OFF state, unconditionally calculates the operand address etc. based on this information and stores both operands 1 and 2 in the memory. The process moves on to read processing (step 38), and when the set content is on, the following processing is performed.

First, information such as the data length, address, and data type of operand 1 and operand 2 of the previous instruction stored in the register 7 (hereinafter abbreviated as information 1° and information 2′) is transferred to the arithmetic unit 4. Information 1° and 2° are sequentially compared with information 1 and information 2 stored in the register 101.

First compare information 1 and information 1' (step S2), and if the image information is equal, read only operand 2 from memory 2 using operand 1 data of the previous instruction stored in register 102 as operand 1 data. (step 510), and proceed to the calculation. If not equal to 0, the information 1
and information 2° (step S3), and if they are equal, the operand 2 data of the previous instruction stored in the register 102 as operand 1 is used, and the pointer 1 is
05 (step S4), and only operand 2 is read from memory 2 (step 5IO).

In step S3, if information 1 and information 2° are not equal, the process moves to a comparison between information 2 and previous instruction operand information 1'-2' (step 35.S6).

First, compare information 2 and information 1° (step S5),
If they are equal, the pointer 105 is switched (step S6
), at this time, operand 1 data of the previous instruction is used as operand 2, and only operand 1 is read from memory 2 (step 59). If they are not equal to 0, information 2 and information 2° are compared (step S7). , if information 2 and 2' are equal, then only the operand data of the previous instruction is read from memory 2 as operand 2. If they are not equal to 0, both operands 1 and 2 are read from memory 2 (step S8).

Store the data in the register 102 according to the above procedure,
The process ends, but at this time the control device 5 registers the register 10.
Information 1 and 2 stored in 1 are reset to register 7.

Thereafter, calculations are started on the data stored in the register 102.

(Effects of the Invention) As explained above, in the present invention, 10
When decimal operation instructions are consecutive, check whether the operation number or operation result value of the previous instruction will be used in the next instruction,
If used, data held in the arithmetic unit can be used to eliminate data alignment time and data type conversion time, thereby increasing the speed of computation.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of an arithmetic processing device according to the present invention, and FIG. 2 is a control flow chart showing an information comparison procedure. DESCRIPTION OF SYMBOLS 1... Bus, 2... Memory, 3... Basic instruction calculation part, 4... Decimal instruction calculation part, 5... Control device,
6: Flip-flop indicating that decimal instructions are consecutive; 7: Register storing information on operands 1 and 2 of the previous decimal instruction; 101: Information on operands 1 and 2 of the instruction being executed. A register storing 102...
- Data register, 105... A pointer indicating the register that stores operand 1 data.

Claims (1)

[Claims] A memory for storing operand data, a means for comparing operand information of a previous decimal instruction with operand information of a decimal instruction currently being executed when decimal operation instructions are consecutive, and a means for comparing the operand information of the decimal instruction currently being executed, and An arithmetic processing device characterized by comprising means for reading operand data from the memory when there is a mismatch, and for causing the internally held operand data to be used as is as arithmetic processing data when there is a match.