JPH02126665A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH02126665A JPH02126665A JP28056988A JP28056988A JPH02126665A JP H02126665 A JPH02126665 A JP H02126665A JP 28056988 A JP28056988 A JP 28056988A JP 28056988 A JP28056988 A JP 28056988A JP H02126665 A JPH02126665 A JP H02126665A
- Authority
- JP
- Japan
- Prior art keywords
- aluminum wiring
- layer
- wiring part
- oxide film
- electrode element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 10
- 239000004020 conductor Substances 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 43
- 229910052782 aluminium Inorganic materials 0.000 abstract description 43
- 239000000126 substance Substances 0.000 abstract 1
- 239000003990 capacitor Substances 0.000 description 9
- 239000003989 dielectric material Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】 ［産業上の利用分野コ 本発明は半導体集積回路における容量装置に関する。[Detailed description of the invention] [Industrial application fields] The present invention relates to a capacitor device in a semiconductor integrated circuit.
［従来の技術］
従来の半導体集積回路における容量装置のおのおのの電
極素子の構成は第４図のように一つの配線層または一つ
の導電体を用い、たがいに絶縁体または誘電体をはさみ
込む形で容量装置を構成していた。[Prior Art] The configuration of each electrode element of a capacitive device in a conventional semiconductor integrated circuit is as shown in FIG. 4, using one wiring layer or one conductor, with an insulator or dielectric sandwiched between them. constituted a capacity device.
［発明が解決しようとする課題］
しかし、前述の従来技術では、容量装置内の電極素子は
同一層で構成されているため大容量の容量装置の場合に
は容量装置内の電極面積が大きくなり、ＬＳＩチップ面
積を大きくするという問題点を有する。[Problems to be Solved by the Invention] However, in the above-mentioned conventional technology, since the electrode elements in the capacitor are composed of the same layer, the area of the electrodes in the capacitor increases in the case of a large capacitor. , has the problem of increasing the area of the LSI chip.
そこで本発明は従来の半導体装置の問題点を解決するた
めのもので、その目的とするところは大容量かつ面積の
小さい容量装置を提供するところにある。SUMMARY OF THE INVENTION The present invention is intended to solve the problems of conventional semiconductor devices, and its purpose is to provide a capacitor device with a large capacity and a small area.
［課題を解決するための手段］
本発明の半導体装置は、
α） 容量装置を１つ以上有する半導体集積回路におい
て、
ｂ） 前記容量装置内に第１の電極素子および第２の電
極素子を具備し、
Ｃ） 前記第１の電極素子および前記第２の電極素子の
おのおのが、少なくとも１つ以上の配線層または少なく
とも１つ以上の導電物質で構成されることを特徴とする
。[Means for Solving the Problems] A semiconductor device of the present invention includes α) a semiconductor integrated circuit having one or more capacitive devices, and b) a first electrode element and a second electrode element in the capacitive device. C) Each of the first electrode element and the second electrode element is composed of at least one wiring layer or at least one conductive material.
［実施例コ
以下に本発明の実施例を図面に基づいて説明する。第１
図は本発明の実施例を示す半導体装置の平面図であり、
第２図は第１図のＡ−８間の断面図である。第１図にお
いて実線１で囲まれる部分が容量装置であり、２が第１
の電極端子、３が第２の電極端子であり、４〜６は第１
層目のアルミニウム配線と第５層目のアルミニウム配譚
を接続するためのコンタクトホール、７〜９は第２層目
のアルミニウム配線と第４層目のアルミニウム配線を接
続するためのコンタクトホールでアリ、第２図において
、１０はロコス、１１は第１層目のアルミニウム配線、
１６は第２層目のアルミニウム配線、１５は第３層目の
アルミニウム配線、１７は第４層目のアルミニウム配線
であり、１２．１４．Ｉｓ、１Ｂは酸化膜である。[Embodiments] Examples of the present invention will be described below based on the drawings. 1st
The figure is a plan view of a semiconductor device showing an embodiment of the present invention,
FIG. 2 is a sectional view taken along line A-8 in FIG. 1. In Fig. 1, the part surrounded by solid line 1 is the capacitive device, and 2 is the first
, 3 is the second electrode terminal, and 4 to 6 are the first electrode terminal.
Contact holes 7 to 9 are for connecting the aluminum wiring in the second layer to the aluminum wiring in the fourth layer. Contact holes are used to connect the aluminum wiring in the second layer to the aluminum wiring in the fourth layer. , In Fig. 2, 10 is Locos, 11 is the first layer of aluminum wiring,
16 is the second layer of aluminum wiring, 15 is the third layer of aluminum wiring, 17 is the fourth layer of aluminum wiring, and 12.14. Is, 1B is an oxide film.
前記ロコス１０上に第１層目のアルミニウム配線１１を
形成し、その上に酸化膜１２を形成し、前記酸化膜１２
に前記第１層目のアルミニウム配線１１と第２層目のア
ルミニウム配線を接続するためのコンタクトホールな形
成し、その上に第２層目のアルミニウム配線１３を形成
し、その上に酸化膜１４を形成する。前記酸化膜１４に
前記第２層目のアルミニウム配線と第３層目のアルミニ
ウム配線を接続するためのコンタクトホールを形成し、
その上に第６層目のアルミニウム配線１５、そして酸化
膜１６を形成する。前記酸化膜１６に前記第５層目のア
ルミニウム配線と第４層目のアルミニウム配線を接続す
るためのコンタクトホールを形成し、その上に第４層目
のアルミニウム配線１７、そして酸化膜１８を形成する
。前記工程で第２図のような容量装置を構成することで
、前記第１層目めアルミニウム配線１１と前記第２層目
のアルミニウム配線１３間と前記第２層目のアルミニウ
ム配線１３と前記第３層目のアルミニウム配線１５間と
、前記第５層目のアルミニウム配線１５と前記アルミニ
ウム配線１７間に容量を構成することができる。A first layer of aluminum wiring 11 is formed on the LOCOS 10, an oxide film 12 is formed on it, and the oxide film 12
A contact hole is formed to connect the first layer aluminum wiring 11 and the second layer aluminum wiring, a second layer aluminum wiring 13 is formed thereon, and an oxide film 14 is formed thereon. form. forming a contact hole in the oxide film 14 for connecting the second layer aluminum wiring and the third layer aluminum wiring;
A sixth layer of aluminum wiring 15 and an oxide film 16 are formed thereon. A contact hole for connecting the fifth layer aluminum wiring and the fourth layer aluminum wiring is formed in the oxide film 16, and a fourth layer aluminum wiring 17 and an oxide film 18 are formed thereon. do. By configuring a capacitive device as shown in FIG. 2 in the above step, there is a gap between the first layer aluminum wiring 11 and the second layer aluminum wiring 13, and between the second layer aluminum wiring 13 and the second layer aluminum wiring 13. A capacitance can be formed between the third layer aluminum wiring 15 and between the fifth layer aluminum wiring 15 and the aluminum wiring 17.
以上の構成により容量装置の面積を大きくすることな（
、電極素子面積を太き（することができ大容量の容量装
置を作成することが可能である。With the above configuration, the area of the capacitor is not increased (
, it is possible to increase the area of the electrode element and create a capacitive device with a large capacity.
尚、本実施例によれば電極素子としてアルミニウム４層
配線を使用したが、ポリシリコン２層配線とアルミニウ
ム３層配線、また、拡散領域等も使用することも可能で
ある。その他、酸化膜のかわりに誘電物質を使用するこ
とでより大きな容量を得ることも可能である。According to this embodiment, a four-layer aluminum wiring is used as the electrode element, but it is also possible to use a two-layer polysilicon wiring, a three-layer aluminum wiring, a diffusion region, etc. Alternatively, larger capacitance can be obtained by using a dielectric material instead of an oxide film.
［発明の効果コ
本発明は以上説明したように、容量装置の電極素子を多
層化することにより、容量装置の面積をかえることなく
、電極素子面積を太き（することができ大容量の容量装
置を作成することができる[Effects of the Invention] As explained above, the present invention makes it possible to increase the area of the electrode element without changing the area of the capacitor by multilayering the electrode element of the capacitor. can create a device
第１図は実施例を示す平面図、第２図は第１図Ａ−Ｂ間
の断面図、第３図は従来の半導体装置の平面図、第４図
は第３図０−Ｄ間の断面図である０・・・・・・・・・
・・・容量装置
＋６ｔ７ｔ８，９・・・・・・コンタクトボール、２１
，７２・・・・・・電極端子
２１−・−・・嘲・・・ロコス
２２・・・・・・・・・第１層目のアルミニウム配線２
４・・・・・・・・・第２層目のアルミニウム配線・・
・・・・・・・第６層目のアルミニウム配線・・・・・
・・・・第４層目のアルミニウム配線４％１６，１８，
２５，２５・・・・・・・・・・・・・・・酸化膜
１．２
４．５
２．５
１０ 。
１１ 。
１５ 。
１２ 、１
局３
霞
第
阻FIG. 1 is a plan view showing the embodiment, FIG. 2 is a sectional view taken between A and B in FIG. 1, FIG. 3 is a plan view of a conventional semiconductor device, and FIG. 4 is a cross sectional view taken between FIG. Cross-sectional view 0...
・・・Capacitor device +6t7t8,9・・・Contact ball, 21
, 72...Electrode terminal 21-...Mockery...Locos 22......First layer aluminum wiring 2
4... Second layer aluminum wiring...
......6th layer aluminum wiring...
...4th layer aluminum wiring 4%16,18,
25, 25...... Oxide film 1.2 4.5 2.5 10. 11. 15. 12, 1st station 3 Kasumidaiban
Claims (1)
おいて、 ｂ）前記容量装置内に第１の電極素子および第２の電極
素子を具備し、 ｃ）前記第１の電極素子および前記第２の電極素子のお
のおのが、少なくとも１つ以上の配線層または少なくと
も１つ以上の導電物質で構成されることを特徴とする半
導体装置。(1) a) A semiconductor integrated circuit having one or more capacitive devices, b) a first electrode element and a second electrode element provided in the capacitive device, and c) the first electrode element and the second electrode element. 1. A semiconductor device, wherein each of the two electrode elements is composed of at least one wiring layer or at least one conductive material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28056988A JPH02126665A (en) | 1988-11-07 | 1988-11-07 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28056988A JPH02126665A (en) | 1988-11-07 | 1988-11-07 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02126665A true JPH02126665A (en) | 1990-05-15 |
Family
ID=17626858
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28056988A Pending JPH02126665A (en) | 1988-11-07 | 1988-11-07 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02126665A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10518054B2 (en) | 2014-08-25 | 2019-12-31 | Fisher & Paykel Healthcare Limited | Respiratory mask and related portions, components or sub-assemblies |
| US10828440B2 (en) | 2011-04-15 | 2020-11-10 | Fisher & Paykle Healthcare Limited | Interface comprising a rolling nasal bridge portion |
| US10946155B2 (en) | 2012-09-04 | 2021-03-16 | Fisher & Paykel Healthcare Limited | Valsalva mask |
| US11559647B2 (en) | 2011-04-15 | 2023-01-24 | Fisher & Paykel Healthcare Limited | Interface comprising a nasal sealing portion |
-
1988
- 1988-11-07 JP JP28056988A patent/JPH02126665A/en active Pending
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10842955B2 (en) | 2011-04-15 | 2020-11-24 | Fisher & Paykel Healthcare Limited | Interface comprising a rolling nasal bridge portion |
| US10828440B2 (en) | 2011-04-15 | 2020-11-10 | Fisher & Paykle Healthcare Limited | Interface comprising a rolling nasal bridge portion |
| US10828441B2 (en) | 2011-04-15 | 2020-11-10 | Fisher & Paykel Healthcare Limited | Interface comprising a rolling nasal bridge portion |
| US10828442B2 (en) | 2011-04-15 | 2020-11-10 | Fisher & Paykel Healthcare Limited | Interface comprising a rolling nasal bridge portion |
| US10828443B2 (en) | 2011-04-15 | 2020-11-10 | Fisher & Paykel Healthcare Limited | Interface comprising a rolling nasal bridge portion |
| US10835697B2 (en) | 2011-04-15 | 2020-11-17 | Fisher & Paykel Healthcare Limited | Interface comprising a rolling nasal bridge portion |
| US11065406B2 (en) | 2011-04-15 | 2021-07-20 | Fisher & Paykel Healthcare Limited | Interface comprising a rolling nasal bridge portion |
| US11559647B2 (en) | 2011-04-15 | 2023-01-24 | Fisher & Paykel Healthcare Limited | Interface comprising a nasal sealing portion |
| US11883591B2 (en) | 2011-04-15 | 2024-01-30 | Fisher & Paykel Healthcare Limited | Interface comprising a rolling nasal bridge portion |
| US10946155B2 (en) | 2012-09-04 | 2021-03-16 | Fisher & Paykel Healthcare Limited | Valsalva mask |
| US11065412B2 (en) | 2012-09-04 | 2021-07-20 | Fisher & Paykel Healthcare Limited | Valsalva mask |
| US10518054B2 (en) | 2014-08-25 | 2019-12-31 | Fisher & Paykel Healthcare Limited | Respiratory mask and related portions, components or sub-assemblies |
| US11305084B2 (en) | 2014-08-25 | 2022-04-19 | Fisher & Paykel Healthcare Limited | Respiratory mask and related portions, components or sub-assemblies |
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