JPS6211257A - Microwave integrated circuit - Google Patents
Microwave integrated circuitInfo
- Publication number
- JPS6211257A JPS6211257A JP60151071A JP15107185A JPS6211257A JP S6211257 A JPS6211257 A JP S6211257A JP 60151071 A JP60151071 A JP 60151071A JP 15107185 A JP15107185 A JP 15107185A JP S6211257 A JPS6211257 A JP S6211257A
- Authority
- JP
- Japan
- Prior art keywords
- capacitances
- integrated circuit
- films
- microwave integrated
- layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Waveguide Connection Structure (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、マイクロ波の増幅や発振などに用いることが
できるマイクロ波集積回路に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a microwave integrated circuit that can be used for microwave amplification, oscillation, etc.
従来の技術
近年、マイクロ波帯の利用の活発化に伴い、固体のマイ
クロ波モノリシック集積回路(MMrC)の開発がさか
/vに行われている。MMICは、能動素子と受動素子
とが同一基板上に(モノリシックに)作られているもの
である。受動素子の中で、キャパシタンスは、1層の絶
縁体を2層の金属薄膜ではさむ形式(MIM構造)が多
く用いられている。従来の技術としては、例えば、宮内
−洋、山本平−「通信用マイクロ波回路J(1981年
)電子通信学会、P2OのようなMrMキャパシタンス
がある。BACKGROUND OF THE INVENTION In recent years, as the use of microwave bands has become more active, solid-state microwave monolithic integrated circuits (MMrCs) have been rapidly developed. An MMIC has an active element and a passive element formed on the same substrate (monolithically). Among passive elements, a capacitance in which one layer of insulator is sandwiched between two layers of metal thin films (MIM structure) is often used. As a conventional technique, for example, MrM capacitance such as Hiroshi Miyauchi, Hiroshi Yamamoto, "Communication Microwave Circuit J (1981) Institute of Electronics and Communication Engineers, P2O" is available.
このような従来のマイクロ波集積回路について第3図を
用いて説明する。第3図は従来のマイクロ波集積回路の
MIMキャパシタンスの断面図で、1は誘電体基板、2
は金属薄膜、3は絶縁膜でおる。この回路は、金属薄膜
2の両端を電極とするキャパシスタンスして働く。Such a conventional microwave integrated circuit will be explained using FIG. 3. Figure 3 is a cross-sectional view of the MIM capacitance of a conventional microwave integrated circuit, where 1 is a dielectric substrate, 2
3 is a metal thin film, and 3 is an insulating film. This circuit functions as a capacitor with both ends of the metal thin film 2 serving as electrodes.
発明が解決しようとする間°照点
しかしながら上記従来の構成では、同一誘電体基板上に
、容量の大きな、複数個のキャパシタンスがある場合、
その面積は巨大になり、MMICの基板の面積がキャパ
シタンスの占める面積に大きく依存するという欠点を有
していた。However, in the above conventional configuration, when there are multiple capacitors with large capacitances on the same dielectric substrate,
The area becomes huge, and the area of the MMIC substrate largely depends on the area occupied by the capacitance.
本発明は上記従来の欠点を解消するもので、キャパシタ
ンスの面積を小さくすることのできるマイクロ波集積回
路を提供することを目的とする。The present invention solves the above-mentioned conventional drawbacks, and aims to provide a microwave integrated circuit in which the area of the capacitance can be reduced.
問題点を解決するための手段
上記問題点を解決するため、本発明のマイクロ波集積回
路は、誘電体基板上に、金属薄膜と絶縁膜とを交互に合
計5層以上形成したものである。Means for Solving the Problems In order to solve the above problems, the microwave integrated circuit of the present invention has a total of five or more layers of metal thin films and insulating films alternately formed on a dielectric substrate.
作用
上記構成によれば、2個以上あるいはそれに相当する容
量のキャパシタンスを1個分の面積で形成できる。Effect: According to the above configuration, two or more capacitances or equivalent capacitances can be formed in the area of one capacitance.
実施例
以下、本発明の一実施例を第1図〜第2図に基づいて説
明する。EXAMPLE Hereinafter, an example of the present invention will be described based on FIGS. 1 and 2.
第1図は本発明の第1の実施例におけるマイクロ波集積
回路のキャパシタンスの断面図で、11は誘電体基板、
12は金属薄膜、13は絶縁体であり、金属薄yA12
が3層に形成され、各層間に絶縁膜13が挟み込まれて
いる。FIG. 1 is a cross-sectional view of the capacitance of a microwave integrated circuit in a first embodiment of the present invention, in which 11 is a dielectric substrate;
12 is a metal thin film, 13 is an insulator, and metal thin yA12
is formed in three layers, and an insulating film 13 is sandwiched between each layer.
このキャパシタンスは、2個の独立したキャパシタンス
、または同一面積で容量が2倍のキャパシスタンスして
動作する。This capacitance operates as two independent capacitances, or a capacitance with twice the capacitance in the same area.
このように本実施例によれば、MIM構造を多層にする
ことによって、単位面積当りの静電容量の大きなキャパ
シタンスを得ることができる。As described above, according to this embodiment, by forming the MIM structure into multiple layers, it is possible to obtain a large capacitance per unit area.
なお、上記第1の実施例においては、金属薄膜12と絶
縁膜13との合計の層数を5層としたが、7層以上とし
てもよい。また基板を誘電体としたが、導体でなければ
何でもよい。Note that in the first embodiment, the total number of layers of the metal thin film 12 and the insulating film 13 is five, but it may be seven or more layers. Further, although the substrate is made of a dielectric material, any material may be used as long as it is not a conductor.
第2図(A)は本発明の第2の実施例におけるマイクロ
波集積回路の斜視図、同図(B)は同構成図で、21は
半絶縁性GaAs基板、22は厚さ1000人で大きさ
500x SonμrdのAuの蒸@薄膜、23はCv
Dにより形成シタ厚す2000AノS i 02膜、2
4は直径25μmのAuワイヤーである。第1層目及び
第3層目のAu蒸着薄膜22は同一基板上で他の回路素
子に接続されており、第2層目のAu蒸着薄膜はAuワ
イヤー24を通して接地されている。FIG. 2 (A) is a perspective view of a microwave integrated circuit according to a second embodiment of the present invention, and FIG. Size 500x Son μrd Au vapor @ thin film, 23 is Cv
2000A no Si02 film formed by D.
4 is an Au wire with a diameter of 25 μm. The first and third Au vapor deposited thin films 22 are connected to other circuit elements on the same substrate, and the second Au vapor deposited thin film is grounded through an Au wire 24.
この第2の実施例のマイクロ波集積回路は、2個の独立
したキャパシスタンスして動作する。The microwave integrated circuit of this second embodiment operates as two independent capacitors.
このように本実施例によれば、MIM構造を多層にする
ことによって、複数個のキャパシタンスを1個分の面積
で得ることができる。As described above, according to this embodiment, by forming the MIM structure into multiple layers, a plurality of capacitances can be obtained in an area corresponding to one capacitance.
上記第2の実施例においては、基板として半絶縁性Ga
As基板を用いたが、他の半導体基板などを用いてもよ
い。また金属i1膜としてAu、絶縁体として5tO2
を用いたが、他の金属や絶縁体を用いてもよいことは勿
論である。In the second embodiment, semi-insulating Ga is used as the substrate.
Although an As substrate was used, other semiconductor substrates may be used. In addition, Au is used as the metal i1 film, and 5tO2 is used as the insulator.
was used, but it goes without saying that other metals or insulators may be used.
発明の効果
以上述べたごとく本発明によれば、MIMIM造を多層
にすることによって、単位面積当りのキャパシタンス数
、あるいは静電容量を増やすことができ、その工業的利
用価値は極めて大である。Effects of the Invention As described above, according to the present invention, the number of capacitances or capacitance per unit area can be increased by making the MIMIM structure multi-layered, and its industrial utility value is extremely large.
第1図は本発明の一実施例におけるマイクロ波集積回路
の断面図、第2図(A)は本発明の第2の実施例におけ
るマイクロ波集積回路の斜視図、同図(B)は同構成図
、第3図は従来のマイクロ波集積回路の断面図である。
11・・・l!電休体板、12・・・金属薄膜、13・
・・絶縁膜、21・・・半絶縁性GaAs基板、22・
・・蒸着薄膜、23・・・S t Q2膜
代理人 森 本 義 弘
yJ−・・絶縁順
第3図
第2図
(A)FIG. 1 is a sectional view of a microwave integrated circuit according to an embodiment of the present invention, FIG. 2(A) is a perspective view of a microwave integrated circuit according to a second embodiment of the present invention, and FIG. The configuration diagram, FIG. 3, is a cross-sectional view of a conventional microwave integrated circuit. 11...l! Electric suspension body plate, 12...Metal thin film, 13.
... Insulating film, 21 ... Semi-insulating GaAs substrate, 22.
...Vapor deposited thin film, 23...S t Q2 film agent Yoshihiro MorimotoyJ-...Insulation order Fig. 3 Fig. 2 (A)
Claims (1)
5層以上形成したマイクロ波集積回路。 2、各金属薄膜が独立した電極を構成する特許請求の範
囲第1項記載のマイクロ波集積回路。 3、誘電体基板は半絶縁性GaAs基板であり、金属薄
膜は3層、絶縁膜は2層形成され、前記3層の金属薄膜
のうち2層目の金属薄膜はアースに接地され、2個のキ
ャパシスタンスとして動作する構成とした特許請求の範
囲第1項記載のマイクロ波集積回路。[Claims] 1. A microwave integrated circuit in which a total of five or more layers of metal thin films and insulating films are alternately formed on a dielectric substrate. 2. The microwave integrated circuit according to claim 1, wherein each metal thin film constitutes an independent electrode. 3. The dielectric substrate is a semi-insulating GaAs substrate, with three layers of metal thin films and two layers of insulating films, the second metal thin film of the three layers is grounded, and two The microwave integrated circuit according to claim 1, which is configured to operate as a capacitor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60151071A JPS6211257A (en) | 1985-07-08 | 1985-07-08 | Microwave integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60151071A JPS6211257A (en) | 1985-07-08 | 1985-07-08 | Microwave integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6211257A true JPS6211257A (en) | 1987-01-20 |
Family
ID=15510671
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60151071A Pending JPS6211257A (en) | 1985-07-08 | 1985-07-08 | Microwave integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6211257A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03225989A (en) * | 1990-01-31 | 1991-10-04 | Nippon Mektron Ltd | Flexible circuit board assembly and its manufacture |
EP0767363A3 (en) * | 1990-10-12 | 1997-07-02 | Kazuhiro Okada | A method of manufacturing a physical quantity detector utilizing changes in electrostatic capacitance |
US6282956B1 (en) | 1994-12-29 | 2001-09-04 | Kazuhiro Okada | Multi-axial angular velocity sensor |
US6314823B1 (en) | 1991-09-20 | 2001-11-13 | Kazuhiro Okada | Force detector and acceleration detector and method of manufacturing the same |
-
1985
- 1985-07-08 JP JP60151071A patent/JPS6211257A/en active Pending
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03225989A (en) * | 1990-01-31 | 1991-10-04 | Nippon Mektron Ltd | Flexible circuit board assembly and its manufacture |
EP0767363A3 (en) * | 1990-10-12 | 1997-07-02 | Kazuhiro Okada | A method of manufacturing a physical quantity detector utilizing changes in electrostatic capacitance |
US5811693A (en) * | 1990-10-12 | 1998-09-22 | Okada; Kazuhiro | Force detector and acceleration detector and method of manufacturing the same |
US6053057A (en) * | 1990-10-12 | 2000-04-25 | Okada; Kazuhiro | Force detector |
US6158291A (en) * | 1990-10-12 | 2000-12-12 | Okada; Kazuhiro | Force detector and acceleration detector |
US6477903B2 (en) | 1990-10-12 | 2002-11-12 | Kazuhiro Okada | Force detector and acceleration detector and method of manufacturing the same |
US6716253B2 (en) | 1990-10-12 | 2004-04-06 | Kazuhiro Okada | Force detector |
US7533582B2 (en) | 1990-10-12 | 2009-05-19 | Kazuhiro Okada | Force detector and acceleration detector and method of manufacturing the same |
US6314823B1 (en) | 1991-09-20 | 2001-11-13 | Kazuhiro Okada | Force detector and acceleration detector and method of manufacturing the same |
US6941810B2 (en) | 1993-03-30 | 2005-09-13 | Kazuhiro Okada | Angular velocity sensor |
US6282956B1 (en) | 1994-12-29 | 2001-09-04 | Kazuhiro Okada | Multi-axial angular velocity sensor |
US6865943B2 (en) | 1994-12-29 | 2005-03-15 | Kazuhiro Okada | Angular velocity sensor |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5978206A (en) | Stacked-fringe integrated circuit capacitors | |
US4382156A (en) | Multilayer bus bar fabrication technique | |
JPH02246261A (en) | Capacitor structure and monolithic voltage maltiplier | |
KR20010039886A (en) | Semiconductor device | |
JPS6211257A (en) | Microwave integrated circuit | |
US4663694A (en) | Chip capacitor | |
JPH02231755A (en) | Monolithic integrated circuit having mim capacitor | |
JPH03257855A (en) | Semiconductor device | |
JPH0247862A (en) | Semiconductor integrated circuit device | |
US4723194A (en) | Structure of capacitor circuit | |
JPS63108763A (en) | Semiconductor integrated circuit | |
JPS63310156A (en) | Integrated circuit | |
JPS62104067A (en) | Semiconductor device | |
JPH07202123A (en) | Semiconductor coupling capacitor | |
JPH02126665A (en) | Semiconductor device | |
JPH02296306A (en) | Inductor | |
JPH01184943A (en) | Manufacture of laminated capacitor for integrated circuit | |
JP3040808B2 (en) | Solid electrolytic capacitors | |
JPH0923066A (en) | Built-in capacitor substrate | |
JPH03138962A (en) | Semiconductor integrated circuit | |
JPS62266861A (en) | Thin film network of resistor and capacitance | |
JP2965638B2 (en) | Semiconductor device | |
JPS5930509Y2 (en) | Beam lead type MIM capacitor | |
JPH03257856A (en) | Semiconductor device | |
JPS60214551A (en) | Semiconductor capacitor |