JPH02113447U - - Google Patents
Info
- Publication number
- JPH02113447U JPH02113447U JP2280889U JP2280889U JPH02113447U JP H02113447 U JPH02113447 U JP H02113447U JP 2280889 U JP2280889 U JP 2280889U JP 2280889 U JP2280889 U JP 2280889U JP H02113447 U JPH02113447 U JP H02113447U
- Authority
- JP
- Japan
- Prior art keywords
- error
- counting
- pulses
- alarm
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Description
第１図は本考案の一実施例を示すブロツク構成
図である。
１……誤りパルス入力端子、２……フリツプフ
ロツプ、３……電源供給回路、４……タイマ、５
……計数回路、６……遅延回路、７……警報回路
、８……警報出力端子、９……遅延回路、１０…
…論理積回路、１１……パルス幅変換回路。
FIG. 1 is a block diagram showing an embodiment of the present invention. 1...Error pulse input terminal, 2...Flip-flop, 3...Power supply circuit, 4...Timer, 5
... Counting circuit, 6 ... Delay circuit, 7 ... Alarm circuit, 8 ... Alarm output terminal, 9 ... Delay circuit, 10 ...
...AND circuit, 11...Pulse width conversion circuit.
Claims (1)
パルス数がある設定値を越えると警報を発出する
誤り検出回路において、前記一定周期を決定する
タイマと、誤りパルスを計数する手段と、前記誤
りパルス計数手段の出力と設定値を比較し警報を
発生する手段と、入力誤りパルスによつて前記タ
イムと誤りパルスを計数する手段の電源を起動す
る手段と、警報出力停止時に前記タイマと誤りパ
ルスを計数する手段への電源供給を停止させる手
段とを有することを特徴とした誤り検出回路。 An error detection circuit that measures the number of input error pulses and issues an alarm when the number of input pulses within a fixed cycle exceeds a certain set value, comprising: a timer for determining the fixed cycle; a means for counting error pulses; means for comparing the output of the pulse counting means with a set value and generating an alarm; means for starting the power supply for the means for counting the time and error pulses according to the input error pulse; and the timer and the error pulse when the alarm output is stopped. An error detection circuit comprising means for stopping power supply to the means for counting.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2280889U JPH02113447U (en) | 1989-02-28 | 1989-02-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2280889U JPH02113447U (en) | 1989-02-28 | 1989-02-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02113447U true JPH02113447U (en) | 1990-09-11 |
Family
ID=31241251
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2280889U Pending JPH02113447U (en) | 1989-02-28 | 1989-02-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02113447U (en) |
-
1989
- 1989-02-28 JP JP2280889U patent/JPH02113447U/ja active Pending