JPH02110982A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPH02110982A
JPH02110982A JP1234152A JP23415289A JPH02110982A JP H02110982 A JPH02110982 A JP H02110982A JP 1234152 A JP1234152 A JP 1234152A JP 23415289 A JP23415289 A JP 23415289A JP H02110982 A JPH02110982 A JP H02110982A
Authority
JP
Japan
Prior art keywords
lead
plating
resin
lead frame
plating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1234152A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0553310B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Shingo Fujii
信吾 藤井
Hiroshi Kiriyama
桐山 博
Masami Hasegawa
雅己 長谷川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP1234152A priority Critical patent/JPH02110982A/ja
Publication of JPH02110982A publication Critical patent/JPH02110982A/ja
Publication of JPH0553310B2 publication Critical patent/JPH0553310B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Led Device Packages (AREA)
JP1234152A 1989-09-08 1989-09-08 半導体装置の製造方法 Granted JPH02110982A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1234152A JPH02110982A (ja) 1989-09-08 1989-09-08 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1234152A JPH02110982A (ja) 1989-09-08 1989-09-08 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPH02110982A true JPH02110982A (ja) 1990-04-24
JPH0553310B2 JPH0553310B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-08-09

Family

ID=16966465

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1234152A Granted JPH02110982A (ja) 1989-09-08 1989-09-08 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPH02110982A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04204323A (ja) * 1990-11-30 1992-07-24 Nippondenso Co Ltd 自発光指針を備えた車両用計器
JPH10163519A (ja) * 1996-10-01 1998-06-19 Toshiba Corp 半導体装置及び半導体装置製造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5571045A (en) * 1978-11-24 1980-05-28 Hitachi Ltd Lead frame
JPS574183A (en) * 1980-06-10 1982-01-09 Toshiba Corp Metallic thin strip for installing semiconductor light-emitting element

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5571045A (en) * 1978-11-24 1980-05-28 Hitachi Ltd Lead frame
JPS574183A (en) * 1980-06-10 1982-01-09 Toshiba Corp Metallic thin strip for installing semiconductor light-emitting element

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04204323A (ja) * 1990-11-30 1992-07-24 Nippondenso Co Ltd 自発光指針を備えた車両用計器
JPH10163519A (ja) * 1996-10-01 1998-06-19 Toshiba Corp 半導体装置及び半導体装置製造方法

Also Published As

Publication number Publication date
JPH0553310B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-08-09

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