JPH0193834U - - Google Patents

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Publication number
JPH0193834U
JPH0193834U JP18779087U JP18779087U JPH0193834U JP H0193834 U JPH0193834 U JP H0193834U JP 18779087 U JP18779087 U JP 18779087U JP 18779087 U JP18779087 U JP 18779087U JP H0193834 U JPH0193834 U JP H0193834U
Authority
JP
Japan
Prior art keywords
light emitting
emitting diode
phototransistor
resistance element
input terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18779087U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18779087U priority Critical patent/JPH0193834U/ja
Publication of JPH0193834U publication Critical patent/JPH0193834U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の回路構成図、第2
図は第1図の各部の電圧波形、第3図は従来の回
路構成図、第4図は第3図の各部の電圧波形であ
る。 1…電源電圧入力端子、2…出力端子、3,4
,6,8…抵抗素子、5…ホトカプラ、7…コン
デンサ、9…バツフア。
Figure 1 is a circuit configuration diagram of an embodiment of the present invention;
The figures show voltage waveforms at various parts in FIG. 1, FIG. 3 is a conventional circuit configuration diagram, and FIG. 4 shows voltage waveforms at various parts in FIG. 1...Power supply voltage input terminal, 2...Output terminal, 3, 4
, 6, 8...resistance element, 5...photocoupler, 7...capacitor, 9...buffer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電源入力端子と発光ダイオードのカソードを接
続する第1の抵抗素子と、前記発光ダイオードの
カソードを接地する第2の抵抗素子と、前記発光
ダイオードのアノードを接地するコンデンサと、
前記発光ダイオードのアノードと前記電源入力端
子を接続する第3の抵抗素子と、前記発光ダイオ
ードが発する光によつてベース電流が流れるエミ
ツタが接地されたホトトランジスタと、前記ホト
トランジスタのコレクタと前記電源入力端子とを
接続する第4の抵抗素子と前記ホトトランジスタ
のコレクタに接続され該ホトトランジスタのコレ
クタ電圧を論理信号に変換する論理回路を備え、
前記論理回路の出力をリセツト信号とすることを
特徴とするパワーオンリセツト回路。
a first resistance element that connects a power input terminal and a cathode of the light emitting diode, a second resistance element that grounds the cathode of the light emitting diode, and a capacitor that grounds the anode of the light emitting diode;
a third resistance element connecting the anode of the light emitting diode and the power input terminal; a phototransistor whose emitter is grounded, through which a base current flows due to light emitted by the light emitting diode; a collector of the phototransistor and the power supply; a fourth resistance element connected to the input terminal; and a logic circuit connected to the collector of the phototransistor and converting the collector voltage of the phototransistor into a logic signal;
A power-on reset circuit characterized in that the output of the logic circuit is used as a reset signal.
JP18779087U 1987-12-11 1987-12-11 Pending JPH0193834U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18779087U JPH0193834U (en) 1987-12-11 1987-12-11

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18779087U JPH0193834U (en) 1987-12-11 1987-12-11

Publications (1)

Publication Number Publication Date
JPH0193834U true JPH0193834U (en) 1989-06-20

Family

ID=31478921

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18779087U Pending JPH0193834U (en) 1987-12-11 1987-12-11

Country Status (1)

Country Link
JP (1) JPH0193834U (en)

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