JPS622333U - - Google Patents
Info
- Publication number
- JPS622333U JPS622333U JP9172685U JP9172685U JPS622333U JP S622333 U JPS622333 U JP S622333U JP 9172685 U JP9172685 U JP 9172685U JP 9172685 U JP9172685 U JP 9172685U JP S622333 U JPS622333 U JP S622333U
- Authority
- JP
- Japan
- Prior art keywords
- pnp transistor
- input terminal
- resistor
- diode
- base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Rectifiers (AREA)
Description
第１図は本考案の一実施例を示す回路図、第２
図は従来の一例を示す回路図である。
１，１３……入力端子、２，１４……入力端子
、３，１５……出力端子、４，５，１６……ダイ
オード、６，７，８，１７……ＰＮＰ型トランジ
スタ、９，１０，１１，１８……抵抗器、１２，
１９……電源接断信号入力端子。
Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
The figure is a circuit diagram showing an example of the conventional technology. 1,13...Input terminal, 2,14...Input terminal, 3,15...Output terminal, 4,5,16...Diode, 6,7,8,17...PNP type transistor, 9,10, 11, 18...Resistor, 12,
19...Power supply disconnection signal input terminal.
Claims (1)
おいて、ＡＣアダブタからの入力端子にアノード
を接続した第１のダイオードと、前記第１のダイ
オードのカソードにエミツタを接続しコレクタを
出力端子に接続した第１のＰＮＰ型トランジスタ
と、前記第１のＰＮＰ型トランジスタのベースと
電源接断信号入力端子との間に接続した第１の抵
抗と、電池からの入力端子にエミツタを接続しコ
レクタを前記出力端子に接続した第２のＰＮＰ型
トランジスタと、前記第２のＰＮＰ型トランジス
タのベースに接続した第２の抵抗と、前記第２の
抵抗の他端にエミツタを接続しコレクタをグラン
ドに接続した第３のＰＮＰ型トランジスタと、前
記ＡＣアダブタからの入力端子にアノードを接続
しカソードを前記第３のＰＮＰ型トランジスタの
ベースに接続した第２のダイオードと、前記第２
のダイオードのカソードと前記電源接断信号入力
端子との間に接続した第３の抵抗とを含むことを
特徴とする２電源自動切替回路。 In a circuit that uses two power supplies, an AC adapter and a battery, a first diode whose anode is connected to the input terminal from the AC adapter, and a second diode whose emitter is connected to the cathode of the first diode and whose collector is connected to the output terminal. A first PNP transistor, a first resistor connected between the base of the first PNP transistor and a power supply disconnection signal input terminal, an emitter connected to the input terminal from the battery, and a collector connected to the output terminal. a second PNP transistor connected to the base of the second PNP transistor, a second resistor connected to the base of the second PNP transistor, and a third resistor having an emitter connected to the other end of the second resistor and a collector connected to ground. a second diode having an anode connected to the input terminal from the AC adapter and a cathode connected to the base of the third PNP transistor;
and a third resistor connected between the cathode of the diode and the power supply disconnection signal input terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9172685U JPS622333U (en) | 1985-06-18 | 1985-06-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9172685U JPS622333U (en) | 1985-06-18 | 1985-06-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS622333U true JPS622333U (en) | 1987-01-08 |
Family
ID=30647869
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9172685U Pending JPS622333U (en) | 1985-06-18 | 1985-06-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS622333U (en) |
-
1985
- 1985-06-18 JP JP9172685U patent/JPS622333U/ja active Pending