JPH0193769U - - Google Patents
Info
- Publication number
- JPH0193769U JPH0193769U JP18851487U JP18851487U JPH0193769U JP H0193769 U JPH0193769 U JP H0193769U JP 18851487 U JP18851487 U JP 18851487U JP 18851487 U JP18851487 U JP 18851487U JP H0193769 U JPH0193769 U JP H0193769U
- Authority
- JP
- Japan
- Prior art keywords
- film
- layer
- substrate
- thick film
- thick
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 11
- 239000004020 conductor Substances 0.000 claims description 4
- 239000012671 ceramic insulating material Substances 0.000 claims description 2
- 239000012212 insulator Substances 0.000 claims description 2
- 239000000919 ceramic Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
Description
第1図A,Bはこの考案の第1の実施例の厚膜
基板を適用したハイブリツドICを示す図で、そ
のAは全体の縦断面図、BはAに示される要部I
を拡大して示す縦断面図である。第2図A,Bは
この考案の第2の実施例の厚膜基板を適用したハ
イブリツドICを示す図で、そのAは全体の縦断
面図、BはAに示される要部を拡大して示す縦
断面図である。第3図A,Bは従来の一般的な厚
膜基板を適用したハイブリツドICを示す図で、
そのAは全体の縦断面図、BはAに示される要部
を拡大して示す縦断面図である。第4図および
第5図はそれぞれ従来の厚膜基板における問題点
を説明するための厚膜基板の要部縦断面図である
。
1…セラミツク絶縁材からなる基板(アルミナ
基板)、2…導体膜、3…抵抗体膜、11…第1
層パターン膜、12…絶縁体膜(アルミナ膜)、
13…第2層パターン膜。
1A and 1B are diagrams showing a hybrid IC to which a thick film substrate of the first embodiment of this invention is applied, in which A is a longitudinal cross-sectional view of the whole, and B is a main part I shown in A.
FIG. Figures 2A and 2B are diagrams showing a hybrid IC to which a thick film substrate of the second embodiment of this invention is applied, in which A is an overall vertical sectional view and B is an enlarged view of the main parts shown in A. FIG. Figures 3A and 3B are diagrams showing a hybrid IC using a conventional general thick film substrate.
A is a longitudinal cross-sectional view of the whole, and B is a longitudinal cross-sectional view showing an enlarged main part shown in A. FIGS. 4 and 5 are longitudinal cross-sectional views of essential parts of a thick film substrate for explaining problems with conventional thick film substrates, respectively. DESCRIPTION OF SYMBOLS 1... Substrate made of ceramic insulating material (alumina substrate), 2... Conductor film, 3... Resistor film, 11... First
Layer pattern film, 12...insulator film (alumina film),
13...Second layer pattern film.
Claims (1)
よび抵抗体膜を所定の回路パターンで形成してな
る厚膜基板において、 基板上の第1層の厚膜が、導体膜と抵抗体膜と
のうちのいずれか一方を所定のパターンで形成し
た第1層パターン膜と、その第1層パターン膜の
間を埋めるように形成したセラミツク絶縁体膜と
によつて構成されて、その第1層の厚膜の表面が
実質的に平坦な面とされ、かつ第1層の厚膜上の
第2層として、導体膜と抵抗体膜とのうちの他方
からなる第2層パターン膜が形成されていること
を特徴とする厚膜基板。[Claims for Utility Model Registration] In a thick film substrate formed by forming a conductor film and a resistor film in a predetermined circuit pattern on a substrate made of a ceramic insulating material, the first layer of the thick film on the substrate is a conductor. It is composed of a first layer pattern film in which either the film or the resistor film is formed in a predetermined pattern, and a ceramic insulator film formed to fill in the space between the first layer pattern film. The surface of the first layer thick film is a substantially flat surface, and a second layer made of the other of a conductor film and a resistor film is formed on the first layer thick film. A thick film substrate characterized by having a layer pattern film formed thereon.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18851487U JPH0193769U (en) | 1987-12-11 | 1987-12-11 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18851487U JPH0193769U (en) | 1987-12-11 | 1987-12-11 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0193769U true JPH0193769U (en) | 1989-06-20 |
Family
ID=31479601
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18851487U Pending JPH0193769U (en) | 1987-12-11 | 1987-12-11 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0193769U (en) |
-
1987
- 1987-12-11 JP JP18851487U patent/JPH0193769U/ja active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH0193769U (en) | ||
JPS6039272U (en) | thick film circuit board | |
JPH01104069U (en) | ||
JPS63165877U (en) | ||
JPS6284085U (en) | ||
JPS62192652U (en) | ||
JPS6339998U (en) | ||
JPS62118440U (en) | ||
JPH01159397U (en) | ||
JPS61199043U (en) | ||
JPS6384972U (en) | ||
JPS62135464U (en) | ||
JPS62124896U (en) | ||
JPS5967961U (en) | Printed board | |
JPS6359347U (en) | ||
JPS6139969U (en) | hybrid integrated circuit | |
JPS61206302U (en) | ||
JPH0237360U (en) | ||
JPS61140573U (en) | ||
JPS60106738U (en) | thermal printing head | |
JPS628646U (en) | ||
JPH0180356U (en) | ||
JPS6294675U (en) | ||
JPH01137501U (en) | ||
JPS648763U (en) |