JPH0189753U - - Google Patents
Info
- Publication number
- JPH0189753U JPH0189753U JP18539787U JP18539787U JPH0189753U JP H0189753 U JPH0189753 U JP H0189753U JP 18539787 U JP18539787 U JP 18539787U JP 18539787 U JP18539787 U JP 18539787U JP H0189753 U JPH0189753 U JP H0189753U
- Authority
- JP
- Japan
- Prior art keywords
- curable resin
- ultraviolet curable
- ultraviolet
- integrated circuit
- hybrid integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 2
- 238000004377 microelectronic Methods 0.000 claims 2
- 239000004020 conductor Substances 0.000 claims 1
- 230000001678 irradiating effect Effects 0.000 claims 1
- 238000000465 moulding Methods 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Description
第１図は本考案のハイブリツドＩＣのモールド
治具装着状態を示す断面図、第２図は本考案によ
るハイブリツドＩＣの斜視図である。
１……絶縁基板、２……紫外線硬化型樹脂、３
……治具基台、４……スペーサ、５……抑え板、
６……紫外線光源、７……平坦部、８……実装部
品。
FIG. 1 is a sectional view showing a hybrid IC according to the present invention in a state in which a molding jig is attached, and FIG. 2 is a perspective view of the hybrid IC according to the present invention. 1... Insulating substrate, 2... Ultraviolet curing resin, 3
... Jig base, 4 ... Spacer, 5 ... Holding plate,
6... Ultraviolet light source, 7... Flat part, 8... Mounted parts.
Claims (1)
に超小形電子部品が実装された混成集積回路にお
いて、該超小形電子部品の実装面の上から予め定
められた量のペースト状紫外線硬化型樹脂を塗布
した上面に、紫外線透過平板を通して紫外線を照
射することにより前記紫外線硬化型樹脂を硬化さ
せて設けた平坦部を有することを特徴とする混成
集積回路。 In a hybrid integrated circuit in which a microelectronic component is mounted on one side of an insulating substrate on which wiring conductors and film resistance are printed, a predetermined amount of paste-like ultraviolet curable resin is applied onto the mounting surface of the microelectronic component. 1. A hybrid integrated circuit comprising: a flat portion formed by curing the ultraviolet curable resin by irradiating ultraviolet rays through an ultraviolet transmitting flat plate on an upper surface coated with the ultraviolet curable resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18539787U JPH0189753U (en) | 1987-12-07 | 1987-12-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18539787U JPH0189753U (en) | 1987-12-07 | 1987-12-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0189753U true JPH0189753U (en) | 1989-06-13 |
Family
ID=31476715
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18539787U Pending JPH0189753U (en) | 1987-12-07 | 1987-12-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0189753U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62144335A (en) * | 1985-12-18 | 1987-06-27 | Mitsubishi Electric Corp | Sealing method for semiconductor device |
-
1987
- 1987-12-07 JP JP18539787U patent/JPH0189753U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62144335A (en) * | 1985-12-18 | 1987-06-27 | Mitsubishi Electric Corp | Sealing method for semiconductor device |
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