JPH0160857B2 - - Google Patents
Info
- Publication number
- JPH0160857B2 JPH0160857B2 JP58248422A JP24842283A JPH0160857B2 JP H0160857 B2 JPH0160857 B2 JP H0160857B2 JP 58248422 A JP58248422 A JP 58248422A JP 24842283 A JP24842283 A JP 24842283A JP H0160857 B2 JPH0160857 B2 JP H0160857B2
- Authority
- JP
- Japan
- Prior art keywords
- shift
- control data
- shift control
- mantissa
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
- G06F7/485—Adding; Subtracting
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49905—Exception handling
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49936—Normalisation mentioned as feature only
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computational Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Nonlinear Science (AREA)
- General Engineering & Computer Science (AREA)
Priority Applications (9)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58248422A JPS60142736A (ja) | 1983-12-29 | 1983-12-29 | 浮動小数点加減算方式 |
CA000468679A CA1229415A (en) | 1983-12-09 | 1984-11-27 | Floating-point addition/subtraction system |
AU36270/84A AU555230B2 (en) | 1983-12-09 | 1984-12-04 | Floating-point addition/subtraction system |
DE8484308518T DE3481788D1 (de) | 1983-12-09 | 1984-12-07 | Addier/substrahiersystem fuer gleitkommazahlen. |
EP84308518A EP0145465B1 (en) | 1983-12-09 | 1984-12-07 | Floating-point addition/subtraction system |
ES538377A ES8602270A1 (es) | 1983-12-09 | 1984-12-07 | Una instalacion electronica de suma-resta en punto flotante |
BR8406284A BR8406284A (pt) | 1983-12-09 | 1984-12-07 | Sistema de adicao/subtracao com virgula flutuante para duas series de dados |
KR1019840007775A KR890004307B1 (ko) | 1983-12-09 | 1984-12-08 | 부동소수점 가감산 장치 |
US07/206,930 US5016209A (en) | 1983-12-09 | 1988-05-31 | Floating-point addition/subtraction system with digit position alignment between fractions of multiple sets of data |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58248422A JPS60142736A (ja) | 1983-12-29 | 1983-12-29 | 浮動小数点加減算方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60142736A JPS60142736A (ja) | 1985-07-27 |
JPH0160857B2 true JPH0160857B2 (enrdf_load_stackoverflow) | 1989-12-26 |
Family
ID=17177885
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58248422A Granted JPS60142736A (ja) | 1983-12-09 | 1983-12-29 | 浮動小数点加減算方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60142736A (enrdf_load_stackoverflow) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0792741B2 (ja) * | 1988-11-04 | 1995-10-09 | 株式会社東芝 | 差動バレルシフタ |
-
1983
- 1983-12-29 JP JP58248422A patent/JPS60142736A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS60142736A (ja) | 1985-07-27 |
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