JPH0148661B2 - - Google Patents

Info

Publication number
JPH0148661B2
JPH0148661B2 JP58179558A JP17955883A JPH0148661B2 JP H0148661 B2 JPH0148661 B2 JP H0148661B2 JP 58179558 A JP58179558 A JP 58179558A JP 17955883 A JP17955883 A JP 17955883A JP H0148661 B2 JPH0148661 B2 JP H0148661B2
Authority
JP
Japan
Prior art keywords
conductivity type
region
high concentration
type
semiconductor layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58179558A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6072255A (ja
Inventor
Hiroshi Iwasaki
Shintaro Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP58179558A priority Critical patent/JPS6072255A/ja
Publication of JPS6072255A publication Critical patent/JPS6072255A/ja
Priority to US06/847,150 priority patent/US4637125A/en
Priority to US06/925,266 priority patent/US4694562A/en
Publication of JPH0148661B2 publication Critical patent/JPH0148661B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/761—PN junctions

Landscapes

  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP58179558A 1983-09-22 1983-09-28 半導体集積回路装置およびその製造方法 Granted JPS6072255A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP58179558A JPS6072255A (ja) 1983-09-28 1983-09-28 半導体集積回路装置およびその製造方法
US06/847,150 US4637125A (en) 1983-09-22 1986-04-03 Method for making a semiconductor integrated device including bipolar transistor and CMOS transistor
US06/925,266 US4694562A (en) 1983-09-22 1986-10-31 Method for manufacturing a semiconductor integrated device including bipolar and CMOS transistors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58179558A JPS6072255A (ja) 1983-09-28 1983-09-28 半導体集積回路装置およびその製造方法

Publications (2)

Publication Number Publication Date
JPS6072255A JPS6072255A (ja) 1985-04-24
JPH0148661B2 true JPH0148661B2 (en, 2012) 1989-10-20

Family

ID=16067832

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58179558A Granted JPS6072255A (ja) 1983-09-22 1983-09-28 半導体集積回路装置およびその製造方法

Country Status (1)

Country Link
JP (1) JPS6072255A (en, 2012)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1188609B (it) * 1986-01-30 1988-01-20 Sgs Microelettronica Spa Procedimento per la fabbricazione di dispositivi monolitici a semiconduttore contenenti transistori bipolari a giunzione,transistori cmos e dmos complementari e diodi a bassa perdita
DE3886062T2 (de) * 1987-01-30 1994-05-19 Texas Instruments Inc Verfahren zum Herstellen integrierter Strukturen aus bipolaren und CMOS-Transistoren.
EP0325181B1 (en) * 1988-01-19 1995-04-05 National Semiconductor Corporation A method of manufacturing a polysilicon emitter and a polysilicon gate using the same etch of polysilicon on a thin gate oxide
JP2708764B2 (ja) * 1988-01-20 1998-02-04 三洋電機株式会社 半導体集積回路およびその製造方法
JPH0245972A (ja) * 1988-08-08 1990-02-15 Seiko Epson Corp 半導体装置
JPH02174256A (ja) * 1988-12-27 1990-07-05 Nec Corp Ｂｉ―ＭＯＳ集積回路の製造方法
JPH05226589A (ja) * 1992-02-17 1993-09-03 Mitsubishi Electric Corp Ｃ−ＢｉＣＭＯＳ型半導体装置およびその製造方法
JP3547811B2 (ja) * 1994-10-13 2004-07-28 株式会社ルネサステクノロジ バイポーラトランジスタを有する半導体装置およびその製造方法
CN103681513B (zh) * 2013-12-20 2016-04-13 上海岭芯微电子有限公司 集成电路充电驱动器及其制造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS599825B2 (ja) * 1979-09-20 1984-03-05 株式会社東芝 液体冷却機
JPS6046544B2 (ja) * 1980-09-25 1985-10-16 日本電気株式会社 半導体集積回路装置の製造方法
JPS6052591B2 (ja) * 1981-02-14 1985-11-20 三菱電機株式会社 半導体集積回路装置の製造方法
JPS57198650A (en) * 1981-06-01 1982-12-06 Toshiba Corp Semiconductor device and manufacture therefor

Also Published As

Publication number Publication date
JPS6072255A (ja) 1985-04-24

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