JPH0147911B2 - - Google Patents
Info
- Publication number
- JPH0147911B2 JPH0147911B2 JP55086606A JP8660680A JPH0147911B2 JP H0147911 B2 JPH0147911 B2 JP H0147911B2 JP 55086606 A JP55086606 A JP 55086606A JP 8660680 A JP8660680 A JP 8660680A JP H0147911 B2 JPH0147911 B2 JP H0147911B2
- Authority
- JP
- Japan
- Prior art keywords
- plate
- solder
- electrical component
- width
- shaped electrical
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 229910000679 solder Inorganic materials 0.000 claims description 32
- 238000005476 soldering Methods 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 5
- 239000000758 substrate Substances 0.000 description 15
- 238000002844 melting Methods 0.000 description 5
- 230000008018 melting Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
Description
【発明の詳細な説明】
本発明はリードを持たない板状電気部品のはん
だ接続を行なう配線基板のはんだ付け方法に関す
るものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a wiring board soldering method for soldering plate-shaped electrical components having no leads.
従来技術を第１，２，３，４図により説明す
る。第１図はリードを持たない板状電気部品の斜
視図、第２図、第４図は従来技術による配線基板
の一部を示す平面図、第３図は第２図のＡ―Ａ断
面図である。第１，２，３，４図において１は板
状電気部品、２は板状電気部品の電極部、３は基
板電極、４はペースト状はんだ、５は基板であ
る。 The prior art will be explained with reference to FIGS. 1, 2, 3, and 4. Fig. 1 is a perspective view of a plate-shaped electrical component without leads, Figs. 2 and 4 are plan views showing part of a wiring board according to the prior art, and Fig. 3 is a sectional view taken along line A-A in Fig. 2. It is. In Figures 1, 2, 3, and 4, 1 is a plate-shaped electrical component, 2 is an electrode portion of the plate-shaped electrical component, 3 is a substrate electrode, 4 is a paste-like solder, and 5 is a substrate.
従来技術によるリードを持たない板状電気部品
のはんだ接続を行なう配線基板は、第１，２，
３，４図に示すごとくに、まず基板５上の電極３
を覆うごとくにペースト状はんだ４を印刷により
形成し、次いで板状電気部品１を搭載し、ペース
ト状はんだ４を加熱溶融して、板状電気部品の電
極部２と基板電極３とをはんだ４を介してはんだ
接続して得られる。 A wiring board for soldering connection of a plate-shaped electrical component without leads according to the prior art has first, second,
As shown in Figures 3 and 4, first, the electrode 3 on the substrate 5 is
A paste-like solder 4 is formed by printing to cover the plate-like electrical component 1, and then the plate-like electrical component 1 is mounted, and the paste-like solder 4 is heated and melted to connect the electrode portion 2 of the plate-like electrical component and the board electrode 3 to the solder 4. Obtained by soldering connection via.
ここで第２図に示すごとく、板状電気部品１の
長さをＬ、幅をＷ、相対向する二面の基板電極３
の間隔をａ、長さをｂ、幅をｃ、ペースト状はん
だ４のパターンの幅をｄとした時、従来技術では
板状電気部品１の幅Ｗよりも基板電極３の幅ｃお
よびペースト状はんだ４のパターンの幅ｄが広い
ために板状電気部品１の搭載位置に自由度がある
ように見えるが、実際は搭載位置がずれたり、か
たむいて搭載されたりして、相対向する二面のペ
ースト状はんだ４と板状電気部品１のそれぞれの
電極部２の密着度が異なると第４図に示すように
板状電気部品１がはんだ溶融により一方の基板電
極３に引つぱられて接続され、他方の基板電極３
側ではんだ接続不良を引き起こすという欠点があ
つた。 Here, as shown in FIG. 2, the length of the plate-shaped electric component 1 is L, the width is W, and the substrate electrodes 3 on two opposing sides
When the interval is a, the length is b, the width is c, and the width of the pattern of the paste solder 4 is d, in the conventional technology, the width c of the board electrode 3 and the paste solder are smaller than the width W of the plate-shaped electrical component 1. Because the width d of the pattern of the solder 4 is wide, it seems that there is a degree of freedom in the mounting position of the plate-shaped electrical component 1, but in reality, the mounting position may shift or be mounted tilted, resulting in two parts facing each other. If the degree of adhesion between the paste-like solder 4 on the surface and the electrode portions 2 of the plate-shaped electric component 1 is different, the plate-shaped electric component 1 will be pulled to one of the substrate electrodes 3 by the melting of the solder, as shown in FIG. connected to the other substrate electrode 3
The drawback was that it caused poor solder connections on the side.
本発明の目的は上記した従来技術の欠点をなく
し、はんだ接続工程の歩留りを向上させ、さらに
は板状電気部品の搭載作業も容易とするリードを
持たない板状電気部品のはんだ接続を行なう配線
基板のはんだ付け方法を提供するにある。 The purpose of the present invention is to eliminate the above-mentioned drawbacks of the prior art, improve the yield of the solder connection process, and further facilitate the mounting work of plate-shaped electrical components. The present invention provides a method for soldering a board.
本発明の要点はチツプ部品の幅より狭い電極パ
ターンと該電極パターン上にチツプ部品の幅より
広いはんだパターンとを設けることにより、板状
電気部品の搭載作業を容易とし、しかも板状電気
部品がはんだ溶融により基板電極に引つぱられて
動いても確実に基板電極に接続されるようにする
ことにある。 The main point of the present invention is that by providing an electrode pattern that is narrower than the width of the chip component and a solder pattern that is wider than the width of the chip component on the electrode pattern, mounting of the plate-shaped electrical component is facilitated. The purpose is to ensure that the solder is connected to the substrate electrode even if the solder is pulled and moved by the substrate electrode due to melting of the solder.
以下、本発明を第５図、第６図により説明す
る。第５図は本発明の一実施例を示す配線基板の
一部の平面図、第６図は第５図のＢ―Ｂ断面図で
ある。第５図、第６図において１は板状電気部
品、２は板状電気部品の電極部、３は基板電極、
４はペースト状はんだ、５は基板である。 The present invention will be explained below with reference to FIGS. 5 and 6. FIG. 5 is a plan view of a portion of a wiring board showing an embodiment of the present invention, and FIG. 6 is a sectional view taken along line BB in FIG. In FIGS. 5 and 6, 1 is a plate-shaped electric component, 2 is an electrode part of the plate-shaped electric component, 3 is a substrate electrode,
4 is paste solder, and 5 is a substrate.
本発明によるリードを持たない板状電気部品の
はんだ接続を行なう配線基板は第５図、第６図に
示すごとくにまず基板５上の電極３を覆うごとく
にペースト状はんだ４を印刷により形成し、次い
で板状電気部品１を搭載し、ペースト状はんだ４
を加熱溶融して、板状電気部品の電極部２と基板
電極３とをはんだ４′を介してはんだ接続して得
られる。具体的な本発明による配線基板のパター
ン寸法は第５図に示すごとく、板状電気部品１の
長さをＬ、幅をＷ、相対向する二面の基板電極３
の間隔をa′長さをb′幅をc′ペースト状はんだ４の
パターンの幅をd′とした時、d′＞Ｗ＞c′及びa′＋
2b′＞Ｌ≧a′＋b′の範囲にある。このパターン寸
法から、基板電極３のパターン幅c′が板状電気部
品１の幅Ｗが狭くてもペースト状はんだ４のパタ
ーン幅d′が板状電気部品１の幅Ｗよりも広いため
搭載位置精度に自由度が取れ、搭載作業が容易と
なる。しかも板状電気部品１と基板電極３のパタ
ーンとの関係がＷ＞c′，a′＋2b′＞Ｌ≧a′＋b′であ
るので板状電気部品１がはんだ溶融により一方の
基板電極３に引つぱられて接続されても他方の基
板電極３からはずれることもなくはんだ接続不良
を引き起こすこともない。 As shown in FIGS. 5 and 6, the wiring board according to the present invention for soldering plate-shaped electrical components without leads is first formed by printing a paste-like solder 4 to cover the electrodes 3 on the board 5. Then, the plate-shaped electric component 1 is mounted, and the paste-like solder 4 is mounted.
It is obtained by heating and melting and connecting the electrode part 2 of the plate-shaped electric component and the substrate electrode 3 via solder 4'. The specific pattern dimensions of the wiring board according to the present invention are as shown in FIG.
When the interval is a′, the length is b′, the width is c′, and the width of the paste solder 4 pattern is d′, d′>W>c′ and a′+
It is in the range of 2b'>L≧a'+b'. From this pattern dimension, even if the pattern width c' of the board electrode 3 is narrower than the width W of the plate-shaped electrical component 1, the pattern width d' of the paste solder 4 is wider than the width W of the plate-shaped electrical component 1, so the mounting position It allows for greater flexibility in accuracy and makes mounting work easier. Moreover, since the relationship between the pattern of the plate-shaped electric component 1 and the substrate electrode 3 is W>c', a'+2b'>L≧a'+b', the plate-shaped electric component 1 is attached to one of the substrate electrodes 3 by melting the solder. Even if it is pulled and connected, it will not come off from the other substrate electrode 3 and will not cause a solder connection failure.
本発明は上記に詳述したように、板状電気部品
の搭載位置精度に自由度が取れしかもはんだ溶融
により基板電極に引つぱられて動いてもはんだ接
続不良を引き起こすこともないので、はんだ接続
工程での歩留りを向上させ、さらには板状電気部
品の搭載作業を容易にでき基板電極の幅を従来に
比し小さくできるので、高密度実装が可能となる
効果を有する。 As described in detail above, the present invention provides a degree of freedom in the mounting position accuracy of the plate-shaped electrical component, and does not cause a solder connection failure even if the plate-shaped electrical component moves due to being pulled by the board electrode due to solder melting. This has the effect of improving the yield in the process, making it easier to mount the plate-shaped electrical components, and making the width of the substrate electrode smaller than before, making high-density packaging possible.
第１図はリードを持たない板状電気部品の斜視
図、第２図、第４図は従来技術による配線基板の
一部を示す平面図、第３図は第２図のＡ―Ａ断面
図、第５図は本発明の一実施例を示す配線基板の
一部の平面図、第６図は第５図のＢ―Ｂ断面図で
ある。
１：板状電気部品、３：基板電極、４：ペース
ト状はんだ、５：基板。
Fig. 1 is a perspective view of a plate-shaped electrical component without leads, Figs. 2 and 4 are plan views showing part of a wiring board according to the prior art, and Fig. 3 is a sectional view taken along line A-A in Fig. 2. , FIG. 5 is a plan view of a portion of a wiring board showing an embodiment of the present invention, and FIG. 6 is a sectional view taken along line BB in FIG. 1: Plate electric component, 3: Board electrode, 4: Paste solder, 5: Board.
Claims (1)
において、板状電気部品の幅より狭い電極パター
ンと該電極パターン上に板状電気部品の幅より広
いはんだパターンとを設けて、はんだパターン上
に板状電気部品を搭載した後、はんだを加熱溶融
して板状電気部品のはんだ接続を行なう 但し、パターン寸法は上記板状電気部品の長さ
をＬ、幅をＷ、上記相対向する二面の電極パター
ンの間隔をa′，長さをb′，幅をc′、上記はんだパ
ターンの幅をd′とした時d′＞Ｗ＞c′及びa′＋2b′＞
Ｌ≧a′＋b′の範囲にある ことを特徴とする配線基板のはんだ付け方法。[Claims] 1. In the solder connection of a plate-shaped electrical component without leads, an electrode pattern narrower than the width of the plate-shaped electrical component and a solder pattern wider than the width of the plate-shaped electrical component are provided on the electrode pattern. After mounting the plate-shaped electrical component on the solder pattern, the solder is heated and melted to make the solder connection of the plate-shaped electrical component. However, the pattern dimensions are as follows: L is the length of the above plate-shaped electrical component, W is the width of the above-mentioned plate-shaped electrical component, and When the distance between the two opposing electrode patterns is a', the length is b', the width is c', and the width of the solder pattern is d', d'>W>c' and a'+2b'>
A method for soldering a wiring board, characterized in that L≧a′+b′.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8660680A JPS5712597A (en) | 1980-06-27 | 1980-06-27 | Method of soldering circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8660680A JPS5712597A (en) | 1980-06-27 | 1980-06-27 | Method of soldering circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5712597A JPS5712597A (en) | 1982-01-22 |
| JPH0147911B2 true JPH0147911B2 (en) | 1989-10-17 |
Family
ID=13891663
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8660680A Granted JPS5712597A (en) | 1980-06-27 | 1980-06-27 | Method of soldering circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5712597A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58115284A (en) * | 1981-12-28 | 1983-07-08 | 株式会社 サタケ | Drier |
| JPH01130484A (en) * | 1987-11-13 | 1989-05-23 | Matsushita Electric Ind Co Ltd | Ceramic chip parts |
-
1980
- 1980-06-27 JP JP8660680A patent/JPS5712597A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5712597A (en) | 1982-01-22 |
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