JPH0142018B2 - - Google Patents

Info

Publication number
JPH0142018B2
JPH0142018B2 JP59211733A JP21173384A JPH0142018B2 JP H0142018 B2 JPH0142018 B2 JP H0142018B2 JP 59211733 A JP59211733 A JP 59211733A JP 21173384 A JP21173384 A JP 21173384A JP H0142018 B2 JPH0142018 B2 JP H0142018B2
Authority
JP
Japan
Prior art keywords
host computer
remote batch
master station
slave station
station
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP59211733A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6190254A (ja
Inventor
Shinichi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59211733A priority Critical patent/JPS6190254A/ja
Publication of JPS6190254A publication Critical patent/JPS6190254A/ja
Publication of JPH0142018B2 publication Critical patent/JPH0142018B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/161—Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Computer And Data Communications (AREA)
JP59211733A 1984-10-09 1984-10-09 ワ−クステ−シヨン統合方式 Granted JPS6190254A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59211733A JPS6190254A (ja) 1984-10-09 1984-10-09 ワ−クステ−シヨン統合方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59211733A JPS6190254A (ja) 1984-10-09 1984-10-09 ワ−クステ−シヨン統合方式

Publications (2)

Publication Number Publication Date
JPS6190254A JPS6190254A (ja) 1986-05-08
JPH0142018B2 true JPH0142018B2 (enExample) 1989-09-08

Family

ID=16610688

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59211733A Granted JPS6190254A (ja) 1984-10-09 1984-10-09 ワ−クステ−シヨン統合方式

Country Status (1)

Country Link
JP (1) JPS6190254A (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6320650A (ja) * 1986-07-15 1988-01-28 Nec Corp Ｔｓｓコマンドバツチジヨブ処理方式
JP2614265B2 (ja) * 1988-04-12 1997-05-28 株式会社リコー 液体噴射記録ヘッド

Also Published As

Publication number Publication date
JPS6190254A (ja) 1986-05-08

Similar Documents

Publication Publication Date Title
US6704824B1 (en) Universal serial bus adapter with automatic installation
JP2945498B2 (ja) システム間通信方式
JP2663990B2 (ja) コンピュータ・システムのインターロック方法
EP0192924B1 (en) Device driver and adapter binding technique
EP0477124B1 (en) Method and apparatus for distributed processing of display panel information
JPH0414375B2 (enExample)
JPH0142018B2 (enExample)
WO2001007984A9 (en) Universal serial bus adapter with automatic installation
JPS58149528A (ja) プログラムロ−デイング方式
JPH10111849A (ja) データ処理装置及びその周辺機器
KR920003279B1 (ko) 데이타 처리장치의 os 및 nos 로딩방법
JP2642082B2 (ja) 通信プログラムの起動方法
JPH04346136A (ja) 仮想命令プロセッサ構成制御方法
JPH06110717A (ja) 複合計算機システム
JPH01108669A (ja) 分散処理システム
JP2551054B2 (ja) 入出力系再構成処理装置
JPH06175866A (ja) パーソナルコンピュータ用拡張ボード
JPS61107452A (ja) 通信処理方式
JPH0518138B2 (enExample)
JPH022447A (ja) 端末エミュレータ
JPH036540B2 (enExample)
JPH08137779A (ja) 計算機の周辺装置におけるドライバ供給方法
JPH04260952A (ja) プロトコル制御方法および装置
JPS6116105B2 (enExample)
JPH048826B2 (enExample)