JPH0135498B2 - - Google Patents

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Publication number
JPH0135498B2
JPH0135498B2 JP57012123A JP1212382A JPH0135498B2 JP H0135498 B2 JPH0135498 B2 JP H0135498B2 JP 57012123 A JP57012123 A JP 57012123A JP 1212382 A JP1212382 A JP 1212382A JP H0135498 B2 JPH0135498 B2 JP H0135498B2
Authority
JP
Japan
Prior art keywords
solder
lead member
piece
lead
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57012123A
Other languages
English (en)
Other versions
JPS58128748A (ja
Inventor
Shigemi Ono
Susumu Akyama
Shigeo Shimada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP57012123A priority Critical patent/JPS58128748A/ja
Publication of JPS58128748A publication Critical patent/JPS58128748A/ja
Publication of JPH0135498B2 publication Critical patent/JPH0135498B2/ja
Granted legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
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    • H01L2224/491—Disposition
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Description

【発明の詳細な説明】 本発明は、整流素子等の半導体素子のリード部
材を量産性を有して接続する方法に関するもので
ある。
トランジスタやダイオードの内部リードの接続
はワイヤボンデイング法によつて一般に行われて
いる。しかし、ワイヤボンデイング法で使用する
ボンダーは同時に１箇所しか接続できない。ま
た、太いリード線の接続には適していない。この
種の問題を解決するため、本願出願人は、特開昭
56−94754号公報に開示されている方法を提案し
た。この方法によれば、電力用半導体素子の量産
化が可能になる。しかし、内部リードの半導体チ
ツプへのろう接、半導体チツプの基板へのろう
接、及び内部リードの外部リードへのろう接を独
立に行わなければならない。また、先にろう接し
た部分が後のろう接によつて悪影響を受けないよ
うにろう材を組み合せを工夫しなければならな
い。また、ろう材の組み合せを工夫してもろう接
の温度管理が不充分であれば、前のろう接部分が
劣化する恐れがあつた。更にリードフレームを使
用して例えばセンタータツプ型整流素子を製造す
る場合に、半導体チツプ部分を樹脂モールドした
後に、外部リードにPb−Sn共晶半田チツプ法等
で半田被覆を行うと、既にろう接されている部分
のろう材が再び融けるという問題が生じた。
そこで、本発明の目的は、信頼性の高い半導体
素子を量産性を有して製造することが可能なリー
ド部材の接続方法を提供することにある。
上記目的を達成するための本発明は、導電性基
板の上にろう材片を介して半導体チツプを載置
し、棒状の内部リード部材の一端部を前記半導体
チツプの上に配し、前記内部リードの他端部を外
部リード部材の上に配し、前記内部リード部材の
一端部及び他端部の下又はその近傍にろう材片を
置き、且つ前記半導体チツプの表面と同一方向に
伸びるように前記内部リード部材を水平に保持し
たものを加熱炉に入れ、前記基板と前記半導体チ
ツプとの間、前記半導体チツプと前記内部リード
部材との間、及び前記内部リード部材と前記外部
リード部材との間を同時にろう接することを特徴
とする半導体素子のリード部材の接続方法に係わ
るものである。
上記本発明によれば、棒状の内部リード部材を
水平に保つてろう接するので、内部リード部材の
両端部のろう接を同時に行うことが可能になり、
量産性が向上する。また、複数箇所を同時にろう
接するので、融点の高いろう材を使用することが
可能になり、外部リード部材に対する半田被覆、
又は外部回路への接続等で加熱されても、内部の
ろう材が融けたり、軟化するという問題が生じな
い信頼性の高い素子を提供することが出来る。
次に、図面を参照して本発明の実施例について
述べる。
第１図〜第３図は、センタータツプ型整流素子
の製造方法を示すものである。まず、基板１及び
外部リード部材２，３，４を有する銅にニツケル
メツキしたリードフレームを用意する。また上下
に電極を有するシリコンダイオードチツプ５を用
意する。また銅にニツケルメツキした外部リード
部材接続用金属片６を用意する。更に、Pb95重
量％＋Sn5重量％から成る固相線温度304℃、液
相線温度314℃の半田片７，８，９，１０を用意
する。また、直径0.5mmのニツケルメツキした銅
線から成る丸棒状の内部リード部材１１を用意す
る。
次に、カーボン製の治具にリードフレームをセ
ツトし、第１図に示す如く外部リード部材２の上
に半田片１０を介してデイスク状金属片６を配
し、この金属片６の上に半田片９を配す。次に、
基板１の上に半田片７を介してダイオードチツプ
５を配す。次に、チツプ５の上に半田片８を配
す。しかる後、丸棒状内部リード部材１１の一端
部１１ａをチツプ５の上に半田片８を介して配
し、またその他端部１１ｂを外部リード部材２の
上に半田片９，１０と金属片６とを介して配す。
金属片６はチツプ５と同じ厚さに形成されている
ので、内部リード部材１１はチツプ５の表面と同
一方向に伸びた状態即ち水平方向に伸びた状態と
なる。尚第１図には、センタタツプ整流素子の一
方のダイオード部分のみが示されているが、他方
のダイオード部分も同様に構成する。また、リー
ドフレームには多数の整流素子形成部分が設けら
れているので、同様に各部材を配す。
しかる後、第１図に示すものを、H2等の還元
性ガス又はN2等の不活性ガス雰囲気の加熱炉の
中に入れ、半田片７，８，９，１０を同時に融か
し、第２図に示す半田７ａ，８ａ，９ａ，１０ａ
によつて、基板１とチツプ５との間、チツプ５と
内部リード部材１１との間、内部リード部材１１
と外部リード部材の一部となる金属片６との間、
金属片６と外部リード部材２との間を同時にろう
接する。
次に、第３図で点線で示す部分を合成樹脂１２
でモールドする。また合成樹脂１２でモールドさ
れなかつた部分を半田浴に浸漬して外部リード部
材２，３，４を半田被覆する。またリードフレー
ムから外部リード部材２，３，４を分離する。
上述の如き方法によれば、合成樹脂１２でモー
ルドされる内部の各部分を同時にろう接すること
が可能になるので、量産性が大幅に向上する。
また各ろう接部分に融点の高いろう材を使用す
ることが可能になるので、外部リード部材２，
３，４の露出部分を半田浸漬する場合等に於い
て、内部の半田が融けたり、軟化することがな
い。
また、内部リード部材１１を水平に配置するの
で、半田８ａが内部リード部材１１を囲む状態と
なり、半田８ａと内部リード部材１１との接触面
積が大きくなり、内部リード部材１１のチツプ５
に対する接着の強度が大きくなる。
また、内部リード部材１１は丸棒であり且つ水
平配置されるので、内部リード部材１１とチツプ
５との間に半田が押し込められた状態とならない
ので、半田中のガスが抜け易く、半田８ａ中にボ
イドができにくい。従つて、接着強度が大きく且
つ熱疲労の少ない接続が可能になる。
また丸棒状の内部リード部材１１を使用するの
で、ヘツダを形成する必要がなくなり、銀クラツ
ド銅線の代りにニツケルメツキ銅線の使用が可能
になる。従つて素子のコストダウンが可能にな
る。
また直接状丸棒で内部リード部材１１を形成す
るので、自動送り、自動組込み等が容易になる。
次に、本発明の別の実施例を示す第４図及び第
５図について述べる。但し、第１図〜第３図と共
通する部分には同一の符号を付してその説明を省
略する。この実施例では、同一接続箇所に互いに
平行に２本の丸棒状内部リード部材１１を水平に
配している。このように、２本の内部リード部材
１１を使用すると、第５図に示す如く、２本のリ
ード部材１１の間に半田８ａが保持された状態と
なり、チツプ５の側面に半田が垂れ下ることが防
止される。また電流容量及び放熱容量も増大す
る。
以上、本発明の実施例について述べたが、本発
明はこれに限定されるものではなく、更に変形可
能なものである。例えば、第６図に示す如く、半
田片８をリード部材１１の下に置かずに、横に置
いてもよい。また、外部リード部材２，３に対す
る接触面積（対向面積）を増大させるために、第
７図に示す如く内部リード部材１１の他端部１１
ｂを折り曲げるか、第８図に示す如く平坦につぶ
してもよい。また金属片６を半田１０ａで予め外
部リード部材２に固着した後に、内部リード部材
１１を接続してもよい。また内部リード部材１１
を外部リード部材２，３に直接に半田付けしても
よい。また、リードフレームを使用しない場合に
も適用可能である。
【図面の簡単な説明】
第１図〜第３図は本発明の実施例に係わる整流
素子の組立を示すものであり、第１図は整流素子
の各部の配置を示す第３図の−線に相当する
断面図、第２図はろう接後の整流素子を示す断面
図、第３図は整流素子の平面図、第４図は別の実
施例に係わる整流素子の平面図、第５図は第４図
の−線断面図、第６図は半田片の配置の変形
例を示す断面図、第７図及び第８図は内部リード
部材の変形例を示す平面図、第９図は外部リード
部材の変形例を示す断面図である。 尚図面に用いられている符号において、１は基
板、２，３，４は外部リード部材、５はダイオー
ドチツプ、６は金属片、７，８，９，１０は半田
片、１１は内部リード部材、１２は合成樹脂であ
る。

Claims (1)

    【特許請求の範囲】
  1. １ 導電性基板の上にろう材片を介して半導体チ
    ツプを載置し、棒状の内部リード部材の一端部を
    前記半導体チツプの上に配し、前記内部リード部
    材の他端部を外部リード部材の上に配し、前記内
    部リード部材の一端部及び他端部の下又はその近
    傍にろう材片を置き、且つ前記半導体チツプの表
    面と同一方向に伸びるように前記内部リード部材
    を水平に保持したものを加熱炉に入れ、前記基板
    と前記半導体チツプとの間、前記半導体チツプと
    前記内部リード部材との間、及び前記内部リード
    部材と前記外部リード部材との間を同時にろう接
    することを特徴とする半導体素子のリード部材の
    接続方法。
JP57012123A 1982-01-28 1982-01-28 半導体素子のリ−ド部材の接続方法 Granted JPS58128748A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57012123A JPS58128748A (ja) 1982-01-28 1982-01-28 半導体素子のリ−ド部材の接続方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57012123A JPS58128748A (ja) 1982-01-28 1982-01-28 半導体素子のリ−ド部材の接続方法

Publications (2)

Publication Number Publication Date
JPS58128748A JPS58128748A (ja) 1983-08-01
JPH0135498B2 true JPH0135498B2 (ja) 1989-07-25

Family

ID=11796757

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57012123A Granted JPS58128748A (ja) 1982-01-28 1982-01-28 半導体素子のリ−ド部材の接続方法

Country Status (1)

Country Link
JP (1) JPS58128748A (ja)

Also Published As

Publication number Publication date
JPS58128748A (ja) 1983-08-01

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