JPH01321542A - Data converting circuit - Google Patents

Abstract

PURPOSE:To realize the high-speed and flexible bidirectional data conversion by encoding the signals of the data, address and control buses of a computer with use of an encoder and switching the data conversion characteristics of a data converter. CONSTITUTION:The signals of an address bus, a control bus and a data bus A of a computer 5 are partly inputted to an encoder 3. The output encoded based on said input information is inputted to a data converter 2 as a selection signal. The converter 2 has plural data conversion characteristics and these characteristics are selected based on the selection signal. Then the conversion of data is carried out between the bus A and a data bus B which connects a memory 6 and an input/output device 7. Thus it is possible to attain the high-speed and flexible bidirectional data conversion.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a data conversion circuit in a computer system, particularly an image processing system.

<Background Art> Conventionally, in a computer system, when performing data conversion on data stored in memory or data input from an input device, a data conversion program is generally created to implement a predetermined conversion function. Data conversion is performed using software processing.

Additionally, in systems that require data conversion of large amounts of data, such as image processing systems, a dedicated data conversion circuit as shown in Figure 7 is installed to speed up the data conversion process. Sometimes there are. This data conversion circuit provides a data converter 72 between the data bus A of the computer 71 and the other data buses B, and converts data stored in the memory 73 and data input manually from the input/output device 74 to data conversion processing.

<Problems to be Solved by the Invention> However, the above-mentioned conventional method has the drawback that flexibility and high speed of data conversion are not compatible. In other words, Moe's software processing allows for very flexible data conversion processing, but when dealing with large amounts of data such as image data, even if high-speed methods such as the conversion table method are used, the conversion time may be limited. There was a limit to the shortening of On the other hand, with the latter method of providing a dedicated data conversion circuit, it is possible to speed up the data conversion process, but it is difficult to provide flexible processing such as adaptively changing the conversion function. On the other hand, if the conversion characteristics were to be adaptively changed, it would be necessary to program-control the output of the output port door 5 shown in FIG. 7, for example, and it would be necessary to sacrifice high speed.

Further, when attempting to realize high-speed bidirectional data conversion using the data converter as described above, a data conversion circuit as shown in FIG. 8 has been used. This data conversion circuit converts data from the data bus 81 into a data converter (
A) 82 converts the data and outputs it to the data bus 84 via the 3-state buffer 83, while data from the data bus 84 is converted by the data converter (B) 85;
It is designed to be output to the data bus 81 via a 3-state buffer 86. The direction control signal DIR is inputted to the three-state buffer 86, and the direction control signal DIR is inputted to the three-state buffer 83 via the inverter 87, so that the direction of the data is switched. It has become.

In this way, when performing bidirectional data conversion using the data converter as described above, two independent data converters are required, which increases the circuit scale and makes it expensive. There were drawbacks. This drawback is particularly noticeable when the circuit scale of each data converter is large.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a data conversion circuit that is both high-speed and flexible, and also to provide a data conversion circuit that can perform high-speed and flexible bidirectional data conversion with a small circuit scale. .

<Means for Solving the Problems> In order to achieve the above object, the data conversion circuit of the first invention is an encoding system that encodes signals from a data bus, an address bus, and a control bus of a computer and outputs the encoded signals as selection signals. is connected to a data bus of the computer and other data buses, and selects a plurality of data conversion characteristics from among the plurality of data conversion characteristics based on a selection signal outputted by the encoder. a data converter that selects one data conversion characteristic, converts data manually input from one of the two data buses according to the selected data conversion characteristic, and outputs the data to the other data bus; It is characterized by the fact that it is equipped with

Further, the data conversion circuit of the second invention is connected to two data buses, and outputs data by selecting input data from one of the two data buses based on a selection signal. a selector, having a plurality of data conversion characteristics, selects one data conversion characteristic from among the plurality of data conversion characteristics based on the selection signal, and converts the data outputted by the data selector into the selected data conversion characteristic. a data converter that converts and outputs data according to the data converter; and a data distributor that outputs the data output from the data converter to the other data bus of the two data buses based on the selection signal. It is characterized by the fact that it is equipped with

<Operation> In the first invention, the encoder encodes signals from the data bus, address bus, and control bus of the computer and outputs the encoded signals as selection signals, and outputs the encoded signals from the data bus of the computer and other data. connected to the bus,
and a data converter having multiple data conversion characteristics,
One data conversion characteristic is selected from among the plurality of data conversion characteristics based on the selection signal outputted by the encoder, and the data input from one of the two data buses is selected. The data is converted according to the data conversion characteristics and output to the other data bus.

In this way, the signals on the data bus, address bus, and control bus of the computer are encoded, and the data conversion characteristics are thereby switched, so that high-speed data conversion processing can be performed flexibly without relying on program control.

Further, in the second invention, the data selectors connected to the two data buses select the two data buses based on the selection signals.
A data converter that selects and outputs input data from one of the two data buses and has a plurality of data conversion characteristics selects one of the plurality of data conversion characteristics based on the selection signal. One data conversion characteristic is selected, the data output by the data selector is converted and output according to the selected data conversion characteristic, and the data distributor converts the data output by the data converter based on the selection signal. and outputs it to the other of the two data buses.

In this way, data is selected by the selection signal and the data conversion characteristics are switched, so that high-speed and flexible bidirectional data conversion can be performed.

<Example> Hereinafter, the present invention will be explained in detail with reference to illustrated embodiments.

Examples of the first invention FIG. 1 is a block diagram showing the circuit configuration of this embodiment.

A portion 1 surrounded by a broken line in FIG. 1 is the data conversion circuit of this embodiment, and is composed of a data converter 2, an encoder 3, and an output port 4. Part of the signals of the address bus, control bus, and data bus A of the computer 5, which includes a CPU, memory, etc. (not shown), are input to the encoder 3. Then, the output encoded by the encoder 3 according to this input information is manually inputted to the data converter 2 as a selection signal. The data converter 2 has a plurality of data conversion characteristics, selects a data conversion characteristic from among the conversion characteristics based on the selection signal, and selects a data conversion characteristic from the data conversion characteristics of the data bus A according to the selected data conversion characteristic.
Data conversion is performed between the data bus B connected to the memory 6 and the input/output device 7. The output port 4 is used for the purpose of switching the output code of the encoder 3 under program control. If there is no need to switch the output code of the encoder 3, the output port 4 may be omitted. Although FIG. 1 shows the case where the data bus B is bidirectional, the same applies to the case where the data bus B is unidirectional.

FIG. 2 shows a specific circuit example of this embodiment, which is a data conversion circuit for converting data written from a computer (not shown) to an image memory (not shown). The address bus of the computer mentioned above is 24 bits, and the data bus is 16 bits. In addition, the image memory has a configuration of multiple screens with one screen having 512 x 512 pixels and 1 pixel having 16 bits, and the A1 of the address bus mentioned above.
Assume that the 9 bits of .about.A8 are used to specify the horizontal address (X) of the screen, and the 9 bits of A + o = A + s are used to specify the vertical address (Y, ) of the screen. In other words, an arbitrary word (pixel) is selected from 256 words (pixels) on one screen using a total of 18 bits for X, , and Y, and addresses are arranged two-dimensionally as shown in Figure 3. . A block 21 surrounded by a broken line in FIG. 2 is the encoder part. An address indicating a screen to be subjected to data bus conversion processing is set in the register 22, and this output 5 bits and the upper 5 bits of the address bus are partially compared by a comparator 23 to determine whether or not the screen is the target screen. or will be done. Also, register 24.26.2
8 and 30 contain data Xi, X2 . Yl and Y2 are set, and the magnitude comparators 25.27.29.
3I and gate 33 determine whether the pixel being accessed by the computer is within a rectangular area. A ROM 35 is used as a data converter.

Data for obtaining predetermined data conversion characteristics is written in the ROM 35 in advance, and the data conversion characteristics are switched in accordance with the output of the gate 33. When the addresses match in the match comparator 23 and when writing to memory (MEMORQ=O, R/W=
0), the output of gate 32 becomes active, and the ROM
35 is in the enabled state and works as a data converter. In other cases, the ROM 35 is in the disabled state and becomes a 3-state output, and the contents of the data bus are in the 3-state enabled state by receiving the output of the inverter 34. The image is directly sent to the image memory via the buffer 36. In this way, data conversion processing is automatically performed only when the target screen is accessed, and data conversion is performed according to completely different conversion characteristics inside and outside the specified rectangular area (for example, γ correction and tone inversion) be done.

Although the present embodiment shows the case where the data converter is a ROM, it may be a RAM equipped with another writing means, or a more complicated data converter combined with a multiplier or the like. Furthermore, it is not specified by the bus width of the computer's address bus or data bus.

Second Embodiment of the Invention FIG. 4 is a block diagram showing the circuit configuration of this embodiment.

This bidirectional data conversion circuit includes a data selector 43 that selects and outputs one of data input from two data buses 41 and 42, and a data selector 43 that selects and outputs one of data input from two data buses 41 and 42.
The data converter 44 takes the data outputted by the converter 3 as input data and outputs data according to predetermined conversion characteristics with respect to the input data, a 3-state buffer 45, 46, and an inverter 47. Here, the three-state buffers 45 and 46 function as a data distributor with two outputs powered by one person. from outside.

Direction control signal DIR switches the direction of data flow between two data buses 41 and 42.

In FIG. 4, converted data flows from data bus 41 to 42 when DIR=0, and from data bus 42 to 41 when DIR=1. That is, D
When IR=0, the data selector 43 selects the data bus 41.
The data from is selected, converted via data converter 44, and output to data bus 42 by three-state buffer 46. At this time, the 3-state buffer 45 is in a 3-state output state, and the data bus 4
It has no effect on I. Conversely, when DIR=1, data from the data bus 42 is selected by the data selector 43, converted via the data converter 44, and output to the data bus 41 by the 3-state buffer 45. At this time, the 3-state buffer 46 is in a 3-state output state and does not affect the data bus 42. Here, by switching the conversion characteristics of the data converter 44 using the direction control signal DIR, it is possible to obtain a bidirectional data conversion circuit having conversion characteristics that differ depending on the data direction.

FIG. 5 shows a specific circuit example of this embodiment, and is an example of a bidirectional data conversion circuit placed between 8-bit data buses 51 and 52. This bidirectional data conversion circuit includes a data selector 53 that selects and outputs one of 8-bit data from each data bus 51 and 52, and a data converter in which data for obtaining predetermined conversion characteristics is written in advance. 512 bytes of R as
OM54, 3-state buffer of 8 bits each 55°56
and an inverter 57. The 8-bit output terminals of data selector 53 are connected to address input terminals of ROM 54, and the 8-bit data output terminals of ROM 54 are connected to 3-state buffers 55 and 56, respectively. Here, the ROM 54 is used as a so-called look-up table and serves as a data converter. Data flow control is performed in exactly the same manner as described in FIG. R.O.
The direction control signal DI is input to the highest address input terminal of M54.
R is connected, and the conversion characteristics are switched depending on the direction of data flow. Making one conversion characteristic an inverse function of the other can be easily achieved by appropriately selecting the data to be written to the ROM 54.

Although the present embodiment shows the case where the data width is 8 bits, the present invention can also be applied to cases where the data width is a number of bits other than 8 bits. Furthermore, in this embodiment, the data converter is RO
Although the case of M is shown, a RAM equipped with another writing means
However, more complex data converters can also be used. For example, more complex data converters can be used, such as the one shown in FIG. This data converter includes a multiplier 61. It is composed of an adder 62 and ROMs 63 and 64. Then, for human data X (A・X+B
), and the constants A and B are RO
M63 and 64. If this data converter is applied to the bidirectional data conversion circuit of the present invention, it is easy to switch the output contents of the ROMs 33 and 34 by, for example, the direction control signal DI.

<Effects of the Invention> As is clear from the above, the data conversion circuit of the first invention encodes the signals of the data bus, address bus, and control bus of the computer using the encoder, thereby improving the data conversion of the data converter. Since the characteristics are switched, high-speed data conversion processing can be performed flexibly without relying on program control.

Further, the data conversion circuit of the second invention does not require two data converters unlike the conventional bidirectional data conversion circuit,
Bidirectional data conversion can be performed using a single data converter, and data conversion characteristics can be switched using a selection signal for switching the data conversion direction, allowing for high-speed and flexible data conversion. be able to.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the data conversion circuit of the first invention, FIG. 2 is a diagram showing a specific circuit example of the above embodiment, and FIG. 3 is a block diagram showing an example of the data conversion circuit of the first invention. FIG. 4 is a block diagram of an embodiment of the data conversion circuit of the second invention. 5 is a diagram showing a specific circuit example of the data conversion circuit shown in FIG. 4, FIG. 6 is a block diagram showing another example of the data converter in the data conversion circuit shown in FIG. 4, and FIG. Block Diagram of a Conventional Data Conversion Circuit FIG. 8 is a block diagram of a conventional bidirectional data conversion circuit. l...data conversion circuit, 2...data converter, 3.
- Encoder, 5- Computer, 41.42... Data bus, 43... Data selector, 44... Data converter,
45.46... 3-state buffer, 47... Inverter. Patent applicant: Sharp Corporation Agent
Patent attorney: 1 person -～
〇 −”L?5 δ 2661

Claims (2)

[Claims] (1) An encoder that encodes signals from the data bus, address bus, and control bus of the computer and outputs the encoded signals as selection signals; having a conversion characteristic, and selecting one data conversion characteristic from among the plurality of data conversion characteristics based on a selection signal outputted by the encoder;
A data converter that converts data input from one of the two data buses according to the selected data conversion characteristic and outputs the converted data to the other data bus. circuit. (2) a data selector that is connected to the two data buses and selects and outputs input data from one of the two data buses based on a selection signal, and a plurality of data conversion characteristics; data conversion, which selects one data conversion characteristic from among the plurality of data conversion characteristics based on the selection signal, and converts and outputs the data output by the data selector according to the selected data conversion characteristic; and a data distributor that outputs the data output by the data converter to the other of the two data buses based on the selection signal. circuit.