JPS63205726A - Microcomputer - Google Patents

Abstract

PURPOSE:To make an intervention of a software unnecessary by providing an exclusive bus between an A/D converter and a memory, directly transferring a data to be memory from the A/D converter through this exclusive bus, and storing it in the memory. CONSTITUTION:The titled microcomputer is provided with an exclusive bus 5 for connecting an A/D (analog/digital) converter 1 and a memory 4, and an address counter 3 for generating successively an address for storing a data to the memory, whenever a digital data is outputted from the A/D converter 1. As a result, by the address generated successively by this address counter 3, the digital data outputted from the A/D converter 1 can be stored successively in the memory 4. Accordingly, the digital data converted from an analog signal by the A/D converter 1 is transferred to an internal memory through the exclusive bus 5 without an intervention of a software of a CPU, and stored. In such a way, a burden of the CPU is reduced, and the processing efficiency of other software by the CPU is improved by that portion.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a microcomputer, and more specifically, to an A/D converter for converting an analog signal into a digital signal and storing it in a memory. This invention relates to a microcomputer equipped with a microcomputer.

[Prior art]

In order for a microcomputer to process an analog signal obtained by a general measuring instrument and convert it into data that can be stored in a memory, it is necessary to perform so-called analog/digital conversion. For this reason, microcomputers are required to convert analog signals into digital signals (analog/digital).
In many cases, a converter (hereinafter referred to as A/D) is provided.

By the way, the conventional method for storing digital data converted by an A/D converter in the internal memory of a microcomputer is to interrupt the CPU every time one unit (for example, one byte) of digital data is obtained. is multiplied and the digital data obtained by the A/D converter is transferred to the memory through software processing by the CPU.
A configuration is adopted in which the information is stored.

This configuration places a heavy burden on the CPU's software processing, which slows down the original software processing that should be executed by the CPU, and makes it impossible to immediately respond to interrupt requests with high urgency. Further, there is a possibility that problems such as being unable to cope with the increased speed of hardware processing by the A/D converter may occur.

[Problem that the invention seeks to solve]

From this point of view, for example, instead of processing digital data obtained by an A/fl converter sequentially using software, it is temporarily stored in a dedicated register, and when a certain amount of data has been accumulated in this register. A configuration has been put into practical use that interrupts the CPU and transfers it to memory through software processing by the CPU ("μP078
11G/7810G J NEC manual).

However, even in the above-mentioned configuration example, software intervention of the CPU is still necessary, and it cannot be said that the problem is completely solved.

[Means for solving problems]

The present invention was made in view of the above circumstances, and apart from the normal internal bus that microcomputers use to send data, there is a dedicated bus between the A/D converter and the memory. A bus is provided, and data is directly transferred from the A/D converter to the memory via this dedicated bus and is stored in the memory.

The present invention provides a microcomputer in which an analog signal is converted into a digital signal by an A/D converter and stored in a memory, and a dedicated bus connecting the A/D converter and the memory; an address counter that sequentially generates an address for storing data in the memory each time digital data is output from the A/D converter; and an address counter that sequentially generates an address for storing data in the memory; The present invention is characterized in that the digital data to be displayed are sequentially stored in the memory.

[Effect]

In the microcomputer according to the present invention, digital data converted from an analog signal by an A/D converter is
It is transferred and stored in internal memory via a dedicated bus without PU software intervention.

〔Example〕

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below based on drawings showing embodiments thereof.

FIG. 1 is a block diagram showing the configuration of essential parts of a microcomputer according to the present invention.

In the figure, l is an A/D converter, which converts the analog signal given from the multiplexer 2 into digital data. In this embodiment, the A/D converter 1 is an 8-bit high-speed, high-precision successive approximation type A/D converter. The conversion of the analog signal received by the A/D converter into a digital signal and the output of the resulting digital data are performed one data at a time in synchronization with the clock output by the real-time control circuit 7.

Multiplexer 2 has 8 analog signal inputs ANO
-AN7, and selectively outputs one system of analog signals to the A/D converter 1 in accordance with the data selection signal from the data selection/RAM address counter 3.

The data selection/RAM address counter 3 supplies the multiplexer 2 with a signal instructing the output of any of the analog signals ANO to AN7 instructed by the CPU (not shown) to the A/[1 converter 1, and RAM in which digital data obtained by converting signals is to be stored
4 address is generated and sent to RA via real-time bus 5.
Give to M address bar nofa 6.

The functions of the data selection/RAM address counter 3 depend on the control register 31 provided therein.

, FIG. 2 is a schematic diagram showing the focus structure of the control register 31 provided in the data selection/RAM address counter 3.

This control register 31 has a 6-bit configuration,
1st bit bito is enable bit EADC1 2nd bit bit1 to 6th bit bit5 are A/D conversion start RAM address bits ADSAO to ADS84
It is used in various ways.

The enable bit EA[IC of the first bit bito is
For example, in this embodiment, when this is set (=1), a 3-bit signal is outputted to the multiplexer 2 for sequential selection of the eight analog signals ANO7AN1 by the multiplexer 2.

2nd bit bit 1 to 6th bit 5 A/D conversion starter RAM address bit ADSAO to 80^
4 is used for FM determination of the storage address of the digital data converted by the A/D converter 1 in the RAM 4. The relationship is data selection/l? as a conversion table as shown in Table 1 below. It is preset to AM address count 3. Each of these addresses is sequentially output one address at a time in synchronization with a clock from a real-time control circuit 7, which will be described later.

(Left below) Table 1! ? AM4 is an internal memory of the microcomputer of the present invention, and is connected to other devices such as a CPU (not shown) via an internal bus (not shown), as well as an A/D converter 1. A dedicated real-time bus 5 connects a RAM address buffer 6 to be described later and several other devices.

The 11AM address buffer 6 stores the address generated by the data selection/RAM address counter 3 and output to the real-time bus 5, that is, the address for storing the digital data transferred from the A/D converter 1 to the RAM 4 in the RAM 4. Temporarily memorized, l? Give it to AM4.

As a result, the address given to the RAM 4 from the RAM address buffer 6 is accessed, and the A/D change fj! !
The digital data output from 31 is stored at that address.

This operation is performed in synchronization with the clock output from the real-time control circuit 7.

The real-time control circuit 7 generates a clock in response to an instruction from, for example, a CPU (not shown), and operates each of the above-mentioned devices in synchronization with this clock, so that the multiplexer 2 selects an analog signal and its digital data. , and even its RAl'14
Execute processing such as transfer and storage to.

The operation of the microcomputer of the present invention configured as described above will be explained below.

Data selection/I? Enable bit E, which is the first bit of the control register 31 of the AM address counter 3
When the ADC is sent (.1) by the CPU (not shown), the data selection/RAM address counter 3 causes the multiplexer 2 to perform A/D conversion! Analog signals to be selected and output to 31 are sequentially instructed, so multiplexer 2 to A
The analog signal is given to the /D converter 1. Then, the A/Di converter 1 converts it into multiplexer digital data and outputs it to the real-time bus 5.

On the other hand, the A/D conversion starts l? which is the second bit 1 to the sixth bit bits of the control register 31 of the data selection/RAM address counter 3. Data is also given to AM address bits ADSAO to DS^4 from a CPU (not shown), and each bit is set or reset. As a result, the data selection/RAM address counter 3 sequentially outputs the addresses stored in itself as shown in Table 1. At this time, data selection/RA
The M address counter 3 counts the number of data output from the A/D converter 1, and each time one data is output from the A/D converter 1, it sequentially updates and outputs one address at a time.

In this way, the addresses updated and output one address at a time from the data selection/RAM address counter 3 in synchronization with the clock output from the real-time control circuit 7 are temporarily held in the RAM address buffer 6 via the real-time bus 5. l? Given to AM4. Also, from the A/D conversion 31, the real-time control circuit 7
Digital data is 1 in synchronization with the clock output from
Data is output to the real-time bus 5 and given to the RAM 4.

This causes the RAM address buffer 6 to
The digital data output from the A109 converter 1 is stored at the address of M4.

Therefore, each time one piece of digital data is output from the A/D converter l, the address updated and output one address at a time from the data selection/RAM address counter 3 is updated by one address at a time on the real-time bus 5. R via RAM address buffer 6
Since it is given to AM4, A/D converter 1 is sent to RAM4.
The data output from the data selection/R static address counter 3 is stored in sequence according to the address output from the static address counter 3.

〔effect〕

As described above, according to the present invention, digital data converted from an analog signal by an A/D converter is sent to a CPU.
It becomes possible to execute what was previously transferred and stored in memory without software intervention. Therefore, in the present invention, the load on the CPU is reduced, and the processing efficiency of the software by the CPU (h) is improved accordingly, and urgent interrupt requests can be responded to immediately.
Even if the processing speed of the /D converter hardware becomes faster, it can be sufficiently handled.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of main parts of a microcomputer according to the present invention, and FIG. 2 is a data selection/RAM thereof.
FIG. 2 is a schematic diagram showing a bit configuration of a control register included in an address counter. 1... A/D converter 2... Multiplexer
3...Data selection/RAM address counter 4.
...RAM5...Real-time bus 7...Real-time control circuit 31...Control register patent Applicant: Sanyo Electric Co., Ltd. Agent Patent attorney: Noboru Kono bit5 bit4 bit3 b
it2 bitl bit. Figure 2

Claims (1)

[Claims] 1. In a microcomputer configured to convert an analog signal into a digital signal using an A/D converter and store it in a memory, a dedicated bus connecting the A/D converter and the memory; an address counter that sequentially generates an address for storing data in the memory each time digital data is output from the A/D converter; A microcomputer characterized in that digital data output from a converter is sequentially stored in the memory.