JPH01315191A - Manufacture of high density printed wiring board - Google Patents
Manufacture of high density printed wiring boardInfo
- Publication number
- JPH01315191A JPH01315191A JP14569688A JP14569688A JPH01315191A JP H01315191 A JPH01315191 A JP H01315191A JP 14569688 A JP14569688 A JP 14569688A JP 14569688 A JP14569688 A JP 14569688A JP H01315191 A JPH01315191 A JP H01315191A
- Authority
- JP
- Japan
- Prior art keywords
- resist
- resist film
- plating
- hole
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 238000007747 plating Methods 0.000 claims abstract description 50
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 39
- 229910052802 copper Inorganic materials 0.000 claims abstract description 30
- 239000010949 copper Substances 0.000 claims abstract description 30
- 238000000034 method Methods 0.000 claims abstract description 25
- 229910000679 solder Inorganic materials 0.000 claims abstract description 23
- 239000000126 substance Substances 0.000 claims abstract description 15
- 230000001678 irradiating effect Effects 0.000 claims abstract description 6
- 239000011889 copper foil Substances 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 5
- 239000003054 catalyst Substances 0.000 claims description 4
- 230000000873 masking effect Effects 0.000 claims description 4
- 229920001187 thermosetting polymer Polymers 0.000 abstract description 8
- 238000005476 soldering Methods 0.000 abstract description 2
- 239000002904 solvent Substances 0.000 abstract description 2
- 208000032443 Masked facies Diseases 0.000 abstract 1
- 239000004020 conductor Substances 0.000 description 7
- 239000000463 material Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 229910000831 Steel Inorganic materials 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000002244 precipitate Substances 0.000 description 1
- 238000001556 precipitation Methods 0.000 description 1
- 238000007665 sagging Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0073—Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces
- H05K3/0082—Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces characterised by the exposure method of radiation-sensitive masks
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、プリント配線板の製造方法に係り、特に、小
径バイアホールを有する高密度プリント配線板に適用す
るのに好適な製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a printed wiring board, and particularly to a manufacturing method suitable for application to a high-density printed wiring board having small diameter via holes.
プリント配線板には、面付は実装部品を搭載するための
スルーホールおよび、このスルーホールの開口端部のプ
リント配線板上に形成され、上記面付は実装部品との電
気的接続用の端子となるランドが形成されている。また
、該面付は実装部品の半田付は性を向上するために、ス
ルーホール内部とランド部には銅めっきが施される。The printed wiring board has a through hole for mounting the mounted component, and is formed on the printed wiring board at the open end of this through hole, and the surface mounting has a terminal for electrical connection with the mounted component. A land has been formed. In addition, in order to improve the soldering properties of the mounted components, copper plating is applied to the inside of the through hole and the land portion.
従来のプリント配線板の製造方法では、例えば、特公昭
5o−26o22号公報に記載されているように、ラン
ド部およびスルーホール部を除いて回路導体の保護のた
めに、熱硬化型ソルダーレジストを形成し、化学銅めっ
きによりランド部およヒスルーホール部に銅めっきを形
成していた。In conventional printed wiring board manufacturing methods, for example, as described in Japanese Patent Publication No. 5O-26O22, a thermosetting solder resist is used to protect circuit conductors except for land areas and through-hole areas. Then, chemical copper plating was used to form copper plating on the land portion and the his-through hole portion.
また、特開昭60−12791号公報には、紫外線硬化
型ソルダーレジストを用いた技術が開示されているが、
ここでは、スルーホール内に銅めっきを形成した後のン
ルダーレジスト膜をパターン化する工程で使用している
。Furthermore, Japanese Patent Application Laid-Open No. 12791/1983 discloses a technique using an ultraviolet curing solder resist.
Here, it is used in the step of patterning the exposed resist film after copper plating is formed in the through hole.
上記第1の従来技術では、熱硬化型ソルダーレジストを
用いており、適用する基板としては、径の大きいスルー
ホールおよびランド(穴径α9rnm、ランド径1.4
mco)を有する基板である。その位置合わせ精度は、
印刷法を用いるので、±[L15m111くらいである
。In the first conventional technology, a thermosetting solder resist is used, and the substrate to which it is applied is a through hole with a large diameter and a land (hole diameter α9rnm, land diameter 1.4 nm).
mco). The alignment accuracy is
Since a printing method is used, it is approximately ±[L15m111.
一方、プリント配線板の表裏の導体回路を接続するため
の、径の小さいスルーホール(小径バイアホール)の穴
径はOJmm、ランド径は(15mmであり、ソルダー
レジストの位置合わせ精度は、少なくとも士(lL1f
fIm以上必要である。従って、ソルダーレジスト形成
後に、ランド部上およびスルーホール部内にめっきを行
5パートリーアディティブ法においては、従来の印刷法
による熱硬化型ソルダーレジストを、厳しい位置合わせ
精度が要求される小径バイアホールを有するプリント配
線板に適用することはできない。On the other hand, the hole diameter of the small diameter through hole (small diameter via hole) for connecting the conductor circuits on the front and back sides of the printed wiring board is OJmm, the land diameter is (15mm), and the alignment accuracy of the solder resist is at least (lL1f
fIm or more is required. Therefore, after forming the solder resist, plating is performed on the land portions and in the through-hole portions, and in the 5-part additive method, the thermosetting solder resist using the conventional printing method is used to form small-diameter via holes that require strict alignment accuracy. It cannot be applied to printed wiring boards.
また、とれもの問題を解決するために、ソルダーレジス
トを形成する前に、化学銅めりきによりライン部、ラン
ド部およびスルーホール部に銅めっきを形成し、その後
に、ソルダーレジストを形成する工法もあるが、この場
合は、めっきを施すとラインの側面にもめっきが付着し
、ライン幅が太くなるので、それを考慮してエツチング
時にその分だけ細くライン部を形成する必要がある。こ
のため、回路の断線などが増加する原因となり、パター
ンの細線化の大きな弊害となっている。In addition, in order to solve the problem of peeling, there is a method in which copper plating is formed on the lines, lands, and through holes by chemical copper plating before forming the solder resist, and then the solder resist is formed. However, in this case, when plating is applied, the plating also adheres to the side surfaces of the line and the line width becomes thicker, so it is necessary to take this into consideration and form the line portion to be that much thinner during etching. This causes an increase in circuit disconnections and the like, which is a major problem with thinning patterns.
本発明の目的は、ソルダーレジストの位置合わせ精度を
向上させ、めっき工程前における小径バイアホール内へ
のレジストの垂れ込みを防止し、接続の信頼性の高い小
径バイアホールを有する高密度プリント配線板を提供す
ることにある。The purpose of the present invention is to improve the alignment accuracy of solder resist, prevent the resist from sagging into small-diameter via holes before the plating process, and provide high-density printed wiring boards with small-diameter via holes with high connection reliability. Our goal is to provide the following.
上記の目的を達成するために、本発明の高密度プリント
配線板の製造方法は、銅箔が表裏両面(第1面および第
2面)に形成された基板に貫通穴をあげる工程と、上記
穴内に化学銅めっき用触媒層を形成する工程と、上記鋼
箔を所定の回路形状に形成する工程と、化学銅めっきに
より上記穴内および上記銅箔上に薄く銅めっき膜を形成
する工程と、上記基板の第1面全面に紫外線硬化型めっ
きレジスト兼ソルダーレジスト膜を塗布し、上記第1面
と反対の第2面から上記穴部をマスキングし、該第2面
側から紫外線を照射する工程と、上記第1面上の上記レ
ジスト膜の未硬化部分を除去する工程と、さらに、上記
第2面全面に紫外線硬化型めっきレジスト兼ソルダーレ
ジスト膜を塗布し、上記第1面から上記穴部をマスキン
グし、該第1面側から紫外線を照射する工程と、上記第
2面上の上記レジスト膜の未硬化部分を除去する工程と
、上記レジスト膜で覆われていない上記銅箔上に厚く銅
めっき膜を形成する工程と、所定の部分を除いてンルダ
ーレジスト膜を形成する工程とを具備することを特徴と
する。In order to achieve the above object, the method for manufacturing a high-density printed wiring board of the present invention includes the steps of forming through holes in a substrate on which copper foil is formed on both the front and back surfaces (first surface and second surface); a step of forming a catalyst layer for chemical copper plating in the hole, a step of forming the steel foil into a predetermined circuit shape, a step of forming a thin copper plating film in the hole and on the copper foil by chemical copper plating, A step of applying an ultraviolet curing plating resist/solder resist film to the entire first surface of the substrate, masking the hole from a second surface opposite to the first surface, and irradiating ultraviolet rays from the second surface side. and removing an uncured portion of the resist film on the first surface, further applying an ultraviolet curable plating resist/solder resist film to the entire surface of the second surface, and removing the uncured portion of the resist film from the first surface. a step of masking and irradiating ultraviolet rays from the first surface side; a step of removing an uncured portion of the resist film on the second surface; The method is characterized by comprising a step of forming a copper plating film, and a step of forming an exposed resist film except for a predetermined portion.
紫外線硬化型めっきレジスト兼ソルダーレジストを全面
塗布した面の反対面から紫外線を照射することにより、
レジスト塗布面にあるランド部およびライン部を含む導
体回路部が一種のレジスト形成用アートワークの役目を
果たし、理想的な位置合わせ精度(±001 mm )
によりレジストを形成できる。By irradiating ultraviolet rays from the opposite side of the surface fully coated with ultraviolet curing plating resist and solder resist,
The conductor circuit part including the land part and line part on the resist coated surface serves as a kind of artwork for resist formation, achieving ideal alignment accuracy (±001 mm).
A resist can be formed by
また、銅めっきを厚(形成する工程において、ライン部
が表面に露出しており、その上にはめっき層が形成され
るが、ライン部の側面はレジスト膜で埋め込まれている
ので、側面にはめっきが析出せず、めっき工程後も、ラ
イン幅は太くならない。従って、導体回路のエツチング
を行うとき、仕上り寸法通りに形成すればよく、従来の
ようにめっきの析出によりライン幅が太くなるのを見越
して予め細く形成する必要がないので、断線する問題を
解消できる。In addition, in the process of forming thick copper plating, the line portion is exposed on the surface and a plating layer is formed on it, but the side surface of the line portion is embedded with a resist film, so The plating does not precipitate, and the line width does not become thicker even after the plating process.Therefore, when etching a conductor circuit, it is only necessary to form it according to the finished dimensions, and unlike conventional methods, the line width becomes thicker due to plating precipitation. Since there is no need to form the wire thinner in advance in anticipation of the wire breakage, the problem of wire breakage can be solved.
本発明の工程において、薄くめっき膜を形成し。In the process of the present invention, a thin plating film is formed.
さらに、スルーホールをマスキングするのは、スルーホ
ール内のレジスト膜に紫外線が照射され、レジスト膜が
硬化して残存させないためである。Furthermore, the reason why the through-hole is masked is that the resist film inside the through-hole is irradiated with ultraviolet rays, which hardens the resist film and prevents it from remaining.
第1図(A)〜(H)は、本発明の高密度プリント配線
板の製造方法の一実施例を示す工程断面図である。FIGS. 1(A) to 1(H) are process cross-sectional views showing one embodiment of the method for manufacturing a high-density printed wiring board of the present invention.
まず、絶縁体からなる基材層3の表裏両面に銅箔1が形
成された銅張り積層板10の所定の位置にドリル等を用
いてスルーホール(小径バイアホールを含む)を形成し
、該穴内に化学銅めっき用触媒層2を形成する(第1図
(A))。First, through holes (including small-diameter via holes) are formed using a drill or the like at predetermined positions on a copper-clad laminate 10 in which copper foil 1 is formed on both the front and back sides of a base material layer 3 made of an insulator. A catalyst layer 2 for chemical copper plating is formed in the hole (FIG. 1(A)).
次に、公知のテンティング法により銅箔1をエツチング
して所望の導体回路パターンを形成し、このパターン化
した導体(ランド部、ライン部を含む)上およびスルー
ホール内に化学銅めっきにより銅めっき膜4を薄く(厚
さ(L5〜2.5μm)形成する(第1図(B))。Next, the copper foil 1 is etched using a known tenting method to form a desired conductor circuit pattern, and copper is deposited on the patterned conductor (including land and line parts) and in the through holes by chemical copper plating. The plating film 4 is formed thinly (thickness (L5 to 2.5 μm)) (FIG. 1(B)).
次に、プリント配線板の片面全面に紫外線硬化型めっき
レジストを兼ねたソルダーレジスト膜5を塗布し、その
反対面からスルーホール部をマスキングし、マスキング
面から紫外線7を照射する(第1図(C))。Next, a solder resist film 5 that also serves as an ultraviolet curing plating resist is applied to the entire surface of one side of the printed wiring board, the through-holes are masked from the opposite side, and ultraviolet rays 7 are irradiated from the masked surface (see Fig. 1). C)).
次に、レジスト膜5の未硬化部分をクロロセン等の溶剤
により除去する(第1図(D))。Next, the uncured portion of the resist film 5 is removed using a solvent such as chlorocene (FIG. 1(D)).
次に、レジスト膜5を形成した面と反対の面も同様にし
てレジスト膜5を形成して、第1図(E)、(F)とな
る。Next, a resist film 5 is similarly formed on the surface opposite to the surface on which the resist film 5 was formed, resulting in the results shown in FIGS. 1(E) and 1(F).
次に、レジスト膜5で覆われていない導体部分く厚付は
化学銅めっきを行い、厚い銅めっき膜8を形成する(第
1図(G))。Next, the conductor parts not covered with the resist film 5 are subjected to chemical copper plating to form a thick copper plating film 8 (FIG. 1(G)).
次に、部品面(図においては上面)は、面付は実装部品
搭載用の大径スルーホールを除いて全面に熱硬化型ソル
ダーレジストを塗布し、はんだ面(図においては下面)
は、大径スルーホールおよびそのランドを除いて全面に
熱硬化型ソルダーレジストを塗布して第1図(H)とな
る。Next, apply thermosetting solder resist to the entire surface of the component (top surface in the figure) except for the large-diameter through holes for mounting the mounted components, and then
Figure 1 (H) is obtained by applying a thermosetting solder resist to the entire surface except for the large-diameter through holes and their lands.
本実施例によれば、高精度にレジストを形成できるので
、厚付は化学銅めっき工程前におけるスルーホールに垂
れ込んだレジスト膜が残存することを防止でき、信頼性
を向上できる。また、ライン部上にも銅めっきが析出す
るが、ラインの側面にはめっきが析出しないので、従来
のように予めライン幅をめっき部分だげ細める必要がな
く、従って、ライン部における断線が増加することがな
い。According to this embodiment, since the resist can be formed with high precision, the thick resist film can be prevented from remaining in the through holes before the chemical copper plating process, and reliability can be improved. In addition, copper plating is deposited on the line part, but since the plating is not deposited on the side of the line, there is no need to narrow the line width in advance to the plated part as in the conventional method, and therefore, the possibility of wire breakage at the line part increases. There's nothing to do.
なお、第1図(H)で形成するレジスト膜に関しては、
紫外線硬化型レジストより銅表面への密着力が強い熱硬
化型レジストを使用した方がよい。Regarding the resist film formed in FIG. 1(H),
It is better to use a thermosetting resist, which has stronger adhesion to the copper surface than an ultraviolet curable resist.
以上説明したように、本発明の製造方法によれば、レジ
ストの位置合わせ精度が従来の士(L15mo+から士
(L01ffIIT+へと飛躍的に向上できる。従って
、厚付は化学銅めっき工程前の小径バイアホールへの垂
れ込んだレジスト膜が残存することがなく、化学銅めっ
きが良好に析出するので、信頼性の高い小径バイアホー
ルが形成できる。また、銅めつき工程後のライン幅の増
加がなく、従って、予めめっき工程後の増加分を見込ん
で細(する必要がないので、断線が少ない歩留りの良い
プリント配線板が得られる。As explained above, according to the manufacturing method of the present invention, the alignment accuracy of the resist can be dramatically improved from the conventional level (L15mo+) to the level (L01ffIIT+). There is no residual resist film hanging down into the via hole, and the chemical copper plating is deposited well, allowing the formation of highly reliable small-diameter via holes.In addition, the line width increases after the copper plating process. Therefore, there is no need to take into account the increase after the plating process and thin the wire in advance, so a printed wiring board with a high yield and less disconnection can be obtained.
第1図(A)〜(H)は、本発明の一実施例の高密度プ
リント配線板の製造工程断面図である。
1・・・銅箔
2・・・化学銅めっき用触媒
3・・・基材層
4・・・薄材は化学銅めっき膜
5・・・紫外線硬化型めっきレジスト兼ソルダーレジス
ト膜
6・・・スルーホールマスク
7・・・紫外線
8・・・厚付は化学銅めっき膜
9・・・熱硬化型ソルダーレジスト膜
10・・・銅張り積層板
: )FIGS. 1(A) to 1(H) are sectional views showing the manufacturing process of a high-density printed wiring board according to an embodiment of the present invention. 1... Copper foil 2... Catalyst for chemical copper plating 3... Base material layer 4... Thin material is chemical copper plating film 5... Ultraviolet curing type plating resist/solder resist film 6... Through-hole mask 7...UV light 8...Thick chemical copper plating film 9...Thermosetting solder resist film 10...Copper-clad laminate: )
Claims (1)
た基板に貫通穴をあける工程と、上記穴内に化学銅めっ
き用触媒層を形成する工程と、上記銅箔を所定の回路形
状に形成する工程と、化学銅めっきにより上記穴内およ
び上記銅箔上に薄く銅めっき膜を形成する工程と、上記
基板の第1面全面に紫外線硬化型めっきレジスト兼ソル
ダーレジスト膜を塗布し、上記第1面と反対の第2面か
ら上記穴部をマスキングし、該第2面側から紫外線を照
射する工程と、上記第1面上の上記レジスト膜の未硬化
部分を除去する工程と、さらに、上記第2面全面に紫外
線硬化型めっきレジスト兼ソルダーレジスト膜を塗布し
、上記第1面から上記穴部をマスキングし、該第1面側
から紫外線を照射する工程と、上記第2面上の上記レジ
スト膜の未硬化部分を除去する工程と、上記レジスト膜
で覆われていない上記銅箔上に厚く銅めっき膜を形成す
る工程と、所定の部分を除いてソルダーレジスト膜を形
成する工程とを具備することを特徴とする高密度プリン
ト配線板の製造方法。1. A process of making a through hole in a substrate with copper foil formed on both the front and back sides (first and second sides), a process of forming a catalyst layer for chemical copper plating in the hole, and a process of forming the copper foil into a predetermined circuit shape. a step of forming a thin copper plating film in the hole and on the copper foil by chemical copper plating; and a step of applying an ultraviolet curable plating resist and solder resist film to the entire first surface of the substrate; a step of masking the hole from a second surface opposite to the first surface and irradiating ultraviolet rays from the second surface side; and a step of removing an uncured portion of the resist film on the first surface; , applying an ultraviolet curable plating resist and solder resist film to the entire surface of the second surface, masking the holes from the first surface, and irradiating ultraviolet rays from the first surface side; a step of removing an uncured portion of the resist film, a step of forming a thick copper plating film on the copper foil not covered with the resist film, and a step of forming a solder resist film except for a predetermined portion. A method for manufacturing a high-density printed wiring board, comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14569688A JPH01315191A (en) | 1988-06-15 | 1988-06-15 | Manufacture of high density printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14569688A JPH01315191A (en) | 1988-06-15 | 1988-06-15 | Manufacture of high density printed wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01315191A true JPH01315191A (en) | 1989-12-20 |
Family
ID=15390992
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14569688A Pending JPH01315191A (en) | 1988-06-15 | 1988-06-15 | Manufacture of high density printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01315191A (en) |
-
1988
- 1988-06-15 JP JP14569688A patent/JPH01315191A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5369881A (en) | Method of forming circuit wiring pattern | |
US20060180346A1 (en) | High aspect ratio plated through holes in a printed circuit board | |
EP0457501A2 (en) | Method of manufacturing a multilayer wiring board | |
KR20010009975A (en) | Method of producing a multi-layer printed-circuit board | |
KR20010074918A (en) | Method for producing multi-layer circuits | |
JP2004146742A (en) | Manufacturing method for wiring board | |
JPH0710029B2 (en) | Method for manufacturing laminated circuit board | |
IL137026A (en) | Method of manufacturing multilayer wiring boards | |
JPH036880A (en) | Printed wiring board and manufacture thereof | |
JPH06314865A (en) | Printed wiring board | |
JPH08107263A (en) | Manufacturing method of printed-wiring board | |
JPH01315191A (en) | Manufacture of high density printed wiring board | |
JPH1117315A (en) | Manufacture of flexible circuit board | |
JPH077264A (en) | Manufacture of printed wiring board | |
JPH0548246A (en) | Manufacture of flexible printed circuit board | |
JPH03225894A (en) | Manufacture of printed wiring board | |
JP3130707B2 (en) | Printed circuit board and method of manufacturing the same | |
JPH08186357A (en) | Printed wiring board and manufacture thereof | |
KR20010077676A (en) | Method of producing a multi-layer printed-circuit board for a RF power amplifier | |
JP3812006B2 (en) | Manufacturing method of multilayer printed wiring board | |
JP3688940B2 (en) | Wiring pattern formation method for flexible circuit board | |
JPH0567871A (en) | Printed-wiring board and manufacture thereof | |
JPH118465A (en) | Manufacture of printed wiring board through additive method | |
JPH02119298A (en) | Manufacture of multilayer printed wiring board for mounting semiconductor element | |
JPS5846698A (en) | Method of producing printed circuit board |