JPH0567871A - Printed-wiring board and manufacture thereof - Google Patents

Printed-wiring board and manufacture thereof

Info

Publication number
JPH0567871A
JPH0567871A JP9651191A JP9651191A JPH0567871A JP H0567871 A JPH0567871 A JP H0567871A JP 9651191 A JP9651191 A JP 9651191A JP 9651191 A JP9651191 A JP 9651191A JP H0567871 A JPH0567871 A JP H0567871A
Authority
JP
Japan
Prior art keywords
resin film
photosensitive resin
copper
pads
insulating substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9651191A
Other languages
Japanese (ja)
Inventor
Hiroaki Terada
博昭 寺田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Toppan Circuit Solutions Toyama Inc
Original Assignee
NEC Toppan Circuit Solutions Toyama Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Toppan Circuit Solutions Toyama Inc filed Critical NEC Toppan Circuit Solutions Toyama Inc
Priority to JP9651191A priority Critical patent/JPH0567871A/en
Publication of JPH0567871A publication Critical patent/JPH0567871A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0094Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • H05K3/064Photoresists
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)

Abstract

PURPOSE:To eliminate the generation of a solder bridge and the generation of a defective connection due to a positional deviation by a method wherein steps are respectively formed on pads for electronic component mounting use. CONSTITUTION:A P-type photosensitive resin film is formed on the whole surface of an insulating substrate 2a and thereafter, is dried. Then, a first mask film for intercepting ultraviolet rays from a prescribed through hole 1a, wiring circuit 1b formation parts and pad 1d formation parts is abutted on the resin film and after an exposure is performed exposed parts of the resin film are selectively removed, a P-type photosensitive resin film etching resist 7a is formed, an etching of a conductor layer is performed in a state that the ultraviolet rays are cut and wiring circuits 1b and pads 1d are formed. Then, a second mask film 4b is abutted only on the pads 1d and after an exposure is performed, the etching resist 7a on the pads 1d is selectively removed and the pads 1d are partially etched to form the pads 1d having a step. Thereby, the generation of a solder bridge and the generation of a defective connection due to a positional deviation can be eliminated.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は印刷配線板とその製造方
法に関し、特に表面実装用の電子部品搭載用銅箔パッド
を有するスルーホール印刷配線板とその製造方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board and a method for manufacturing the same, and more particularly to a through-hole printed wiring board having a copper foil pad for mounting electronic components for surface mounting and a method for manufacturing the same.

【0002】[0002]

【従来の技術】一般に、スルーホール印刷配線板(以
下、T/H PWBと記す)の製造方法には、図4
(a)〜(d)及び図5(a),(b)に示す如きテン
ティング工法が多く用いられており、この方法によれ
ば、まず、図4(a)の如く、導体層1とスルーホール
1aを形成した絶縁基板2aの両面に、図4(b)の如
く、感光性ドライフィルム(以下、ドライフィルムと記
す)6を貼付し、この上から図4(c)の如く、第1の
マスクフィルム4aを介して所定の配線回路のパターン
を紫外線で焼き付ける。次に、現像液で不要部分のドラ
イフィルム6を除去し図4(b)の如く、テンティング
状態のエッチングレジスト6aと配線回路部分のエッチ
ングレジスト6bを得る。
2. Description of the Related Art Generally, a method of manufacturing a through-hole printed wiring board (hereinafter referred to as "T / H PWB") includes a method shown in FIG.
The tenting method shown in (a) to (d) and FIGS. 5 (a) and 5 (b) is often used. According to this method, first, as shown in FIG. As shown in FIG. 4 (b), a photosensitive dry film (hereinafter referred to as a dry film) 6 is attached to both surfaces of the insulating substrate 2a having the through holes 1a formed thereon. A predetermined wiring circuit pattern is printed with ultraviolet rays through the first mask film 4a. Next, the unnecessary portion of the dry film 6 is removed with a developing solution to obtain an etching resist 6a in a tenting state and an etching resist 6b for a wiring circuit portion as shown in FIG. 4B.

【0003】更に、図5(a)の如く、露光した導体層
1をエッチング除去した後、最後に、図5(b)の如
く、エッチングレジスト6a,6bを剥離除去してT/
H PWBを得る。
Further, as shown in FIG. 5 (a), after the exposed conductor layer 1 is removed by etching, finally, as shown in FIG. 5 (b), the etching resists 6a, 6b are peeled off to remove T / T.
Get HPWB.

【0004】又、図6(a)〜(d)及び図7(a)〜
(c)に示す如き穴埋め工法では、図6(a)の如く、
絶縁基板2aのスルーホール1aに図6(b)のよう
に、穴埋めインク3を充填,硬化させ、図6(c)の如
く、絶縁基板2a両面にドライフィルム6を貼付し、こ
の上から図6(d)の如く、第1のマスクフィルム4a
を介して所定の配線パターンを紫外線で焼き付ける。次
に、図7(a)の如く、現像液で不要部分のドライフィ
ルム6を除去しテンティング状態のエッチングレジスト
6aと配線回路部分のエッチングレジスト6bを得る。
更に、図7(b)の如く、露出した導体層1をエッチン
グ除去した後、最後に、エッチングレジスト6a,6b
及び穴埋めインク3を剥離除去して図7(c)に示すT
/H PWBを得る。
Further, FIGS. 6 (a) to 6 (d) and 7 (a) to
In the hole filling method as shown in (c), as shown in FIG.
The through hole 1a of the insulating substrate 2a is filled with the filling ink 3 as shown in FIG. 6 (b) and cured, and the dry film 6 is attached to both surfaces of the insulating substrate 2a as shown in FIG. 6 (c). 6 (d), the first mask film 4a
A predetermined wiring pattern is baked with ultraviolet rays through. Next, as shown in FIG. 7A, an unnecessary portion of the dry film 6 is removed with a developing solution to obtain an etching resist 6a in a tenting state and an etching resist 6b of a wiring circuit portion.
Further, as shown in FIG. 7B, after the exposed conductor layer 1 is removed by etching, finally, the etching resists 6a and 6b are removed.
And the hole-filling ink 3 is removed by peeling to remove T shown in FIG.
/ H PWB.

【0005】尚、この工法では、スクリーン印刷によっ
て形成された画像をエッチングレジストとして用いるこ
ともできる。
In this method, an image formed by screen printing can also be used as an etching resist.

【0006】この他、図8(a)〜(d)及び図9
(a),(b)の様な従来のポジ型感光性樹脂膜の電着
コーティング工法は図8(a)の如く、導体層1とスル
ーホール1aを形成した絶縁基板2aの両面に図8
(b)の如く、ポジ型感光性樹脂膜7を全面に電着コー
ティングし図8(c)の如く、第1のマスクフィルム4
aを介して所定の配線回路のパターンを紫外線で焼き付
ける。次に、現像液で不要部分のポジ型感光性樹脂膜7
を除去し、図8(d)のポジ型感光性樹脂膜エッチング
レジスト7aを得る。更に、図9(a)の如く、露出し
た導体層1をエッチング除去した後、最後に、図9
(b)の如く、ポジ型感光性樹脂膜エッチングレジスト
7aを剥離除去して、印刷配線板を得る。
Besides this, FIGS. 8A to 8D and FIG.
As shown in FIG. 8A, the conventional positive electrodeposition coating method for the positive photosensitive resin film as shown in FIGS. 8A and 8B is applied to both sides of the insulating substrate 2a on which the conductor layer 1 and the through holes 1a are formed.
As shown in FIG. 8B, the positive photosensitive resin film 7 is electrodeposited on the entire surface, and the first mask film 4 is formed as shown in FIG. 8C.
A predetermined wiring circuit pattern is printed with ultraviolet rays through a. Next, the positive photosensitive resin film 7 of the unnecessary portion with the developing solution.
Is removed to obtain a positive photosensitive resin film etching resist 7a shown in FIG. Further, as shown in FIG. 9A, after the exposed conductor layer 1 is removed by etching, finally, as shown in FIG.
As shown in (b), the positive photosensitive resin film etching resist 7a is peeled and removed to obtain a printed wiring board.

【0007】又、図10(a)〜(c)に示す如き、ア
ディティブ工法では図10(a)に示す如く、触媒入り
接着層付き積層板2bに穴あけした後、図10(b)の
如く、非配線回路部分にめっきレジスト5を塗布した
後、所定の配線回路部分に無電解銅めっき8を施し、ス
ルーホールと配線回路を形成し、図10(c)の如く、
T/HPWBを得る。
Further, as shown in FIGS. 10 (a) to 10 (c), in the additive method, as shown in FIG. 10 (a), after punching the laminated plate 2b with the adhesive layer containing the catalyst, as shown in FIG. 10 (b). After applying the plating resist 5 to the non-wiring circuit portion, electroless copper plating 8 is applied to a predetermined wiring circuit portion to form a through hole and a wiring circuit, as shown in FIG.
Obtain T / HPWB.

【0008】[0008]

【発明が解決しようとする課題】近年、配線回路の高密
度化の有力な手法とし、絶縁基板に部品のリード挿入の
ためのスルーホールを設けず絶縁基板表面に作られた配
線回路パターンと電子部品搭載用パッドのみを用いて電
気的接続を行う表面実装化が急速に進む中で、これに適
した形態を有する印刷配線板及びその製造方法を確立す
ることが課題であった。
In recent years, as an effective method for increasing the density of wiring circuits, a wiring circuit pattern and an electronic circuit formed on the surface of the insulating substrate without providing through holes for lead insertion of components on the insulating substrate. Amid the rapid progress of surface mounting in which electrical connection is performed using only component mounting pads, it has been a problem to establish a printed wiring board having a form suitable for this and a manufacturing method thereof.

【0009】テンティング工法、穴埋め工法、アディテ
ィブ工法などの従来の製造方法による印刷配線板では図
11(a),(b)の如く、電子部品搭載用銅箔パッド
(以下パッドと記す)1d部分の表面形状は平滑である
ため、表面実装部品のリード9をはんだ付するパッド1
a部が近接している場合、リフロー時のクリームはんだ
の流れによるはんだブリッジ11が発生しやすく、ま
た、部品マウント時の位置ずれによる接続不良が発生し
やすいという困難な問題点があった。
In a printed wiring board manufactured by a conventional manufacturing method such as a tenting method, a hole filling method, an additive method, etc., as shown in FIGS. 11 (a) and 11 (b), a copper foil pad (hereinafter referred to as a pad) 1d portion for mounting an electronic component is used. Since the surface shape of the pad is smooth, the pad 1 for soldering the leads 9 of the surface mount component
When the parts a are close to each other, the solder bridge 11 is likely to occur due to the flow of the cream solder at the time of reflow, and the connection failure is likely to occur due to the positional deviation at the time of mounting the components.

【0010】これらの対策として、アディティブ工法で
めっきレジストと無電解銅の厚みに段差をつける方法も
行われているが、パッド1d内側に段差がつけられない
為、部品位置ずれが発生するという課題があった。
As a countermeasure against these problems, a method of making a step difference in the thickness of the plating resist and the electroless copper by an additive method has been carried out, but since the step cannot be made inside the pad 1d, the problem of component displacement occurs. was there.

【0011】本発明の目的は、はんだブリッジの発生と
部品マウント時の位置ずれによる接続不良の発生がな
く、信頼性の高い印刷配線板及びその製造方法を提供す
ることにある。
It is an object of the present invention to provide a highly reliable printed wiring board and a method for manufacturing the same, which does not cause a solder bridge and a connection failure due to a position shift when mounting a component.

【0012】[0012]

【課題を解決するための手段】本発明は、スルーホール
と電子部品搭載用パッドとを有する印刷配線板において
前記電子部品搭載用パッドに段差を形成したことを特徴
とする。
The present invention is characterized in that a step is formed on the electronic component mounting pad in a printed wiring board having a through hole and an electronic component mounting pad.

【0013】本発明の印刷配線板の製造方法は、銅張絶
縁基板に穴を穿孔した後、該穴及び前記銅張絶縁基板表
面に銅めっき層を形成する工程と、ポジ型感光性樹脂膜
を前記銅張絶縁基板上に電着コーティングする工程と、
所定の配線回路とスルーホールの銅箔パッドのパターン
を有する第1のマスクフィルムを前記ポジ型感光性樹脂
膜上に当接し露光した後、現像により露光部分の前記ポ
ジ型感光性樹脂膜を選択的に除去する工程と、露出した
銅部分をエッチング除去する工程と、更に得られた前記
銅張絶縁基板に対して所定のパターン形状を有する第2
のマスクフィルムを当接し、前記銅箔パッド部分の内側
を選択的に露光した後、現像により露光部分の前記ポジ
型感光性樹脂膜を除去する工程と、露出した銅部分をエ
ッチングにより所定の厚み分だけ除去する工程と、残存
する前記ポジ型感光性樹脂膜を剥離除去する工程とを有
する。
The method for manufacturing a printed wiring board of the present invention comprises the steps of forming a hole in a copper-clad insulating substrate and then forming a copper plating layer on the hole and the surface of the copper-clad insulating substrate, and a positive photosensitive resin film. A step of electrodeposition coating on the copper clad insulating substrate,
A first mask film having a predetermined wiring circuit and a through-hole copper foil pad pattern is brought into contact with the positive photosensitive resin film to expose it, and then the positive photosensitive resin film in the exposed portion is selected by development. Second step of removing the exposed copper portion by etching, and the second step having a predetermined pattern shape with respect to the obtained copper-clad insulating substrate.
A mask film is abutted, and after selectively exposing the inside of the copper foil pad portion, a step of removing the positive photosensitive resin film in the exposed portion by development and etching the exposed copper portion to a predetermined thickness And a step of removing the remaining positive photosensitive resin film by peeling.

【0014】[0014]

【実施例】次に本発明の実施例について図面を参照して
説明する。
Embodiments of the present invention will now be described with reference to the drawings.

【0015】図1(a)〜(d)及び図2(a)〜
(e)は本発明の一実施例を説明する工程順に示した断
面図である。
1A to 1D and 2A to 2A.
(E) is sectional drawing shown in order of a process explaining one Example of this invention.

【0016】まず図1(a)の如く、絶縁基板2aに穴
を穿孔した後、導体層1を形成する。絶縁基板2aの材
質としては、例えばガラス布基材エポキシ樹脂板やガラ
ス基材ポリイミド樹脂板を使用できる。
First, as shown in FIG. 1A, a hole is drilled in the insulating substrate 2a, and then the conductor layer 1 is formed. As the material of the insulating substrate 2a, for example, a glass cloth base epoxy resin plate or a glass base polyimide resin plate can be used.

【0017】次に、絶縁基板2aの表面全体に図1
(b)の如く、ポジ型感光性樹脂膜7を電着コーティン
グにより形成した後、乾燥する。
Next, FIG. 1 is formed on the entire surface of the insulating substrate 2a.
As shown in (b), the positive photosensitive resin film 7 is formed by electrodeposition coating and then dried.

【0018】次に、図1(c)の如く、所定のスルーホ
ール,配線回路、および、パッド形成部の紫外線を遮断
する第1のマスクフィルム4aを当接し露光後、図1
(d)の如く、露光部分のポジ型感光性樹脂膜7を選択
的に除去しポジ型感光性樹脂膜エッチングレジスト7a
を形成する現像処理を行い、図2(a)の如く、導体層
の1次エッチングを紫外線をカットしたイエロールーム
内で行い配線回路1b、および、パッド1dを形成す
る。
Next, as shown in FIG. 1 (c), a predetermined through hole, a wiring circuit, and a first mask film 4a for blocking ultraviolet rays in the pad forming portion are brought into contact with each other, and after exposure,
As shown in (d), the positive photosensitive resin film 7 in the exposed portion is selectively removed to remove the positive photosensitive resin film etching resist 7a.
2A, the wiring layer 1b and the pad 1d are formed by primary etching of the conductor layer in a yellow room where ultraviolet rays are cut, as shown in FIG.

【0019】次に、図2(b)の如く、パッド1dのみ
に所定の形状の第2のマスクフィルム4bを当接し露光
後、パッド1d上のポジ型感光性樹脂膜エッチングレジ
スト7aを選択的に除去する現像処理を行い、図2
(d)の如く、パッド1dを部分的に5〜30μm程度
エッチングする2次エッチングを行い段差のあるパッド
1dを形成する。
Next, as shown in FIG. 2B, the second mask film 4b having a predetermined shape is brought into contact with only the pad 1d, and after exposure, the positive type photosensitive resin film etching resist 7a on the pad 1d is selectively selected. After the development process to remove
As shown in (d), the pad 1d is partially etched by about 5 to 30 [mu] m for secondary etching to form a pad 1d having a step.

【0020】最後に図2(e)の如く、残存するポジ型
感光性樹脂膜エッチングレジスト7aを除去して、本実
施例のT/H PWBを得る。
Finally, as shown in FIG. 2E, the remaining positive type photosensitive resin film etching resist 7a is removed to obtain the T / H PWB of this embodiment.

【0021】[0021]

【発明の効果】以上から明らかなように本発明によれ
ば、図3(a),(b)の如く段差のあるパッド1bを
有する印刷配線板を製造でき、近年の高密度印刷配線板
への表面実装時における従来のはんだ付け不良を大幅に
改善することができる効果がある。
As is apparent from the above, according to the present invention, it is possible to manufacture a printed wiring board having a pad 1b having a step as shown in FIGS. 3 (a) and 3 (b). There is an effect that the conventional soldering failure at the time of surface mounting can be greatly improved.

【0022】従来この種のはんだ付け不良の主要因は表
面実装時のクリームはんだ印刷工程におけるクリームは
んだ印刷厚みのばらつきによるものと、リフロー工程時
のはんだ流れによるものであり、ブリッジ不良やはんだ
不足による接触不良の原因となっていた。これに対して
本発明による段差あり電子部品搭載用銅箔パッドを有す
る印刷配線板ではリフロー時におけるはんだ流れを防止
でき、更に、搭載部品の位置ずれの問題を解決できる信
頼性の高い表面実装に適した形態を有する印刷配線板の
製造が可能となる効果がある。
Conventionally, the main cause of this type of soldering failure is due to the variation in the thickness of the cream solder printed in the solder paste printing process at the time of surface mounting and the solder flow in the reflow process. It was a cause of poor contact. On the other hand, in the printed wiring board having the stepped electronic component mounting copper foil pad according to the present invention, solder flow at the time of reflow can be prevented, and further, a highly reliable surface mounting capable of solving the problem of displacement of mounted components There is an effect that a printed wiring board having a suitable form can be manufactured.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を説明する工程順に示した断
面図である。
1A to 1D are cross-sectional views showing a process sequence for explaining an embodiment of the present invention.

【図2】本発明の一実施例を説明する工程順に示した断
面図である。
2A to 2D are cross-sectional views showing a process sequence for explaining an embodiment of the present invention.

【図3】本発明の一実施例のパッドに電子部品のリード
を接続した構成図で、図3(a)は斜視図,図3(b)
はそのA−A′断面図である。
3A and 3B are configuration diagrams in which a lead of an electronic component is connected to a pad according to an embodiment of the present invention. FIG. 3A is a perspective view and FIG.
Is a sectional view taken along line AA ′.

【図4】従来のテンティング工法による印刷配線板の製
造方法を説明する工程順に示した断面図である。
4A to 4C are cross-sectional views showing a method of manufacturing a printed wiring board by a conventional tenting method in order of steps.

【図5】従来のテンティング工法による印刷配線板の製
造方法を説明する工程順に示した断面図である。
5A to 5D are cross-sectional views showing a method of manufacturing a printed wiring board by a conventional tenting method in order of steps.

【図6】従来の穴埋め工法による印刷配線板の製造方法
を説明する工程順に示した断面図である。
FIG. 6 is a cross-sectional view showing a method of manufacturing a printed wiring board by a conventional hole-filling method in the order of steps.

【図7】従来の穴埋め工法による印刷配線板の製造方法
を説明する工程順に示した断面図である。
7A to 7C are cross-sectional views showing a method of manufacturing a printed wiring board by a conventional hole filling method in order of steps.

【図8】従来のポジ型感光性樹脂電着コーティングによ
る印刷配線板の製造方法を説明する工程順に示した断面
図である。
FIG. 8 is a cross-sectional view showing the order of steps for explaining a conventional method for producing a printed wiring board by positive-type photosensitive resin electrodeposition coating.

【図9】従来のポジ型感光性樹脂電着コーティングによ
る印刷配線板の製造方法を説明する工程順に示した断面
図である。
9A to 9D are cross-sectional views showing a method of manufacturing a conventional printed wiring board by positive-type photosensitive resin electrodeposition coating in the order of steps.

【図10】従来のアディティブ工法による印刷配線板の
製造方法を説明する工程順に示した断面図である。
FIG. 10 is a cross-sectional view showing a method of manufacturing a printed wiring board by a conventional additive method in the order of steps.

【図11】従来の印刷配線板の一例のパッドに電子部品
のリードを接続した構成図で、図11(a)は斜視図,
図11(b)はそのA−A′線断面図である。
FIG. 11 is a configuration diagram in which leads of an electronic component are connected to pads of an example of a conventional printed wiring board, FIG. 11 (a) is a perspective view,
FIG. 11B is a sectional view taken along the line AA '.

【符号の説明】[Explanation of symbols]

1 導体層 1a スルーホール 1b 配線回路 1c スルーホールランド 1d パッド 2a 絶縁基板 2b 触媒入り接着層付き積層板 3 穴埋めインク 4a 第1のマスクフィルム 4b 第2のマスクフィルム 5 めっきレジスト 6 ドライフィルム 6a,6b エッチングレジスト 7 ポジ型感光性樹脂膜 7a ポジ型感光性樹脂膜レジスト 8 無電解銅めっき 9 リード 10 はんだ 11 ブリッジ 1 Conductor Layer 1a Through Hole 1b Wiring Circuit 1c Through Hole Land 1d Pad 2a Insulating Substrate 2b Laminated Plate with Adhesive Layer with Catalyst 3 Hole Filling Ink 4a First Mask Film 4b Second Mask Film 5 Plating Resist 6 Dry Film 6a, 6b Etching resist 7 Positive type photosensitive resin film 7a Positive type photosensitive resin film resist 8 Electroless copper plating 9 Lead 10 Solder 11 Bridge

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 スルーホールと電子部品搭載用パッドと
を有する印刷配線板において前記電子部品搭載用パッド
に段差を形成したことを特徴とする印刷配線板。
1. A printed wiring board having a through hole and an electronic component mounting pad, wherein a step is formed on the electronic component mounting pad.
【請求項2】 銅張絶縁基板に穴を穿孔した後、該穴及
び前記銅張絶縁基板表面に銅めっき層を形成する工程
と、ポジ型感光性樹脂膜を前記銅張絶縁基板上に電着コ
ーティングする工程と、所定の配線回路とスルーホール
の銅箔パッドのパターンを有する第1のマスクフィルム
を前記ポジ型感光性樹脂膜上に当接し露光した後、現像
により露光部分の前記ポジ型感光性樹脂膜を選択的に除
去する工程と、露出した銅部分をエッチング除去する工
程と、更に得られた前記銅張絶縁基板に対して所定のパ
ターン形状を有する第2のマスクフィルムを当接し、前
記銅箔パッド部分の内側を選択的に露光した後、現像に
より露光部分の前記ポジ型感光性樹脂膜を除去する工程
と、露出した銅部分をエッチングにより所定の厚み分だ
け除去する工程と、残存する前記ポジ型感光性樹脂膜を
剥離除去する工程とを有することを特徴とする印刷配線
板の製造方法。
2. A step of forming a copper plating layer on the hole and the surface of the copper-clad insulating substrate after forming a hole in the copper-clad insulating substrate, and a positive photosensitive resin film on the copper-clad insulating substrate. Coating step, exposing a first mask film having a predetermined wiring circuit and a copper foil pad pattern of through holes on the positive type photosensitive resin film, and then exposing the positive type photosensitive resin film to develop the positive type A step of selectively removing the photosensitive resin film, a step of removing the exposed copper portion by etching, and a step of bringing a second mask film having a predetermined pattern into contact with the obtained copper-clad insulating substrate. A step of selectively exposing the inside of the copper foil pad portion and then removing the positive photosensitive resin film in the exposed portion by development; and a step of removing the exposed copper portion by a predetermined thickness by etching. , The rest And a step of peeling and removing the existing positive photosensitive resin film.
JP9651191A 1991-04-26 1991-04-26 Printed-wiring board and manufacture thereof Pending JPH0567871A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9651191A JPH0567871A (en) 1991-04-26 1991-04-26 Printed-wiring board and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9651191A JPH0567871A (en) 1991-04-26 1991-04-26 Printed-wiring board and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH0567871A true JPH0567871A (en) 1993-03-19

Family

ID=14167157

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9651191A Pending JPH0567871A (en) 1991-04-26 1991-04-26 Printed-wiring board and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH0567871A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001034679A1 (en) * 1999-11-10 2001-05-17 Pi R & D Co., Ltd. Imide-benzoxazole polycondensate and process for producing the same
WO2024038511A1 (en) * 2022-08-17 2024-02-22 三菱電機株式会社 Semiconductor device and method for manufacturing semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001034679A1 (en) * 1999-11-10 2001-05-17 Pi R & D Co., Ltd. Imide-benzoxazole polycondensate and process for producing the same
US6890626B1 (en) 1999-11-10 2005-05-10 Pi R&D Co., Ltd. Imide-benzoxazole polycondensate and process for producing the same
WO2024038511A1 (en) * 2022-08-17 2024-02-22 三菱電機株式会社 Semiconductor device and method for manufacturing semiconductor device

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