JPH0129837Y2 - - Google Patents

Info

Publication number
JPH0129837Y2
JPH0129837Y2 JP1121984U JP1121984U JPH0129837Y2 JP H0129837 Y2 JPH0129837 Y2 JP H0129837Y2 JP 1121984 U JP1121984 U JP 1121984U JP 1121984 U JP1121984 U JP 1121984U JP H0129837 Y2 JPH0129837 Y2 JP H0129837Y2
Authority
JP
Japan
Prior art keywords
wiring layer
signal wiring
signal
layers
grounding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1121984U
Other languages
English (en)
Japanese (ja)
Other versions
JPS59195798U (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS59195798U publication Critical patent/JPS59195798U/ja
Application granted granted Critical
Publication of JPH0129837Y2 publication Critical patent/JPH0129837Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/0929Conductive planes
    • H05K2201/09327Special sequence of power, ground and signal layers in multilayer PCB

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP1121984U 1983-06-10 1984-01-31 多層プリント配線板 Granted JPS59195798U (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US47337783A 1983-06-10 1983-06-10
US473377 1983-06-10

Publications (2)

Publication Number Publication Date
JPS59195798U JPS59195798U (ja) 1984-12-26
JPH0129837Y2 true JPH0129837Y2 (es) 1989-09-11

Family

ID=23879282

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1121984U Granted JPS59195798U (ja) 1983-06-10 1984-01-31 多層プリント配線板

Country Status (4)

Country Link
JP (1) JPS59195798U (es)
BR (1) BR8401005A (es)
DE (1) DE3408046A1 (es)
GB (1) GB8405864D0 (es)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4030190A (en) * 1976-03-30 1977-06-21 International Business Machines Corporation Method for forming a multilayer printed circuit board

Also Published As

Publication number Publication date
JPS59195798U (ja) 1984-12-26
GB8405864D0 (en) 1984-04-11
BR8401005A (pt) 1984-10-16
DE3408046A1 (de) 1984-12-13

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