JPH01289201A - Chip resistor and manufacture thereof - Google Patents
Chip resistor and manufacture thereofInfo
- Publication number
- JPH01289201A JPH01289201A JP63119501A JP11950188A JPH01289201A JP H01289201 A JPH01289201 A JP H01289201A JP 63119501 A JP63119501 A JP 63119501A JP 11950188 A JP11950188 A JP 11950188A JP H01289201 A JPH01289201 A JP H01289201A
- Authority
- JP
- Japan
- Prior art keywords
- electrode terminal
- external electrode
- layer
- terminal layer
- chip resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 4
- 238000000034 method Methods 0.000 claims abstract description 11
- 239000000758 substrate Substances 0.000 claims description 16
- 239000011521 glass Substances 0.000 abstract description 10
- 229910052751 metal Inorganic materials 0.000 abstract description 10
- 239000002184 metal Substances 0.000 abstract description 10
- 239000004020 conductor Substances 0.000 abstract description 8
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 abstract description 6
- 238000010304 firing Methods 0.000 abstract description 5
- 239000011230 binding agent Substances 0.000 abstract description 4
- 239000011347 resin Substances 0.000 abstract description 4
- 229920005989 resin Polymers 0.000 abstract description 4
- 229910052709 silver Inorganic materials 0.000 abstract description 4
- 239000004332 silver Substances 0.000 abstract description 4
- 239000000126 substance Substances 0.000 abstract 1
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 5
- 230000001681 protective effect Effects 0.000 description 5
- 229910000679 solder Inorganic materials 0.000 description 5
- 229910052759 nickel Inorganic materials 0.000 description 3
- 238000005476 soldering Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 2
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
Landscapes
- Details Of Resistors (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は広範な電子機器に用いられるチップ抵抗器とそ
の製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a chip resistor used in a wide variety of electronic devices and a method for manufacturing the same.
従来の技術
近年、電子機器の小型化や高性能化に対する要求が高ま
るにつれ、チップ抵抗器の需要は著しく増加している。BACKGROUND OF THE INVENTION In recent years, as demands for smaller electronic devices and higher performance have increased, the demand for chip resistors has increased significantly.
従来のチップ抵抗器は第3図に示す構造のものであり、
第3図において1は絶縁性基板、2は一次電極端子層、
3は抵抗膜、4は絶縁保護膜、5は外部電極層である。The conventional chip resistor has the structure shown in Figure 3.
In FIG. 3, 1 is an insulating substrate, 2 is a primary electrode terminal layer,
3 is a resistive film, 4 is an insulating protective film, and 5 is an external electrode layer.
このような従来例によるチップ抵抗器は通常アルミナな
どのセラミックから成る絶縁性基板1の一方の主面上に
酸化ルテニウムとガラスの溶結体から成る抵抗膜3と、
その表面にガラスから成る絶縁保護膜4を設け、抵抗膜
3の相対する一対の両端部には銀パラジウムとガラスの
焼結体から成る一次電極端子層2、さらには絶縁性基板
1の両側壁面と絶縁性基板1の裏面の一部にまたがって
コの字型に銀や銀パラジウムの焼結体から成る外部電極
層5を設けたものである。Such a conventional chip resistor usually has a resistive film 3 made of a fused ruthenium oxide and glass on one main surface of an insulating substrate 1 made of ceramic such as alumina;
An insulating protective film 4 made of glass is provided on its surface, and a primary electrode terminal layer 2 made of a sintered body of silver-palladium and glass is provided at both opposing ends of the resistive film 3, and furthermore, both side wall surfaces of the insulating substrate 1 are provided. An external electrode layer 5 made of a sintered body of silver or silver-palladium is provided in a U-shape over a part of the back surface of the insulating substrate 1.
そして、この外部電極層5にはバレルめっき法によりニ
ッケルおよび最外層にはんだ金属層を被覆し、はんだづ
け性にすぐれた電極構造としている。The external electrode layer 5 is coated with nickel and the outermost layer is a solder metal layer by barrel plating to provide an electrode structure with excellent solderability.
このようなチップ抵抗器をプリント配線板に実装すると
第4図に示すような取付は構造となる。When such a chip resistor is mounted on a printed wiring board, the mounting structure will be as shown in FIG.
第4図において、6はプリント配線板、了は回路導体層
、8ははんだ金属層である。In FIG. 4, 6 is a printed wiring board, 8 is a circuit conductor layer, and 8 is a solder metal layer.
発明が解決しようとする課題
しかしながらこのようなチップ抵抗器では、プリント配
線板6に接続するための外部電極層5が抵抗膜3を形成
した矩形状絶縁性基板1の相対する一対の両端部と側壁
面に沿ってコの字型に構成されたものであるので、この
ような外部電極層6を形成するには極めて煩雑な工程を
経なければならず、生産性に欠けるため低価格化がはか
りにくいことや、このようなチップ抵抗器をブリ゛ント
配線板6に実装してはんだ接続する場合にはプリント配
線板6の回路導体層7のはんだづけ面積を広くとる必要
があるため、電子回路の高密度化がはかりにくいという
不都合があった。Problems to be Solved by the Invention However, in such a chip resistor, the external electrode layer 5 for connection to the printed wiring board 6 is connected to a pair of opposing ends of the rectangular insulating substrate 1 on which the resistive film 3 is formed. Since the external electrode layer 6 is formed in a U-shape along the side wall surface, it is necessary to go through an extremely complicated process to form such an external electrode layer 6, which results in a lack of productivity, making it difficult to reduce the price. It is difficult to measure, and when such a chip resistor is mounted on a printed wiring board 6 and connected by soldering, it is necessary to have a large soldering area for the circuit conductor layer 7 of the printed wiring board 6. There was a disadvantage that it was difficult to increase the density of the material.
本発明ではこのような従来例の欠点を解決し、経済性と
高密度化に適したチップ抵抗器を提供するものである。The present invention solves these drawbacks of the conventional example and provides a chip resistor that is economical and suitable for high density.
課題を解決するための手段
この課題を解決するために本発明は絶縁性基板の少くと
も一方の主面上に抵抗膜を有し、この抵抗膜と同一面上
の相対する一対の両端部に抵抗膜よりも突出した構造の
外部電極層を設けた構成としたものである。Means for Solving the Problems In order to solve this problem, the present invention has a resistive film on at least one main surface of an insulating substrate, and a pair of opposing ends on the same surface as the resistive film. This structure includes an external electrode layer that protrudes beyond the resistive film.
作用
このようにチップ抵抗器の外部電極層全抵抗膜と同一面
上の相対する一対の両端部にのみ突起状に構成すること
により安価でかつ高密度化に適したチップ抵抗器が実現
できることとなる。Function In this way, by configuring the external electrode layer of the chip resistor with protrusions only at both ends of the pair on the same surface as the entire resistive film, it is possible to realize a chip resistor that is inexpensive and suitable for high density. Become.
実施例
以下、本発明の一実施例を図面を参照しながら説明する
。EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.
第1図は本発明の第一の実施例におけるチップ抵抗器の
断面図である。FIG. 1 is a sectional view of a chip resistor in a first embodiment of the present invention.
第1図において、9は絶縁基板、10は一次電極端子層
、11は抵抗膜、12は絶縁保護膜、13は突起状外部
電極層である。In FIG. 1, 9 is an insulating substrate, 10 is a primary electrode terminal layer, 11 is a resistive film, 12 is an insulating protective film, and 13 is a protruding external electrode layer.
以上の構成から成るチップ抵抗器について以下その実施
例の詳細を説明する。Examples of the chip resistor having the above configuration will be described in detail below.
本発明の第一の実施例では矩形状に容易に分割できるよ
うにスナップ加工を施こしたアルミナなどのセラミック
から成る絶縁基板9の一方の主面上に銀や鋏パラジウム
とガラスフリット、樹脂バインダーを混合した導体ペー
ストを用いてスクリーン印刷法などにより所定のパター
ン状に塗布し、800〜900℃の高温中で焼成するこ
とにより一次電極端子層10を形成した。In the first embodiment of the present invention, silver, scissor palladium, glass frit, and a resin binder are placed on one main surface of an insulating substrate 9 made of ceramic such as alumina, which is snap-processed so that it can be easily divided into rectangular shapes. The primary electrode terminal layer 10 was formed by applying a mixed conductive paste in a predetermined pattern using a screen printing method or the like and firing it at a high temperature of 800 to 900°C.
次いで、この−次電極端子層10に両端が接するように
酸化ルテニウムとガラスフリット、樹脂バインダーから
成る抵抗体ペーストを同じくスクリーン印刷法により所
定の抵抗値が得られるパターン状に塗布し、SOO〜9
00℃の高温中で焼成することによって抵抗膜11を形
成した。この場合、抵抗膜11とその両端部に形成する
一次電極端子層10はアルミナよりなる絶縁基板9の主
面上に多数個取りができるようにした。Next, a resistor paste made of ruthenium oxide, glass frit, and a resin binder is applied in a pattern to obtain a predetermined resistance value by the same screen printing method so that both ends are in contact with this secondary electrode terminal layer 10.
The resistive film 11 was formed by firing at a high temperature of 00°C. In this case, the resistive film 11 and the primary electrode terminal layer 10 formed at both ends thereof can be formed in large numbers on the main surface of the insulating substrate 9 made of alumina.
そして、アルミナよりなる絶縁基板9の主面上に多数個
形成した抵抗膜111cそれぞれ所定の抵抗値になるよ
うにレーザートリミングを行った後にその表面にガラス
ペーストを塗布して600〜eoo℃の温度で焼成する
ことにより絶縁保護膜12を形成した。A large number of resistive films 111c formed on the main surface of the insulating substrate 9 made of alumina are laser trimmed so that each has a predetermined resistance value, and then a glass paste is applied to the surface and heated to a temperature of 600 to eoo°C. An insulating protective film 12 was formed by firing the film.
それから−次宣標端子層100表面に突起状の外部電極
端子層13を形成するが、その形成方法として本実施例
では銀−パラジウムとガラスの焼結体から成る一次電極
端子層1oの表面にさらに銀又は銀−パラジウムとガラ
スフリット、樹脂バインダーから成るメタルグレーズ系
の導体ペーストを厚く塗布し、これを抵抗膜11の焼成
温度よりも低い温度(500〜600℃)で焼成するこ
とによって突起状の外部電極端子層13を形成した。Next, a protruding external electrode terminal layer 13 is formed on the surface of the terminal layer 100. In this embodiment, the protruding external electrode terminal layer 13 is formed on the surface of the primary electrode terminal layer 1o made of a sintered body of silver-palladium and glass. Furthermore, a metal glaze-based conductor paste consisting of silver or silver-palladium, glass frit, and a resin binder is applied thickly, and this is fired at a temperature lower than the firing temperature of the resistive film 11 (500 to 600°C) to form protrusions. An external electrode terminal layer 13 was formed.
この場合、突起状外部電極端子層13の厚さは抵抗膜1
0〜20μの厚さに対し、30〜60μの厚さとし、そ
の表面にははんだづけ性をよくするためにニッケルや銅
などの金属を無電解めっき法や電気めっき法により被覆
し、さらに最外層にはばんだ金属を被覆した。In this case, the thickness of the protruding external electrode terminal layer 13 is the same as that of the resistive film 1.
The thickness is 30 to 60 μ compared to the 0 to 20 μ, and the surface is coated with metal such as nickel or copper by electroless plating or electroplating to improve solderability, and the outermost layer is coated with metal such as nickel or copper by electroless plating or electroplating. Covered with solder metal.
また一方、突起状の外部電極端子層13の形成方法とし
て他の実施例では、耐蝕性を有するボール状の突起物を
一次電極端子層1oに導電性接着剤を用いて接着する方
法も試みた。On the other hand, in another example, as a method for forming the protruding external electrode terminal layer 13, a method was also attempted in which a ball-shaped protrusion having corrosion resistance was bonded to the primary electrode terminal layer 1o using a conductive adhesive. .
そして、アルミナよりなる絶縁基板9の主面上に多数個
の抵抗膜11と、突起状の外部電極端子層13を設けた
ものは最終的に個片状に分割することによりチップ抵抗
器を作った。The insulating substrate 9 made of alumina with a large number of resistive films 11 and protruding external electrode terminal layers 13 formed on the main surface is finally divided into individual pieces to form a chip resistor. Ta.
このうにして作ったチップ抵抗器は第2図に示すように
抵抗膜11側を下向きにしたいわゆるフェースダウン方
式でプリント配線基板14に実装し、高密度な電子回路
を実現することができた。The chip resistor made in this way was mounted on a printed wiring board 14 using the so-called face-down method with the resistive film 11 side facing downward, as shown in Figure 2, making it possible to realize a high-density electronic circuit. .
第2図において、14はプリント配線基板、16は回路
導体層、16ははんだ金属層である。In FIG. 2, 14 is a printed wiring board, 16 is a circuit conductor layer, and 16 is a solder metal layer.
発明の効果
以上の説明から明らかなように本発明によるチップ抵抗
器はその外部電極端子層が抵抗膜と同一面上に突起状に
形成された構造であるので、従来例のように抵抗膜の相
対する一対の両端部と側壁面にわたってコの字型に形成
されたものと異なり、絶縁基板上に多数個取りした抵抗
膜の相対する一対の両端部に一括して同時に突起状の外
部電極端子層を設けることができるので電極形成工程が
大幅に簡単化でき、生産性の向上による低価格化がはか
れることはもとより、このチップ抵抗器をフェースダウ
ン方式によりプリント配線板に実装した場合、プリント
配線板の回路導体層のはんだづけ面積を広くとる必要な
しにチップ抵抗器の突起状の外部電極端子が確実に回路
導体層にはんだ接続ができるので高密度電子回路を作る
ことができるなどの効果が得られ工業的価値の大なるも
のである。Effects of the Invention As is clear from the above explanation, the chip resistor according to the present invention has a structure in which the external electrode terminal layer is formed in a protruding manner on the same surface as the resistive film, so that the chip resistor according to the present invention has a structure in which the external electrode terminal layer is formed in a protruding shape on the same surface as the resistive film. Unlike the U-shaped external electrode terminals that are formed in a U-shape across both ends of a pair of opposing ends and the side wall surface, external electrode terminals are simultaneously protruded at both ends of a pair of opposing resistive films formed in large numbers on an insulating substrate. Since layers can be provided, the electrode formation process can be greatly simplified, and not only can the cost be lowered by improving productivity, but also when this chip resistor is mounted on a printed wiring board using the face-down method, the printed wiring The projecting external electrode terminals of chip resistors can be reliably soldered to the circuit conductor layer without requiring a large soldering area for the circuit conductor layer of the board, making it possible to create high-density electronic circuits. It is of great industrial value.
第1図は本発明の一実施例によるチップ抵抗器の断面図
、第2図は同チップ抵抗器をプリント配線板に実装した
ものの要部断面図、第3図は従来例によるチップ抵抗器
の断面図、第4図は同チップ抵抗器をプリント配線板に
実装したものの要部断面図である。
8・・・・・・絶縁基板、9・・・・・・−次電極端子
層、1゜・・・・・・抵抗膜、11・・・・・・絶縁保
護膜、12・・・・・・突起状外部電極端子層、13・
・・・・・プリント配線基板、14・・・・・・回路導
体層、16・・・・・・はんだ金属層。
代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図
16−・−1;んた金属1Fig. 1 is a sectional view of a chip resistor according to an embodiment of the present invention, Fig. 2 is a sectional view of a main part of the same chip resistor mounted on a printed wiring board, and Fig. 3 is a sectional view of a chip resistor according to a conventional example. 4 is a sectional view of a main part of the same chip resistor mounted on a printed wiring board. 8...Insulating substrate, 9...Next electrode terminal layer, 1°...Resistance film, 11...Insulating protective film, 12...・Protruding external electrode terminal layer, 13・
...Printed wiring board, 14...Circuit conductor layer, 16...Solder metal layer. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 16-・-1; Nta Metal 1
Claims (2)
値を有する抵抗膜を有し、この抵抗膜と同一面上の相対
する一対の両端部に前記抵抗膜よりも突起状の外部電極
端子層を設けたチップ抵抗器。(1) A resistive film having a predetermined resistance value is provided on at least one main surface of an insulating substrate, and a pair of opposing ends on the same surface as the resistive film have a protruding shape than the resistive film. A chip resistor with an external electrode terminal layer.
値を有する多数個の抵抗膜と、この抵抗膜の相対する一
対の両端部に前記抵抗膜よりも突起状の外部電極端子層
を設けた後に前記絶縁性基板を個片状に分割するチップ
抵抗器の製造方法。(2) A large number of resistive films having a predetermined resistance value on at least one main surface of an insulating substrate, and external electrode terminals that are more protruding than the resistive films at both opposing ends of the resistive films. A method for manufacturing a chip resistor, which comprises dividing the insulating substrate into individual pieces after forming layers.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63119501A JP2839262B2 (en) | 1988-05-17 | 1988-05-17 | Chip resistor and manufacturing method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63119501A JP2839262B2 (en) | 1988-05-17 | 1988-05-17 | Chip resistor and manufacturing method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01289201A true JPH01289201A (en) | 1989-11-21 |
JP2839262B2 JP2839262B2 (en) | 1998-12-16 |
Family
ID=14762827
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63119501A Expired - Fee Related JP2839262B2 (en) | 1988-05-17 | 1988-05-17 | Chip resistor and manufacturing method thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2839262B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6150920A (en) * | 1996-05-29 | 2000-11-21 | Matsushita Electric Industrial Co., Ltd. | Resistor and its manufacturing method |
US6184772B1 (en) * | 1997-08-07 | 2001-02-06 | Murata Manufacturing Co., Ltd. | Chip thermistors |
WO2014171087A1 (en) * | 2013-04-18 | 2014-10-23 | パナソニック株式会社 | Resistor and manufacturing method for same |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5680152A (en) * | 1979-12-06 | 1981-07-01 | Nec Corp | Thin-film type integrated circuit device |
JPS5863703U (en) * | 1981-10-23 | 1983-04-28 | 三菱電機株式会社 | chip resistor |
JPS6465801A (en) * | 1987-09-04 | 1989-03-13 | Murata Manufacturing Co | Resistance element |
-
1988
- 1988-05-17 JP JP63119501A patent/JP2839262B2/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5680152A (en) * | 1979-12-06 | 1981-07-01 | Nec Corp | Thin-film type integrated circuit device |
JPS5863703U (en) * | 1981-10-23 | 1983-04-28 | 三菱電機株式会社 | chip resistor |
JPS6465801A (en) * | 1987-09-04 | 1989-03-13 | Murata Manufacturing Co | Resistance element |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6150920A (en) * | 1996-05-29 | 2000-11-21 | Matsushita Electric Industrial Co., Ltd. | Resistor and its manufacturing method |
US6184772B1 (en) * | 1997-08-07 | 2001-02-06 | Murata Manufacturing Co., Ltd. | Chip thermistors |
WO2014171087A1 (en) * | 2013-04-18 | 2014-10-23 | パナソニック株式会社 | Resistor and manufacturing method for same |
JPWO2014171087A1 (en) * | 2013-04-18 | 2017-02-16 | パナソニックIpマネジメント株式会社 | Resistor and its manufacturing method |
US9620267B2 (en) | 2013-04-18 | 2017-04-11 | Panasonic Intellectual Property Management Co., Ltd. | Resistor and manufacturing method for same |
Also Published As
Publication number | Publication date |
---|---|
JP2839262B2 (en) | 1998-12-16 |
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