JPH01283987A - Printed circuit board - Google Patents

Printed circuit board

Info

Publication number
JPH01283987A
JPH01283987A JP11521588A JP11521588A JPH01283987A JP H01283987 A JPH01283987 A JP H01283987A JP 11521588 A JP11521588 A JP 11521588A JP 11521588 A JP11521588 A JP 11521588A JP H01283987 A JPH01283987 A JP H01283987A
Authority
JP
Japan
Prior art keywords
circuit
analog
power supply
digital
power source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11521588A
Other languages
Japanese (ja)
Inventor
Yoshifumi Yamazaki
嘉文 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP11521588A priority Critical patent/JPH01283987A/en
Publication of JPH01283987A publication Critical patent/JPH01283987A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

PURPOSE:To reduce the malfunction or abnormal output of an analog circuit by separating the power source wirings of the circuit from those of a digital circuit and wiring it. CONSTITUTION:A power source circuit 4 and power source wirings 5 are separated at a power source supply side, the power sources of analog components 1, 3 and a digital component 2 are extended at wirings and wired. That is, all the components 1, 3 and 2 are separately wired. Thus, since a noise generated in the digital circuit does not affect an influence directly to the analog circuit, the malfunction and abnormal output of the analog circuit can be reduced.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はプリント配線基板における電源の配線に関する
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to power supply wiring in a printed wiring board.

〔従来の技術〕[Conventional technology]

従来アナログ回路とデジタル回路は同一基板にあり、前
記アナログ回路の電源と前記デジタル回路の電源が同一
電源より供給されるプリント配線基板において、データ
の流れあるいは信号の配線パターンを優先する場合第2
図<a>*ch>の様にアナログ部品1.デジタル部品
2.アナログ部品3.の順に配置される。この時電源配
線パターンは配線4及び配線5の様に配線されていた。
Conventionally, an analog circuit and a digital circuit are on the same board, and in a printed wiring board where the power supply for the analog circuit and the power supply for the digital circuit are supplied from the same power supply, the second method is used when prioritizing the data flow or signal wiring pattern.
As shown in the diagram <a>*ch>, analog parts 1. Digital parts 2. Analog parts 3. are arranged in this order. At this time, the power supply wiring pattern was wired as wiring 4 and wiring 5.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし従来技術では、特に最近のデジタルエOの高速化
やOMQS化に伴うノイズがアナログ部品の電源を通じ
てアナログ回路の入力や出力に影響を与えアナログ回路
の誤動作あるいは異常出力されるという問題点があった
However, with the conventional technology, there is a problem in that the noise associated with the recent increase in the speed of digital AO and the shift to OMQS affects the input and output of the analog circuit through the power supply of analog components, resulting in malfunction or abnormal output of the analog circuit. Ta.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のプリント配線基板は、アナログ回路とデジタル
回路の混在回路において、上記アナログ回路の電源配線
と上記デジタル回路の電源配線を分離し配線したことを
特徴とする特 〔実施例〕 第1図は本発明の実施例である。電源配線4゜及び電源
配線5を電源供給側で分離しアナログ部品1.及び5と
デジタル部品2の電源をそれぞれに電源配線を延ばして
配線する。第1図(α)の場合アナログ部品1および3
とデジタル部品2の全ての部品に対して分離配線してい
る。第1図(b)の場合、アナログ部品1及び3の電源
は同一配線し、デジタル部品2の電源配線は電源供給側
より分離し配線している。
The printed wiring board of the present invention is characterized in that in a mixed circuit of analog circuits and digital circuits, the power supply wiring for the analog circuit and the power supply wiring for the digital circuit are separated and wired. This is an example of the present invention. The power supply wiring 4° and the power supply wiring 5 are separated on the power supply side, and the analog components 1. 5 and the digital component 2 by extending the power supply wiring to each of them. In the case of Fig. 1 (α), analog parts 1 and 3
and all components of digital component 2 are wired separately. In the case of FIG. 1(b), the power supplies for analog components 1 and 3 are wired together, and the power supply wire for digital component 2 is wired separately from the power supply side.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明によれば、デジタル回路の電源
配線とアナログ回路の電源配線とを分割して配線したこ
とにより、デジタル回路で発生するノイズはアナログ回
路へは直接影響しないので、アナログ回路の誤動作及び
異常出力が低減できるという効果を有する。
As described above, according to the present invention, the power supply wiring for the digital circuit and the power supply wiring for the analog circuit are separated and routed, so that the noise generated in the digital circuit does not directly affect the analog circuit. This has the effect of reducing malfunctions and abnormal outputs.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(OL)は従来技術のプリント配線基板における
電源配線の一実施例を示す図。 第1図Cb)は従来技術のプリント配線基板における電
源配線の他の実施例を示す図。 第2図(α)は本発明のプリント配線基板における一実
施例を示す図。 第2図(b)は本発明のプリント配線基板における他の
実施例を示す図。 1.3・・・・・・アナログ部品 2  ・・・・・・デジタル部品 4  ・・・・・・電源配線パターン 5  ・・・・・・電源配線パターン 以上 出願人 セイコーエプソン株式会社 代理人 弁理士 鈴木喜三部(他1名)((Lン (シ)
FIG. 1 (OL) is a diagram showing an example of power supply wiring in a conventional printed wiring board. FIG. 1Cb) is a diagram showing another embodiment of power supply wiring in a printed wiring board according to the prior art. FIG. 2(α) is a diagram showing an embodiment of the printed wiring board of the present invention. FIG. 2(b) is a diagram showing another embodiment of the printed wiring board of the present invention. 1.3...Analog parts 2...Digital parts 4...Power wiring pattern 5...Power wiring pattern and above Applicant Seiko Epson Corporation Agent Patent attorney Mr. Kisanbe Suzuki (and 1 other person) ((Ln(shi)

Claims (1)

【特許請求の範囲】[Claims] アナログ回路とデジタル回路の混在回路において前記ア
ナログ回路の電源配線と前記デジタル回路の電源配線を
分割して配線したことを特徴とするプリント配線基板。
1. A printed wiring board characterized in that in a mixed circuit of analog circuits and digital circuits, power supply wiring for the analog circuit and power supply wiring for the digital circuit are separated and routed.
JP11521588A 1988-05-11 1988-05-11 Printed circuit board Pending JPH01283987A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11521588A JPH01283987A (en) 1988-05-11 1988-05-11 Printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11521588A JPH01283987A (en) 1988-05-11 1988-05-11 Printed circuit board

Publications (1)

Publication Number Publication Date
JPH01283987A true JPH01283987A (en) 1989-11-15

Family

ID=14657215

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11521588A Pending JPH01283987A (en) 1988-05-11 1988-05-11 Printed circuit board

Country Status (1)

Country Link
JP (1) JPH01283987A (en)

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