JPH07288376A - Surface mount printed wiring board - Google Patents

Surface mount printed wiring board

Info

Publication number
JPH07288376A
JPH07288376A JP8013694A JP8013694A JPH07288376A JP H07288376 A JPH07288376 A JP H07288376A JP 8013694 A JP8013694 A JP 8013694A JP 8013694 A JP8013694 A JP 8013694A JP H07288376 A JPH07288376 A JP H07288376A
Authority
JP
Japan
Prior art keywords
land
wiring pattern
manhattan phenomenon
heat capacity
surface mount
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8013694A
Other languages
Japanese (ja)
Inventor
Kunihito Nakazuru
州人 中▲鶴▼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP8013694A priority Critical patent/JPH07288376A/en
Publication of JPH07288376A publication Critical patent/JPH07288376A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE:To prevent Manhattan phenomenon generated during mounting of a surface mount part by providing a buffer pattern between a land and a wiring pattern to make heat capacity of right and left lands equal. CONSTITUTION:A wiring pattern 31 is connected to a left electrode land 21 of a part 1. A wiring pattern 32 is connected to a right electrode part land 22 of the part. In the state, heat capacity of the left electrode part is smaller than heat capacity of the right electrode part and Manhattan phenomenon is generated. Since Manhattan phenomenon is generated by a time lag in melting of solder in right and left electrode parts of the part 1 during mounting, buffer patterns 11, 12 are provided between a land and a wiring pattern to make heat capacity in the right and left electrodes equal. Thereby, it is possible to eliminate the time lag in melting of solder and to prevent generation of Manhattan phenomenon.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、プリント配線板に関
し、特に表面実装部品の実装時に発生するマンハッタン
現象を防止するものに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board, and more particularly to a printed wiring board which prevents the Manhattan phenomenon which occurs when mounting surface mount components.

【０００２】[0002]

【従来の技術】プリント配線板において、マンハッタン
現象の発生を防止するために、半田付け方法や半田付け
条件を変更して対応してきたが、マンハッタン現象の発
生を完全に防止することは出来なかった。2. Description of the Related Art In printed wiring boards, the soldering method and the soldering conditions have been changed in order to prevent the occurrence of the Manhattan phenomenon, but it has not been possible to completely prevent the occurrence of the Manhattan phenomenon. .

【０００３】[0003]

【発明が解決しようとする課題】本発明の目的は、プリ
ント配線板において、特に表面実装部品の実装時に発生
するマンハッタン現象を防止するものを提供することに
ある。SUMMARY OF THE INVENTION It is an object of the present invention to provide a printed wiring board which prevents the Manhattan phenomenon which occurs particularly when mounting surface mount components.

【０００４】[0004]

【課題を解決するための手段】上記の目的は、部品を実
装するランドと配線パターンの間に左右のランドの熱容
量が等しくなるようにバッファパターンを設けることに
より達成できる。The above object can be achieved by providing a buffer pattern between the land on which the component is mounted and the wiring pattern so that the heat capacities of the left and right lands are equal.

【０００５】[0005]

【作用】マンハッタン現象は、実装時に部品の左右の電
極部の半田が融解するタイミングがずれることにより発
生する。この融解タイミングのずれは、左右の電極部
（ランド）の熱容量の不正合により発生する。従って、
部品を実装するランドと配線パターンの間に左右のラン
ドの熱容量が等しくなるようにバッファパターンを設け
ることで、融解タイミングのずれがなくなり、マンハッ
タン現象の発生を防止することができる。The Manhattan phenomenon occurs when the timing of melting the solder of the left and right electrode parts of the component is different during mounting. The deviation of the melting timing is caused by the mismatch of the heat capacities of the left and right electrode portions (lands). Therefore,
By providing the buffer pattern so that the heat capacities of the left and right lands are equal between the land on which the component is mounted and the wiring pattern, it is possible to eliminate the deviation of the melting timing and prevent the Manhattan phenomenon from occurring.

【０００６】[0006]

【実施例】図１に本発明の一実施例を示す構成図を示
す。部品１の左電極部(ランド２１)には、配線パターン
３１が接続される。また、部品１の右電極部（ランド２
２）には、配線パターン３２が接続される。このままで
は、左電極部の熱容量が右電極部の熱容量に比べ小さ
く、マンハッタン現象が発生する。そこで、左右の電極
部の熱容量が等しくなるよう、ランドと配線パターン間
にバッファパターン１１及び１２を設ける。特に、バッ
ファパターンは、左右の電極部に設ける必要はなく片側
の電極部でもよい。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram showing an embodiment of the present invention. The wiring pattern 31 is connected to the left electrode portion (land 21) of the component 1. In addition, the right electrode portion of the component 1 (land 2
The wiring pattern 32 is connected to 2). If left as it is, the heat capacity of the left electrode portion is smaller than that of the right electrode portion, and the Manhattan phenomenon occurs. Therefore, buffer patterns 11 and 12 are provided between the land and the wiring pattern so that the left and right electrode portions have the same heat capacity. In particular, the buffer pattern does not have to be provided on the left and right electrode portions and may be on one side electrode portion.

【０００７】[0007]

【発明の効果】本発明によれば、実装部品の左右の電極
部の熱容量が等しくなり、半田の融解タイミングのずれ
がなくなり、マンハッタン現象の発生を防止することが
できる。According to the present invention, the heat capacities of the left and right electrode portions of the mounted component are equalized, the deviation of the melting timing of the solder is eliminated, and the occurrence of the Manhattan phenomenon can be prevented.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の一実施例を示す構成図である。FIG. 1 is a configuration diagram showing an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

１…表面実装部品、１１，１２…バッファパターン、２
１，２２…ランド、３１，３２…配線パターン。1 ... Surface mount component, 11, 12 ... Buffer pattern, 2
1, 22 ... Land, 31, 32 ... Wiring pattern.

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】表面実装部品を実装するプリント配線板に
おいて、該部品を実装するランドと配線パターンの間に
左右のランドの熱容量が等しくなるようにバッファパタ
ーンを設けたことを特徴とする表面実装プリント配線
板。1. A printed wiring board for mounting a surface mount component, wherein a buffer pattern is provided between a land for mounting the component and a wiring pattern so that the heat capacities of left and right lands are equal. Printed wiring board.
JP8013694A 1994-04-19 1994-04-19 Surface mount printed wiring board Pending JPH07288376A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8013694A JPH07288376A (en) 1994-04-19 1994-04-19 Surface mount printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8013694A JPH07288376A (en) 1994-04-19 1994-04-19 Surface mount printed wiring board

Publications (1)

Publication Number Publication Date
JPH07288376A true JPH07288376A (en) 1995-10-31

Family

ID=13709843

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8013694A Pending JPH07288376A (en) 1994-04-19 1994-04-19 Surface mount printed wiring board

Country Status (1)

Country Link
JP (1) JPH07288376A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010135522A (en) * 2008-12-04 2010-06-17 Koa Corp Mounting board of current detection resistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010135522A (en) * 2008-12-04 2010-06-17 Koa Corp Mounting board of current detection resistor

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