JPH04142096A - Printed circuit board - Google Patents
Printed circuit boardInfo
- Publication number
- JPH04142096A JPH04142096A JP2264164A JP26416490A JPH04142096A JP H04142096 A JPH04142096 A JP H04142096A JP 2264164 A JP2264164 A JP 2264164A JP 26416490 A JP26416490 A JP 26416490A JP H04142096 A JPH04142096 A JP H04142096A
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- board
- length
- delay value
- equal length
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001105 regulatory effect Effects 0.000 abstract 4
- 238000010586 diagram Methods 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、プリント配線基板に関し、特にプリント配線
基板の配線設計における等裏配線を行うプリント配線基
板に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a printed wiring board, and particularly to a printed wiring board that performs back-to-back wiring in the wiring design of the printed wiring board.
従来、プリント配線基板の等裏配線は、第4図に示すよ
うに最短で配線出来る場合でも、配線長を同じにするた
めに迂回配線をするもので、たとえば等長髭線ネット4
bに等長髭線ネット4aの線長を合わせる為に迂回配線
をするといったことを行ない、等裏配線の対象外ネット
5もこの迂回配線4aにもとすき配線長が最短となる様
に配線していた。Conventionally, as shown in Fig. 4, equal back wiring on printed wiring boards requires detour wiring to make the wiring lengths the same even when wiring can be done in the shortest possible length.
Detour wiring is performed to match the line length of the equal length whisker wire net 4a to b, and the net 5 that is not subject to equal back wiring is also wired so that the gap wiring length is the shortest in this detour wiring 4a. Was.
上述した従来のプリント基板配線では、等裏配線の対象
となる配線の中で、配線長が最も長い配線と、等長にな
る様に、他の配線を行うため、必要以上に基板上の配線
エリアをとり、等裏配線対象外の配線にも影響を与えて
しまう欠点がある。In the conventional printed circuit board wiring described above, the longest wiring among the wiring targeted for equal-back wiring is connected to the other wiring so that the length is equal to that of the other wiring. It has the disadvantage that it takes up a lot of area and also affects wiring that is not targeted for equal-back wiring.
本発明のプリント配線基板は、等裏配線のディレィ値を
擬似的に等価にするための、ディレィ値調整用基板と、
その調整用基板を実装するための手段を有している。The printed wiring board of the present invention includes a delay value adjustment board for making the delay values of equal-back wiring pseudo-equivalent;
It has means for mounting the adjustment board.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例を示す。第1図において本発
明の一実施例はディレィ値調整用基板(ディレィモジュ
ール)搭載のプリント配線基板で、ディレィ値調整用基
板2は他の部品と同様にプリント配線基板1上に配置、
配線される。FIG. 1 shows an embodiment of the invention. In FIG. 1, one embodiment of the present invention is a printed wiring board equipped with a delay value adjustment board (delay module), and the delay value adjustment board 2 is placed on the printed wiring board 1 like other parts.
Wired.
第2図は、ディレィ値調整用基板(ディレィモジュール
)2の外形図で、プリント基板1にディレィ値調整用配
線パターン3を施し、このパターン2の長さを変える事
によりディレィ値を調整する。FIG. 2 is an outline drawing of a delay value adjustment board (delay module) 2. A delay value adjustment wiring pattern 3 is provided on the printed circuit board 1, and by changing the length of this pattern 2, the delay value is adjusted.
第3図は、ディレィモジュールを用いて等長髭線を実施
した例を示す図で、等長髭線ネット4に、ディレィモジ
ュール実装用スルーホール7を定義し、等長髭線の対象
外ネット5と同様に、配線長が最短となる様ルーティン
グを行う事により、従来の様な、等長髭線ネット4bに
等長髭線ネット4aの線長を合わせる為に迂回配線をす
るといっな事を無くする。FIG. 3 is a diagram showing an example of implementing equal length whiskers using a delay module, in which a through hole 7 for mounting a delay module is defined in the equal length whiskers net 4, and a net other than the target of equal length whiskers is defined. Similarly to 5, by performing routing so that the wiring length is the shortest, it is possible to perform detour wiring to match the line length of the equal length whisker wire net 4a to the equal length whisker wire net 4b as in the conventional method. Eliminate.
以上説明したように本発明は、ディレィ値調整用基板を
用いて擬似的に配線長を等価にする事により、等長髭線
対象のネット以外の配線に影響を与えることなく容易に
等長髭線が実現でき、プリント基板配線の総配線長を短
縮する効果がある。As explained above, the present invention uses a delay value adjustment board to make the wiring lengths pseudo-equivalent, thereby easily creating equal-length whiskers without affecting the wiring other than the target net. This has the effect of shortening the total wiring length of printed circuit board wiring.
第1図は、本発明のディレィ値調整用基板(ディレィモ
ジュール)搭載のプリント配線基板を示す図、第2図は
ディレィ値調整用基板(ディレィモジュール)を示す図
、第3図は、本発明の一実施例におけるプリント基板配
線を示す図、第4図は従来の配線方式によるプリント基
板配線を示す図である。
1・・・プリント配線基板、2・・・ディレィ値調整用
基板、3・・・ディレィ値調整用配線、4・・・等長髭
線ネット、5・・・等長髭線対象外のネット、6・・・
スルーホール、7・・・ディレィモジュール実装用スル
ーホール。FIG. 1 is a diagram showing a printed wiring board equipped with a delay value adjustment board (delay module) according to the present invention, FIG. 2 is a diagram showing a delay value adjustment board (delay module), and FIG. FIG. 4 is a diagram showing printed circuit board wiring according to the conventional wiring method. DESCRIPTION OF SYMBOLS 1... Printed wiring board, 2... Board for delay value adjustment, 3... Wiring for delay value adjustment, 4... Equal length whisker line net, 5... Net not subject to equal length whisker lines , 6...
Through hole, 7...Through hole for mounting the delay module.
Claims (1)
板において、該基板との配線パターンの中継として信号
の伝搬時間を調整させるディレイ値調整用基板を搭載し
たことを特徴とするプリント配線基板。What is claimed is: 1. A printed wiring board that connects mounted components with each other, and is equipped with a delay value adjustment board that adjusts the propagation time of a signal as a relay for a wiring pattern with the printed wiring board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2264164A JPH04142096A (en) | 1990-10-02 | 1990-10-02 | Printed circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2264164A JPH04142096A (en) | 1990-10-02 | 1990-10-02 | Printed circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04142096A true JPH04142096A (en) | 1992-05-15 |
Family
ID=17399347
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2264164A Pending JPH04142096A (en) | 1990-10-02 | 1990-10-02 | Printed circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04142096A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06215071A (en) * | 1993-01-14 | 1994-08-05 | Nec Corp | Clock wiring design device |
JPH07192031A (en) * | 1993-12-27 | 1995-07-28 | Nec Corp | Method and device for automatic layout for integrated circuit |
US8869092B2 (en) | 2013-03-25 | 2014-10-21 | Fujitsu Limited | Wiring inspection apparatus and wiring inspection method |
US8875085B2 (en) | 2013-03-25 | 2014-10-28 | Fujitsu Limited | Wiring inspection apparatus and wiring inspection method |
-
1990
- 1990-10-02 JP JP2264164A patent/JPH04142096A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06215071A (en) * | 1993-01-14 | 1994-08-05 | Nec Corp | Clock wiring design device |
JPH07192031A (en) * | 1993-12-27 | 1995-07-28 | Nec Corp | Method and device for automatic layout for integrated circuit |
US8869092B2 (en) | 2013-03-25 | 2014-10-21 | Fujitsu Limited | Wiring inspection apparatus and wiring inspection method |
US8875085B2 (en) | 2013-03-25 | 2014-10-28 | Fujitsu Limited | Wiring inspection apparatus and wiring inspection method |
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