JPH01270260A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPH01270260A
JPH01270260A JP63099673A JP9967388A JPH01270260A JP H01270260 A JPH01270260 A JP H01270260A JP 63099673 A JP63099673 A JP 63099673A JP 9967388 A JP9967388 A JP 9967388A JP H01270260 A JPH01270260 A JP H01270260A
Authority
JP
Japan
Prior art keywords
film
polycrystalline silicon
doped
metallic
silicon film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63099673A
Inventor
Katsuyuki Inayoshi
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP63099673A priority Critical patent/JPH01270260A/en
Publication of JPH01270260A publication Critical patent/JPH01270260A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE: To stabilize quality, and to increase working speed by properly using electrode wirings having two layer structure composed of a doped n-type polycrystalline silicon film and a metallic film or a metallic silicide film laminated onto the polycrystalline silicon film and an electrode wiring as a single layer consisting of only a doped p-type polycrystalline silicon film.
CONSTITUTION: A doped p-type polycrystalline silicon film having poor contact property with a metallic film and a metallic silicide film is not laminated on the metallic film or the metallic silicide film, and an electrode wiring 35 made up only the doped p-type polycrystalline silicon film is shaped. On the other hand, an electrode wiring 33 having two layer structure in which the metallic film or the metallic silicide film is laminated onto a doped n-type polycrystalline silicon film having excellent contact properties is formed. Accordingly, the resistance of the electrode wiring 35 composed of only the doped p-type polycrystalline silicon film is increased slightly, but wiring resistance is lowered by shortening a wiring distance, and the resistance of the electrode wiring 33 having two layer structure is reduced, thus increasing the working speed of the whole IC.
COPYRIGHT: (C)1989,JPO&Japio
JP63099673A 1988-04-21 1988-04-21 Semiconductor device and manufacture thereof Pending JPH01270260A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63099673A JPH01270260A (en) 1988-04-21 1988-04-21 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63099673A JPH01270260A (en) 1988-04-21 1988-04-21 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH01270260A true JPH01270260A (en) 1989-10-27

Family

ID=14253550

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63099673A Pending JPH01270260A (en) 1988-04-21 1988-04-21 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH01270260A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6072221A (en) * 1997-06-30 2000-06-06 Kabushiki Kaisha Toshiba Semiconductor device having self-aligned contact plug and metallized gate electrode

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6196750A (en) * 1984-10-17 1986-05-15 Oki Electric Ind Co Ltd Wiring structure for semiconductor device
JPS62155553A (en) * 1985-12-17 1987-07-10 Siemens Ag Simultaneous manufacture of bipolar transistor and cmos transistor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6196750A (en) * 1984-10-17 1986-05-15 Oki Electric Ind Co Ltd Wiring structure for semiconductor device
JPS62155553A (en) * 1985-12-17 1987-07-10 Siemens Ag Simultaneous manufacture of bipolar transistor and cmos transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6072221A (en) * 1997-06-30 2000-06-06 Kabushiki Kaisha Toshiba Semiconductor device having self-aligned contact plug and metallized gate electrode

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