JPH01267059A - Thermal head device - Google Patents
Thermal head deviceInfo
- Publication number
- JPH01267059A JPH01267059A JP9713788A JP9713788A JPH01267059A JP H01267059 A JPH01267059 A JP H01267059A JP 9713788 A JP9713788 A JP 9713788A JP 9713788 A JP9713788 A JP 9713788A JP H01267059 A JPH01267059 A JP H01267059A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- substrate
- comb
- parallel
- substrates
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims abstract description 67
- 239000000463 material Substances 0.000 claims abstract description 14
- 239000010410 layer Substances 0.000 abstract description 16
- 238000004519 manufacturing process Methods 0.000 abstract description 12
- 239000011241 protective layer Substances 0.000 abstract description 6
- 229920003002 synthetic resin Polymers 0.000 abstract description 4
- 239000000057 synthetic resin Substances 0.000 abstract description 4
- 238000005516 engineering process Methods 0.000 description 6
- 238000000059 patterning Methods 0.000 description 4
- 239000010408 film Substances 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 206010057040 Temperature intolerance Diseases 0.000 description 1
- 238000005299 abrasion Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000008543 heat sensitivity Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
- B41J2/315—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material
- B41J2/32—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads
- B41J2/345—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads characterised by the arrangement of resistors or conductors
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
この発明は、感熱により図形、印字などを行なうサーマ
ルヘッド装置に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a thermal head device that performs graphics, printing, etc. using heat sensitivity.
（従来の技術）
サーマルヘッド装置は、従来、特開昭６０−１７２５５
３号に記載されるような構造である。(Prior art) A thermal head device has conventionally been disclosed in Japanese Patent Application Laid-open No. 17255-1983.
The structure is as described in No. 3.
即ち、１枚の基板上に、平面的に下層電極を作りこの上
面に絶縁層を作り、さらにこの絶縁層の上に並列の電極
を作り、この電極の間に抵抗体を充填した構造である。In other words, it has a structure in which a lower layer electrode is formed in a plane on one substrate, an insulating layer is formed on the upper surface of this layer, parallel electrodes are further formed on this insulating layer, and a resistor is filled between these electrodes. .
そして、この電極及び抵抗体を保護層で覆っている。This electrode and resistor are then covered with a protective layer.
（発明か解決しようとする課題） 従来のサーマルヘッドによると、下層電極。(Invention or problem to be solved) According to the traditional thermal head, the bottom electrode.
抵抗体及び上層を極を全て積層させて製造した構造であ
る。このために、各層の電極の位置合せを行なうなめに
、各層を形成するためのパターン及びエツチング処理な
どの製造技術で高度な技術か要求される。さらに、厚み
方向を見た場合、基板が片側たけであるために、層を形
成した側の素材に剥離を生じやすい問題かある。It has a structure in which the resistor and upper layer are manufactured by laminating all the poles. Therefore, in order to align the electrodes of each layer, sophisticated manufacturing techniques such as patterning and etching are required to form each layer. Furthermore, when looking at the thickness direction, since the substrate is thick on one side, there is a problem that the material on the side where the layer is formed is likely to peel off.
そこでこの発明は、強度上の信頼性を向上しかつ製造も
容易なサーマルヘッド装置を提供することを目的とする
。Therefore, an object of the present invention is to provide a thermal head device that has improved reliability in terms of strength and is easy to manufacture.
（課題を解決するための手段）
この発明は、第１の基板が、共通電極となる櫛状の電極
を有し、電極先端エツジが基板エツジ配列しており、第
２の基板が、前記櫛状の電極に対して対向して配置され
ドライブ信号が供給される並列電極を有し、かつ前記櫛
状電極及び並列電極の電極先端のエツジをその基板エツ
ジとともに揃えて配置される。そして前記櫛状電極及び
並列電極の電極先端のエツジ部分を抵抗素材により短絡
し、この抵抗素材及び前記第１．第２の基板によりサン
ドイッチ状に挟まれた電極先端エツジ部を保護層で覆う
構造としたものである。(Means for Solving the Problems) In the present invention, the first substrate has a comb-shaped electrode serving as a common electrode, the electrode tip edge is arranged on the substrate edge, and the second substrate has a comb-shaped electrode serving as a common electrode. The comb-shaped electrode and the parallel electrode are arranged such that the edges of the electrode tips of the comb-shaped electrode and the parallel electrode are aligned with the edge of the substrate. Then, the edge portions of the electrode tips of the comb-shaped electrode and the parallel electrode are short-circuited with a resistive material, and this resistive material and the first. It has a structure in which the edge portion of the electrode tip sandwiched between the second substrates is covered with a protective layer.
（作用）
上記の手段により、薄い層で形成される電極部は第１と
第２の基板によりサンドイッチ状に挟まれるために剥離
等の問題を生じることが無い。(Function) With the above means, the electrode portion formed of a thin layer is sandwiched between the first and second substrates, so that problems such as peeling do not occur.
また、予め形成される櫛状電極と並列電極とを向合わせ
て第１、第２の基板を合せる組立て作業であるために、
基板同士を位置合せすれば電極の位置合せも自動的に得
られ、組立て作業も簡単で正確に行なえる。In addition, since the assembly work involves aligning the first and second substrates with the comb-shaped electrodes and parallel electrodes formed in advance facing each other,
By aligning the substrates, the electrodes can be aligned automatically, making assembly easy and accurate.
（実施例） 以下、この発明の実施例を図面を参照して説明するう 第１図はこの発明の一実施例を示す分解斜視図である。(Example) Examples of the present invention will be described below with reference to the drawings. FIG. 1 is an exploded perspective view showing an embodiment of the present invention.
１１は例えばガラス、合成樹脂などを材質とする絶縁性
の第１の基板であり、この第１の基板１１の下側の面に
は厚膜技術あるいは薄膜技術により櫛状の電極１２が形
成されている。櫛状電極１２は、共通電極として機能す
るもので、その電極先端エツジは第１の基板１１のエツ
ジ１、．１ａに等間隔で並列している。この第１の基板
１１に対して櫛状＄′！ｆ１１２側に第２の基板１４が
配置される。第２の基板１４には、櫛状電極１２の並列
電極部と平行な多数の並列電極１５か形成されている。Reference numeral 11 denotes an insulating first substrate made of glass, synthetic resin, etc., and a comb-shaped electrode 12 is formed on the lower surface of this first substrate 11 by thick film technology or thin film technology. ing. The comb-shaped electrode 12 functions as a common electrode, and its electrode tip edge is connected to the edges 1, . . . of the first substrate 11. 1a are arranged in parallel at equal intervals. A comb-shaped $'! for this first substrate 11! The second substrate 14 is arranged on the f112 side. A large number of parallel electrodes 15 parallel to the parallel electrode portions of the comb-shaped electrodes 12 are formed on the second substrate 14 .
この並列電極１５の先端エツジも基板１４のエツジ１４
ａに並列している。そして、並列電極１５の他方エツジ
部分は、第２の基板１４の中央部に向かって延在し、集
積回路２０゜２１のピンに適宜接続されるにれにより並
列電極には、選択的あるいは同時にドライブ信号を供給
することができる。また、第１．第２の基板１１．１４
間には、スペーサ１６が設けられる。The tip edge of this parallel electrode 15 is also the edge 14 of the substrate 14.
It is parallel to a. The other edge portion of the parallel electrode 15 extends toward the center of the second substrate 14 and is connected to the pins of the integrated circuits 20 and 21 as appropriate, so that the parallel electrode can be selectively or simultaneously connected to the pins of the integrated circuit 20 and 21. A drive signal can be supplied. Also, 1st. Second substrate 11.14
A spacer 16 is provided in between.
そして、第１．第２の基板１１．１４は、その櫛状電極
１２、並列を極１５の電極先端のエツジ付近で、これら
電極とともに帯状の抵抗体１７をサンドイッチ状に挟む
ように組立てられる。なお、櫛状電極１２と並列電極１
５が抵抗１７を介して接続される部分以外は、絶縁材の
コーティングなどにより絶縁されている。And the first. The second substrate 11, 14 is assembled so that the comb-shaped electrodes 12, parallel to each other, are placed near the edge of the electrode tip of the pole 15, and the band-shaped resistor 17 is sandwiched between these electrodes. Note that the comb-shaped electrode 12 and the parallel electrode 1
The portion other than the portion where 5 is connected via the resistor 17 is insulated by coating with an insulating material.
第１図（ｂ）は、抵抗体１７に沿って切断した断面を示
している。次に、第１．第２の基板１１゜１４が一体化
された場合、互いのエツジ１１ａ。FIG. 1(b) shows a cross section cut along the resistor 17. Next, the first. When the second substrates 11° 14 are integrated, the edges 11a of each other.
１４−ａで形成される隙間には、抵抗体１７を補間する
抵抗素材１８が充填される。この抵抗素材１８の幅は、
はぼエツジ間の間隙を隠す稈度でよい。さらに、基板１
１．１４のエツジ部分および抵抗素材１８は、保護層と
しての絶縁性の合成樹脂により覆われる。The gap formed by 14-a is filled with a resistive material 18 that interpolates the resistor 17. The width of this resistance material 18 is
The culm should be thick enough to hide the gaps between the edges. Furthermore, substrate 1
The edge portion 1.14 and the resistive material 18 are covered with an insulating synthetic resin as a protective layer.
上記のように構成されるサーマルヘッド装置は、並列電
極１５に選択的にあるいは同時にドライブ電圧が供給さ
れることにより、その先端とこれに対応する櫛状電極の
先端との間に電流が流れ、この部分の抵抗材が発熱し、
感熱紙あるいは感熱リボンなどに熱転写を得ることがで
きる。In the thermal head device configured as described above, when a drive voltage is supplied to the parallel electrodes 15 selectively or simultaneously, a current flows between the tips of the parallel electrodes 15 and the tips of the corresponding comb-shaped electrodes. The resistance material in this part generates heat,
Thermal transfer can be obtained on thermal paper or thermal ribbon.
上記の実施例は、厚膜技術により電極を形成した例を図
面に示した。この発明は厚膜技術に限らす、電極は薄膜
技術により形成してもよい。In the above embodiments, the drawings show examples in which electrodes are formed using thick film technology. This invention is limited to thick film technology; the electrodes may also be formed using thin film technology.
第２図は薄膜技術により電極を形成した例である。第１
の基板１１Ａには櫛状電極１２Ａか形成され、第２の基
板１４Ａには並列電極が形成されている。そして電極側
を向合わせて第１．第２の基板１１Ａと１４Ａとが一体
化される。この場合、両側の電極は非常に薄く形成され
ているので、全体の厚みも先の実施例に比べて薄くなる
。さらに、第１．第２の基板１１Ａ、１４Ａを重ね合せ
た時点で、両者の隙間には、先ずガラス材による絶縁材
２５が充填される６次に、基板１１Ａ、１４Ａのエツジ
部か研磨され電極がエツジ面に露出するように加工され
る。そして、電極間を短絡するなめに、同図（ｂ）に示
すように発熱特性を有する抵抗素材２６がコーティング
され、この上にグレーズド・ガラス及び合成樹脂等の保
護層２７が形成される。FIG. 2 shows an example in which electrodes are formed using thin film technology. 1st
A comb-shaped electrode 12A is formed on the substrate 11A, and parallel electrodes are formed on the second substrate 14A. Then, with the electrode sides facing each other, the first. The second substrates 11A and 14A are integrated. In this case, since the electrodes on both sides are formed very thin, the overall thickness is also thinner than in the previous embodiment. Furthermore, the first. When the second substrates 11A, 14A are placed on top of each other, the gap between them is first filled with an insulating material 25 made of glass.Next, the edges of the substrates 11A, 14A are polished and electrodes are placed on the edge surfaces. Processed to expose. Then, to short-circuit between the electrodes, a resistive material 26 having heat-generating properties is coated as shown in FIG. 2(b), and a protective layer 27 of glazed glass, synthetic resin, etc. is formed on this.
上記の実施例も先の実施例と同様な効果を奏する。The above embodiment also has the same effects as the previous embodiment.
第３図は、第１図の装置を製造する方法を説明するため
に示した平面図である。第１と第２の基板１１と１４と
は、もともと１枚の基板３０であり、予め櫛状電極１２
と並列電極１５とがパターンニングされる。この場合、
櫛状を極１２と並列電極１５とのｔ極先端の一部が若干
型なり合ってパターンニングされる。そしてこのオーバ
ーラツプ部分には、背面側から点線で示すように基板３
０にレーザービームによる切れ目３１を形成しておく。FIG. 3 is a plan view shown to explain a method of manufacturing the device shown in FIG. 1. The first and second substrates 11 and 14 are originally one substrate 30, and the comb-shaped electrodes 12 are
and parallel electrodes 15 are patterned. in this case,
A part of the tip of the t-pole of the comb-shaped pole 12 and the parallel electrode 15 is patterned so as to slightly match each other. Then, in this overlap area, as shown by the dotted line from the back side, there is a board 3.
A cut 31 is formed at 0 by a laser beam.
更に、電極先端部で先の抵抗体１７を配設する部分以外
は、絶縁剤によるコーティングか行われる。Further, the electrode tip portion other than the portion where the resistor 17 is disposed is coated with an insulating material.
上記のように加工された基板３０は、点線部分で折られ
、第１と第２の基板１１と１４になる。The substrate 30 processed as described above is folded along the dotted line to become the first and second substrates 11 and 14.
そして、抵抗体１７を挟み一体化される。ここで、を極
先端がオーバーラツプしていたために、互いの基板に互
いの電極の一部か残るが、これは、基板のエツジ面を研
磨により整えたときになくなる。Then, they are integrated with the resistor 17 sandwiched therebetween. Here, because the electrode tips overlapped, a portion of each electrode remained on each substrate, but this disappeared when the edge surfaces of the substrates were polished.
上記のように１枚の基板３０で、第１図に示した電極を
有する第１と第２の基板１１と１４を同時に製作するこ
とができる。つまり、１回のパターンニング作業か２枚
の基板のｔ極作成を行なうことになる。さらに、２種類
の電極作成が１回のパターンニングで同一面に構成され
るなめに、両を極の大きさや厚みなどを同じにすること
ができ、を極先端の間隔も精度よく形成することができ
る。As described above, the first and second substrates 11 and 14 having the electrodes shown in FIG. 1 can be manufactured simultaneously using one substrate 30. In other words, one patterning operation or t-pole creation for two substrates is required. Furthermore, because two types of electrodes are created on the same surface with one patterning process, the size and thickness of both electrodes can be made the same, and the spacing between the electrode tips can be formed with high accuracy. I can do it.
第１と第２の基板１１と１４に分離されても、基板相互
間を正確に位置決めすれば、基板間の電極間の横方向間
隔も精度よく位置決めされることになる。従来のように
一方の電極層の上に絶縁層を介して他方の電極層を形成
する方法であると、製品間で電極の横方向間隔にばらつ
きが生じる可能性かある。しかし、本製造方法によると
、−枚のパターンにより２枚の基板の電極を同時に１枚
の基板上に作るのであるから、基板間の電極間の横方向
の間隔にばらつきが生じることはない。この間隔が一定
であることは、発熱抵抗による各ドツトの発熱特性を均
一化する上で重要である。Even if the first and second substrates 11 and 14 are separated, if the substrates are positioned accurately, the lateral spacing between the electrodes between the substrates can also be positioned accurately. If the conventional method is to form one electrode layer on top of the other electrode layer with an insulating layer interposed therebetween, there is a possibility that the lateral spacing of the electrodes will vary between products. However, according to the present manufacturing method, since the electrodes of two substrates are simultaneously formed on one substrate using the -pattern pattern, there is no variation in the lateral spacing between the electrodes between the substrates. It is important that this interval be constant in order to equalize the heating characteristics of each dot due to the heating resistor.
上記の製造方法は、櫛状型ｌ＃１１２と、並列電極１５
の電極先端が、組合う形であり、第１図のように組立て
た時は、互いの基板１１と１４の電極先端が交互に位置
するタイプのものである。本装置の構造及び製造方法は
これに限る゛ものではない。The above manufacturing method consists of a comb-shaped mold l#112 and a parallel electrode 15.
The electrode tips of the substrates 11 and 14 are interlocked, and when assembled as shown in FIG. 1, the electrode tips of the substrates 11 and 14 are alternately located. The structure and manufacturing method of this device are not limited to these.
第４図は他の実施例における製造方法を説明するために
示した平面図である。FIG. 4 is a plan view shown for explaining a manufacturing method in another embodiment.
この実施例は、１枚の基板４０に形成される電極パター
ン４１が全体的に櫛状である。そして、第１と第２の基
板４０Ａと４０Ｂとを得るために切り込み４２が基板４
０の背面に点線で示すように、電極の並列部を直角に横
切るにように形成される。以後の製作工程は先の実施例
と同じである。In this embodiment, the electrode pattern 41 formed on one substrate 40 is entirely comb-shaped. Then, in order to obtain the first and second substrates 40A and 40B, the notch 42 is formed on the substrate 4.
As shown by the dotted line on the back side of 0, it is formed so as to cross the parallel part of the electrodes at right angles. The subsequent manufacturing steps are the same as in the previous embodiment.
第４図の電極のパターンであると、電極間隔を高密度に
する、つまりドツト密度を高くすることができる利点が
ある。The electrode pattern shown in FIG. 4 has the advantage that the electrode spacing can be made high, that is, the dot density can be made high.
−９＝
第５図は更に他の実施例である。この例は、基板５０に
形成される電極パターン５１が全体的に櫛状であること
は先の場合と変わりはないが、並列電極を共通に接続し
た共通接続パターンの幅Ｗか、先の例よりも広いことで
ある。また、第１と第２の基板５．ＯＡと５０Ｂを得る
ための切込みが共通接続パターンの直ぐ近くにこのパタ
ーンに沿って形成されていることである。-9= FIG. 5 shows yet another embodiment. This example is the same as the previous case in that the electrode pattern 51 formed on the substrate 50 is comb-shaped as a whole, but the width W of the common connection pattern in which parallel electrodes are commonly connected is It is broader than that. In addition, the first and second substrates 5. The notches for obtaining OA and 50B are formed in the immediate vicinity of the common connection pattern and along this pattern.
上記第３図乃至第５図の製造方法によって作られた基板
を用いたサーマルヘッドの電気的な回路をそれぞれ第６
図乃至第８図に示す。第３図の例では第６図のように、
櫛状電極１２と並列電極１５の先端が形成する隙間にそ
れぞれ抵抗が配置されることになる。第４図の例では第
７図のように、第１と第２の基板の！１４１ａと４１ｂ
とが１対１で対向するので、対向ｔｔｉ間にそれぞれ抵
抗か接続される形となる。第５図の例は、第８図に示す
ように、切離された幅広のｔｉ５１ａと並列電極５１ｂ
との間にそれぞれ抵抗が接続されることになる。この例
であると、抵抗に印加する電−１〇 −
圧動率か良くなるという利点かある。The electrical circuit of the thermal head using the substrate manufactured by the manufacturing method shown in FIGS. 3 to 5 above is shown in the sixth figure.
This is shown in FIGS. 8 to 8. In the example in Figure 3, as in Figure 6,
Resistors are placed in the gaps formed by the tips of the comb-shaped electrode 12 and the parallel electrode 15, respectively. In the example of FIG. 4, as shown in FIG. 7, the first and second substrates are separated! 141a and 41b
Since they face each other on a one-to-one basis, a resistor is connected between the opposing tti. In the example of FIG. 5, as shown in FIG. 8, the separated wide ti 51a and the parallel electrode 51b
A resistor is connected between each. This example has the advantage of improving the piezoelectricity of the electric current applied to the resistor.
（発明の効果）
以上説明したようにこの発明は、薄い抵抗層や電極層が
第１と第２の基板により挟まれた構造であるために、摩
耗、剥離等の問題か生じない強度上の信頼性を向上しか
つ製造も容易なサーマルヘッド装置を提供できる。(Effects of the Invention) As explained above, the present invention has a structure in which a thin resistance layer and an electrode layer are sandwiched between the first and second substrates, so that problems such as abrasion and peeling do not occur, and the strength is improved. It is possible to provide a thermal head device that has improved reliability and is easy to manufacture.
第１図はこの発明の一実施例の分解斜視図および一部断
面を示す図、第２図はこの発明の他の実施例を示す斜視
図及び側面図、第３図乃至第５図はそれぞれこの発明に
適用される！＠パターンニングの製造例を示す図、第６
図乃至第８図はそれぞれ第３図乃至第５図の基板による
サーマルヘッドの電気的な等価回路の一部を示す図であ
る。
１１、ＩＩＡ・・・第１の基板、１２．１２Ｂ・・・櫛
状を極、１４・・・第２の基板、１５・・・並列ｔ′ｌ
ｉ！、１６・・・スペーサ、１７・・・抵抗体、１８．
２６・・・抵抗素材、２７・・・保護層。FIG. 1 is an exploded perspective view and a partially sectional view of one embodiment of the invention, FIG. 2 is a perspective view and side view of another embodiment of the invention, and FIGS. 3 to 5 are respectively Applies to this invention! @ Diagram showing a manufacturing example of patterning, No. 6
8 are diagrams showing a part of electrical equivalent circuits of the thermal head using the substrates of FIGS. 3 to 5, respectively. 11, IIA...first substrate, 12.12B...comb-shaped as pole, 14...second substrate, 15...parallel t'l
i! , 16... Spacer, 17... Resistor, 18.
26... Resistance material, 27... Protective layer.
Claims (1)
板エッジ配列した第１の基板と、前記櫛状の電極に対し
て対向して配置され、ドライブ信号が供給される並列電
極を有し、かつ前記櫛状電極及び並列電極の電極先端の
エッジをその基板エッジとともに揃えて配置される第２
の基板と、前記櫛状電極及び並列電極の電極先端のエッ
ジ部分を短絡した抵抗素材と、この抵抗素材及び前記第
１、第２の基板によりサンドイッチ状に挟まれた電極先
端エッジ部を覆う保護層とを具備したことを特徴とする
サーマルヘッド装置。A first substrate having a comb-shaped electrode serving as a common electrode, with the electrode tip edge aligned with the substrate edge, and a parallel electrode arranged opposite to the comb-shaped electrode and to which a drive signal is supplied. and a second electrode disposed such that the edges of the electrode tips of the comb-shaped electrode and the parallel electrode are aligned with the edge of the substrate.
a resistor material in which the edge portions of the electrode tips of the comb-shaped electrode and the parallel electrode are short-circuited, and protection that covers the edge portions of the electrode tips sandwiched between the resistor material and the first and second substrates. A thermal head device comprising a layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9713788A JPH01267059A (en) | 1988-04-20 | 1988-04-20 | Thermal head device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9713788A JPH01267059A (en) | 1988-04-20 | 1988-04-20 | Thermal head device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01267059A true JPH01267059A (en) | 1989-10-24 |
Family
ID=14184183
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9713788A Pending JPH01267059A (en) | 1988-04-20 | 1988-04-20 | Thermal head device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01267059A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5010654A (en) * | 1973-05-26 | 1975-02-03 | ||
| JPS61110569A (en) * | 1984-11-06 | 1986-05-28 | Yokogawa Hokushin Electric Corp | Thermal head and manufacture thereof |
-
1988
- 1988-04-20 JP JP9713788A patent/JPH01267059A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5010654A (en) * | 1973-05-26 | 1975-02-03 | ||
| JPS61110569A (en) * | 1984-11-06 | 1986-05-28 | Yokogawa Hokushin Electric Corp | Thermal head and manufacture thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH11144904A (en) | Chip electronic component | |
| CN107359033A (en) | Chip resister and its manufacture method | |
| JP3846312B2 (en) | Method for manufacturing multiple chip resistors | |
| US4399444A (en) | Heat-sensitive recording head | |
| US4810852A (en) | High-resolution thermal printhead and method of fabrication | |
| US6806167B2 (en) | Method of making chip-type electronic device provided with two-layered electrode | |
| JPH01267059A (en) | Thermal head device | |
| JPH01267058A (en) | Manufacture of thermal head | |
| JP3608569B2 (en) | Resistor manufacturing method | |
| JPH0661949B2 (en) | Thermal print head | |
| JP2000030902A (en) | Chip type resistor and its manufacture | |
| JP2575554B2 (en) | Edge type thermal head | |
| JP3812442B2 (en) | Method for manufacturing multiple chip resistors | |
| JP3213663B2 (en) | Manufacturing method of square chip resistor | |
| JPS60225221A (en) | Coordinate input device | |
| JPH0533553B2 (en) | ||
| JPH07321445A (en) | Thick-film circuit board, its manufacturing method, and thermal head using thick-film circuit board | |
| JPH0616763Y2 (en) | Thermal head | |
| JP3846311B2 (en) | Method for manufacturing multiple chip resistors | |
| JPH11111513A (en) | Manufacture of chip resistor | |
| JPS62178364A (en) | Electrothermal transfer recording head | |
| JPS60206675A (en) | Thermal printing head and manufacture thereof | |
| JPH04163158A (en) | End type thermal head and its manufacture | |
| JPH04110160A (en) | End face-type thermal head | |
| JPS61243910A (en) | Thin film magnetic head |