JPH01264233A - Electrode structure of hybrid integrated circuit - Google Patents

Abstract

PURPOSE:To prevent a crack and an exfoliation of a wiring layer and a glass substrate by a method wherein a metal layer whose internal stress against a thermal strain is small and to which a solder does not adhere is arranged between the wiring layer and an electrode layer for solder connection use in such a way that it is wider than a solder connection face of the electrode layer. CONSTITUTION:As An electrode, a wiring layer 2 composed of chromium is formed on a glass substrate 1 by a sputtering operation; metal layers 7, 8 for stress dispersion use and an electrode layer 3 for solder connection use are laminated one after another on it by the sputtering operation. As a material to form the metal layer 7 for stress dispersion use, it is preferable to use the material whose internal stress against a thermal strain is small and which is rich in ductility; when copper is used, the metal layer 8 such as chromium or the like is laminated to be thin in order to prevent a solder from flowing on it. In addition, for the metal layer 7, it is desirable to select a material whose internal stress is small after its formation; it is desirable that the metal layers 7, 8 are wider than a solder connection face of the electrode layer 3 in order to obtain a stress dispersion effect. As a result, a thermal strain stress to be applied to a solder connection part on the glass substrate is dispersed and conducted to the glass substrate; accordingly, it is possible to prevent a disconnection of the wiring layer and a crack and an exfoliation of the glass substrate.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an electrode structure of a hybrid integrated circuit suitable for mounting circuit components on a glass substrate by solder connection.

[Conventional technology]

Hybrid integrated circuits, especially semiconductor ICs and FPCs on glass substrates
(Flexible printed wiring boards) and other circuit components mounted by solder connection are discussed in Research and Practical Application Report Vol. As shown in Figure 1, reliability is greatly influenced by the method of configuring the solder joints. This paper reports the results of a study in which a thin film for solder connection formed on a glass substrate had a double-layer structure to prevent the thin film from disappearing due to penetration into the solder.

[Problem to be solved by the invention]

In the above conventional technology, consideration is given to the breakage of the wiring layer and glass substrate due to thermal strain stress when mounting circuit components such as semiconductor ICs and FPCs on the wiring layer formed on the glass substrate via the electrode layer for solder connection. Since the tensile stress resistance of the glass substrate is not high, when soldering is performed, thermal strain stress due to the difference in thermal expansion between the connected components and the glass substrate is applied to the connection part, causing disconnection of the wiring layer and solder connection. There was a problem that cracks and peeling of the glass substrate occurred around the electrode layer.

The problems with these conventional techniques will be explained in more detail with reference to FIG.

Fig. 2 shows a case where a semiconductor IC is mounted on a glass substrate using solder balls as an example of realizing a contact type reading sensor for facsimile with the smallest number of film layers. A wiring layer 2 such as
A solder connection electrode layer 3 having a double film structure made of gold is formed. When a semiconductor IC (not shown) is placed on this electrode layer 5 and heat-connected using the solder 4, cracks C occur when left after connection or during a temperature cycle test, and the wiring layer 2 is disconnected. In some cases, the connecting portion may peel off from the glass substrate 1. This crack C is
As shown in the plan view of FIG. 2(A), the stress is generated from the portion where the tensile stress of the glass substrate IK is applied around the electrode layer 3 for solder connection, and gradually progresses to the inside and the entire circumference. Therefore, the stress is concentrated in a very narrow area, and this stress increases the tensile stress resistance of the glass substrate (usually 2 to 3 Kf/d
”), cracks are expected to occur.This stress can be applied even if it is not during the temperature cycle test.
This is caused by distortion caused by the difference in thermal expansion between the glass substrate and the circuit component at the solidus temperature of the solder (183° C.) during circuit component mounting.

Niwame K, which prevents cracks due to thermal strain stress, is the third
As shown in the figure, configurations using various materials are possible.

In FIG. 5(A), a layer 5 of a silicon compound such as 1c SiO□ or 5isN4 is placed between the wiring layer 2 and the periphery of the solder connection electrode layer 30, and these layers receive most of the thermal strain stress. This is what we are trying to do. Mana, in Figure 3) is 8
A layer 6 of a polyimide resin (Piq) having a low Young's modulus that absorbs strain is further laminated on a layer 5 of a silicon compound such as 10□. Although these can provide high connection reliability, the formation process is complicated and the product cost increases, which is not preferable.

An object of the present invention is to make the solder connection part receive thermal strain stress caused by the difference in thermal expansion between the glass substrate and the connected component over as wide an area as possible, with fewer steps, thereby reducing the unit area applied to the glass substrate. It is said that it reduces the stress caused by contact and prevents cracking or peeling of wiring layers and glass substrates.

[Means to solve the problem]

The above purpose is to have a relatively small internal stress for one thermal strain between the wiring layer formed on the glass substrate and the electrode layer for solder connection, and to spread the metal layer to which no solder adheres wider than the solder connection surface of the electrode layer. This is achieved by arranging K.

[Effect]

In the electrode structure according to the present invention, the stress generated in the periphery of the solder connection electrode layer due to the difference in thermal expansion between the glass substrate and the connected component is temporarily applied to the surface of the metal layer disposed between the electrode layer and the wiring layer. receive. Thereafter, the stress spreads in the film plane and film thickness direction of the metal layer) and is transmitted to the wiring layer and the glass substrate, so thermal strain stress is not directly transmitted to the glass substrate, but due to the stress dispersion effect within the metal 1. , the stress value per unit area decreases. This eliminates stress concentration on the glass substrate, suppresses the stress value transmitted to the glass substrate below the tensile stress strength, and prevents cracks and peeling.

〔Example〕

Hereinafter, embodiments of the present invention will be explained based on the first factor.

Fig. 1 (η) is a plan view, and Fig. 1 (B) is a cross-sectional view. A metal layer 7.8 for stress dispersion and an electrode layer 3 for solder connection were successively laminated thereon by sputtering. In this case, copper (thickness α5 to 1.0 μm) was used for the metal layer 7, and chromium (thickness α1 μm) was used for the metal layer 8. The electrode layer 5 for solder connection uses nickel steel (thickness: 17 am) for the first layer to prevent solder diffusion, and gold with good solder connection for the second layer, as in the conventional example shown in the second factor. (A double film structure using a film thickness (L2 μm) is used, and these electrode layers 3 have a semiconductor IC-
? Circuit components such as FPC (not shown) were connected using solder 4. In this case, the solder 4 was previously applied as a solder ball to the connected component side, but it is also possible to apply it to the electrode surface of the board side by dipping it into a solder bath or the like.

The material for forming the stress dispersion metal layer 7 is preferably one that has relatively low internal stress against thermal strain and is highly ductile.
For example, if copper is used for the metal layer 7 as in this embodiment, solder may be applied on top of it. A thin metal layer 8 of chromium or the like is laminated to prevent flow. Further, if the metal layer 7 has a large internal stress generated in the film itself during formation, there is a risk that the stress may cause the end portion to turn over, so it is desirable to select a material with low internal stress after the film is formed.

According to experiments, it is desirable that the metal layers 7 and 8 be at least 10 μm wider than the solder connection surface of the electrode layer 3 in order to obtain a stress dispersion effect. The widening width d from the part was set to 15 μm at the minimum part.

With the above configuration, stress due to thermal strain was dispersed in the metal layer 7.8, and cracking and peeling of the wiring layer 2 and the glass substrate 1 could be prevented.

In this example, the stress dispersion metal layer 7.8 is made of copper/chromium, and the solder connection electrode layer 3 has a double film structure of nickel copper/gold. A similar effect was obtained when the electrode layer 3 for solder connection was made of a double film structure of nichrome/gold.

In this way, various materials can be used for each layer, but it is necessary to consider the film formation and pattern shape depending on the type of material. When using nichrome/gold for the layer 5, the metal layer 8 is not necessary, but in order to prevent oxidation of the aluminum used for the metal layer 7, the first layer nichrome film of the electrode layer 3 for solder connection is replaced with the metal layer 7. The pattern shape is such that it covers the wiring layer 2, and the other parts of the electrode layer 3 are subjected to oxidation or corrosion treatment so that the solder can be applied only to the second layer of gold. Consideration needs to be taken, such as changing to a cord handle that does not adhere well.

Although the embodiment described above seems to have a complicated layer structure,
In the embodiment shown in FIG. 1 as well, the metal layer 7.8 can be formed simultaneously using a sputtering device with multiple targets, and as a result, one additional step is required to form the metal layer 7.8. It is only done.

〔Effect of the invention〕

According to the present invention, the thermal distortion stress applied to the solder connection portion on the glass substrate is dispersed by the metal layer disposed between the wiring layer and the electrode layer for solder connection and transmitted to the glass substrate, so that the wiring layer is disconnected. This has the effect of enabling low-cost and highly reliable solder connections without causing cracks or peeling of glass substrates.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the present invention, (A) is a plan view, (B) is a cross-sectional view thereof, and FIG. ) is a plan view, (
B) is a cross-sectional view thereof, and No. 31 (A) and (B) are cross-sectional views showing other examples of electrode structures according to the prior art. 1... Glass substrate 2... Wiring layer 3... Electrode layer for solder connection 7. 8... Metal layer for stress dispersion. 1st (￥) 1-... 汀゛悛衂螻 4.-1000 days z, -b
aJ 7. g-・A・Ka-Oke boundary button I3・--For 1000 decoys Shaketsu Figure 2 Figure 3

Claims (1)

[Claims] 1. In a hybrid integrated circuit having a wiring layer and a solder connection electrode layer on a glass substrate, internal stress due to thermal strain is relatively small between the wiring layer and the solder connection electrode layer. ,
An electrode structure for a hybrid integrated circuit, characterized in that the metal layer to which solder does not adhere is arranged wider than the solder connection surface of the electrode layer. 2. The electrode structure of a hybrid integrated circuit according to claim 1, wherein the metal layer has a double film structure in which the first layer is made of copper and the second layer is made of chromium. 3. The electrode structure of a hybrid integrated circuit according to claim 1, wherein the metal layer is composed of a single aluminum film. 4. The electrode structure of a hybrid integrated circuit according to claim 1, 2 or 3, wherein the metal layer is wider than the solder connection surface of the electrode layer by at least 10 μm.