JPH01256155A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable a semiconductor to be highly integrated by a method wherein an oxide film is laid between the first antioxidant film corresponding to an element formation region of a semiconductor substrate and the semiconductor substrate while the oxide film and a semiconductor layer are laminated between the second antioxidant film left on the sidewall part of the first antioxidant film and the semiconductor substrate. CONSTITUTION:The first antioxidant film 13 is selectively formed on the part corresponding to the element formation region on an oxide film 12 on the surface of a semiconductor substrate 11 and then the second antioxidant film (Si3N4 film) 14 and an etching mask layer (SiO2 film) 22 are laminated so as to cover a semiconductor-layer 16 formed on the sides of the first antioxidant film 13. Then, the etching mask layer 22 is anisotropically etched away to leave an etching mask layer 22a on the part corresponding to the sidewall of the first oxide film 13 and then the second antioxidant film 14 is etched away using the layer 22a as a mask. Furthermore, the semiconductor substrate 11 is selectively oxidized using the first antioxidant film 13 and the second residual antioxidant film 14 as masks to form an element isolation region. Through the procedures, a semiconductor device can be highly integrated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device having an element isolation region and an element formation region in contact with the element isolation region.

[Invention (already required)]

The present invention provides a method for manufacturing a semiconductor device as described above.
An oxide film is present between the first oxidation resistant film corresponding to the element formation region of the semiconductor substrate and the semiconductor substrate, and a second oxidation resistant film is left on the side wall of the first oxidation resistant film. By stacking an oxide film and a semiconductor layer between the semiconductor substrate and the semiconductor substrate, it is possible to manufacture a high quality and highly integrated semiconductor device.

[Conventional technology]

When manufacturing a semiconductor device, it is necessary to form an element isolation region and an element formation region on a semiconductor substrate, and this formation is generally performed by selective oxidation of the semiconductor substrate.

If the bird's beak of the oxide film due to selective oxidation is small, it is possible to manufacture highly integrated semiconductor devices. One method for this purpose is offset LOGO3 (O3E
L○) Law Extend Abstract of th
e 17th Conference on 5oli
d 5tate Devices and Materi
als, Tokyo, 1985. pp, 337-340
It has been proposed in

FIG. 3 shows an outline of this 03ELO method. That is, as shown in FIG. 3A, a 5i02 film 12 for a pad and a first
A 5iJa film 13, which is an oxidation-resistant film, is first selectively formed.

Furthermore, a 5iJ4 film 14, which is a second oxidation-resistant film and has a hook-shaped cross section, is formed on the sidewalls of the 5io211 film 12 and the Si3N4 film 13.

If Si substrate 11 is oxidized in this state, Si3N and film 1
4, the bird's beak 15a of the 5in2 film 15, which is a LOCOS oxide film, is small, as shown in FIG. 3B.

[Problem to be solved by the invention]

However, in the above-mentioned 05ELO method, since the Si, N, film 14 is formed directly on the Si substrate 11, the bird's beak 15a is small, but the bird's beak 15a is small.
In the vicinity of a, that is, in the vicinity of the boundary between the element formation region and the element isolation region, latent stress is accumulated and crystal defects occur.

As a result, leakage current increases at the PN junction after the semiconductor device is completed, making it impossible to manufacture a high-quality semiconductor device.

[Means to solve the problem]

In the method for manufacturing a semiconductor device according to the present invention, a semiconductor substrate 11
a step of forming an oxide film 12 on the surface of the oxide film 12;
A step of selectively forming a first oxidation-resistant film 13 on a portion corresponding to the element formation region;
A second oxidation resistant film 14 and an etching mask layer 22 are formed to cover the semiconductor layer 16.26 formed on the side of the oxidation resistant film 13.
and anisotropic etching of the etching mask layer 22 to form the first oxidation-resistant film 13.
The etching mask layer 22a is formed on a portion corresponding to the side wall of the etching mask layer 22a.
a step of etching at least the second oxidation-resistant film 14 using the remaining etching mask layer 22a as a mask; and a step of etching at least the second oxidation-resistant film 14 using the remaining etching mask layer 22a as a mask; and selectively oxidizing the semiconductor substrate 11 using the chemical film 14 as a mask to form an element isolation region.

[Effect]

In the method for manufacturing a semiconductor device according to the present invention, a semiconductor substrate 1
Since the oxide film 12 is present between the first oxidation-resistant film 13 corresponding to the element formation region 1 and the semiconductor substrate 11, the accumulation of latent stress and the occurrence of crystal defects in the element formation region are suppressed. be done.

Moreover, since the oxide film 12 and the semiconductor layer 16.26 are laminated between the second oxidation resistant film 14 left on the side wall portion of the first oxidation resistant film 13 and the semiconductor substrate 11, the element formation area The accumulation of latent stress and the occurrence of crystal defects near the boundary between the semiconductor device and the element isolation region are particularly suppressed.

Furthermore, although the oxide film 12 and the semiconductor layer 16.26 are laminated between the second oxidation-resistant film 14 left on the side wall of the first oxidation-resistant film 13 and the semiconductor substrate 11, oxygen diffusion Since the coefficient is smaller in the semiconductor layer 16.26 than in the oxide film 12, the bird's beak 15a in the element isolation region is smaller.

〔Example〕

Hereinafter, first and second embodiments of the present invention applied to the manufacture of MOS transistors will be described with reference to FIGS. 1 and 2.

FIG. 1 shows a first embodiment. In this first embodiment, as shown in FIG. 1A, the surface of the Si substrate 11 has a thickness of 5.
First, a 5iOz film 12 having a thickness of approximately 0 is formed by thermal oxidation.

Then, a polycrystalline Si film 16 with a thickness of about 550 mm, an i3N4 film 13 with a thickness of about 1500 mm, and an i3N4 film 13 with a thickness of 2300 mm.
ing film 17 and Si film 17 by CVD, respectively.
They are sequentially laminated on the O2 film 12. Note that the SiO□ film 17
This step is not essential since it is used to increase the step of the 5iJ4 film 13, etc. in order to form the SiO2 film 22 film wall 222a (FIG. 1D).

After that, a resist film 21 is applied on the 5iOz film 17,
This resist film 21 is patterned into the pattern of the element formation region.

Next, as shown in FIG. 1B, using the resist film 21 as a mask, the 5iOz film 17, the SiJ film 13, and the polycrystalline S
RIE is sequentially performed on the i-film 16. However, polycrystalline S
For the i-film 16, R is applied so that a thickness of 200 Å or more remains.
Do IB. When these RIEs are completed, the resist film 21 is removed.

Next, as shown in FIG.
The N4 film 14, the iO□ film 22 and the film wall 2 having a thickness of approximately 3000 layers are sequentially laminated by CVD.

Next, by etching the entire surface of the 5iozl film 22 anisotropically by RIE, as shown in FIG.
A film wall 222a of the O□ film 22 is formed.

After that, using the wall portion 22a as a mask, the Si:+Nn film I4 is
etching. As a result, the 5izNn film 14 becomes 5i
It remains only on the side walls of the xJ film 13, the Sin film 17, and has a hook-shaped cross section.

Thereafter, using the wall portion 22a as a mask, the polycrystalline Si film 1 is further
This etching may be performed by removing all of the exposed polycrystalline Si film 16 as shown in FIG.
You may leave it within the range of about 00 people.

Next, as shown in FIG. 1E, the exposed SiO□ film 1
7.22.12 is removed by etching, and in this state, B23, which is an impurity for channel stop, is removed by etching.
Ion implantation is performed with an energy of about QKeV.

The ion implantation 23 may be performed in the state shown in FIG. 1D. In this case, the ion implantation region is offset from the element formation region by about the thickness of the wall portion 22a, and the narrow channel effect is suppressed. Therefore, depending on whether the ion implantation is performed in the state shown in FIG. 1E or in the state shown in FIG. 1D, the amount of offset of the ion implantation region from the element formation region can be adjusted.

Next, by thermally oxidizing the Si substrate 11 in the state shown in FIG. 1E, as shown in FIG. 1F, an iO□ film 15 of about 6,000 thickness is formed in a total of 15 isolated regions. Furthermore, Sin
, below the membrane 15 is a channel stopper 2 made of B+ 23.
4 is formed.

After that, remove Si:+N, film 13.14, and further KO
The polycrystalline Si film 16 is etched by wet etching using H.
remove. Note that if dry etching is used to remove the polycrystalline Si film 16, since the 5iOz film 12 is thin, even the Si substrate 11 will be etched, which is not preferable.

After that, the usual manufacturing process for MO3I- transistors is carried out to form a polycrystalline S+ which will become the gate electrode, as shown in Fig. 1G.
A film 25 and the like are formed.

FIG. 2 shows a second embodiment, in which the same components as in the first embodiment are given the same reference numerals.

In this second embodiment, unlike the first embodiment, a polycrystalline Si film 16 is not formed, and as shown in FIG. 2A, a SiO□ film 12 is formed.
A 5iJ4 film 13 is directly formed thereon, and this Si3N4 film 13 is patterned into the pattern of the element formation region.

Next, as shown in FIG. 2B, the polycrystalline Si film 26 and 5iJ
The n film 14, the SiO film 22, and the SiO film 22 are sequentially laminated by CVD.

Next, the entire surface of the 5iOz film 22 is etched back anisotropically by RIE, as shown in FIG.
22a is formed.

Next, by etching the 5i3Nn film 14 using the wall portion 22a as a mask, the 5i3Nn film 14 is etched, as shown in FIG. 2D.
Si3N4 film 1 with a hook-shaped cross section only on the side wall of J4n@13
Leave 4.

Next, as shown in FIG. 2E, the wall portion 22a is removed, and the Si substrate 11 is thermally oxidized in the state shown in FIG. 2E, thereby forming a 5iOz film 15.27 as shown in FIG. 2F.

Thereafter, the SiO□ film 27 is completely coated, and the usual manufacturing process for a MOS transistor is then carried out. In this second embodiment as well, B'23 ions are implanted at the same stage as in the first embodiment.

In the second embodiment, unlike the first embodiment, there is no polycrystalline Si film 16 between the SiO2 film 12 and the 5iJn film 13, and the etching selectivity between Si3N4 and Si is Since it is large, when etching the 5iiNa film 13, S
The i-substrate 11 is also not etched.

Moreover, KOH during etching of polycrystalline 5ilEt16
Since there is no need to use K, there is no contamination of the Si substrate 11 etc. with K.

〔Effect of the invention〕

In the method for manufacturing a semiconductor device according to the present invention, not only the element formation region of the semi-integrated substrate but also the element formation region and the element portion "JAt"
Since the accumulation of latent stress and the occurrence of crystal defects are suppressed even near the boundaries between the regions, a high quality semiconductor device can be manufactured.

Furthermore, since the bird's beak in the element isolation region is small, highly integrated semiconductor devices can be manufactured.

[Brief explanation of the drawing]

1 and 2 are side sectional views sequentially showing first and second embodiments of the present invention, respectively. FIG. 3 is a schematic side sectional view of a conventional example of the present invention, not shown sequentially. In addition, in the symbols used in the drawings, 11------1----Si substrate 12--
−−・−・−・・−5iO□ film 13−・・−−−
1--・---1--5i 3 Ns film 14--
------------5i3N4 film 15a...
・−・−−−−−−−−−Bird's Beak 16−−−−−
・−・・−・−・−・・−Polycrystalline Si film 22−・・−・
---1-----...SiO2 film 22a----
−−−−−−−−−・Wall part 26−−−・・・−・・−・
-.- It is a polycrystalline Si film.

Claims (1)

[Claims] A method for manufacturing a semiconductor device having an element isolation region and an element formation region in contact with the element isolation region, comprising: forming an oxide film on the surface of a semiconductor substrate; selectively forming at least a first oxidation resistant film in a portion corresponding to the element formation region; and a second oxidation resistant film covering the semiconductor layer formed on the side of the first oxidation resistant film. a step of sequentially stacking a film and an etching mask layer; a step of anisotropically etching the etching mask layer to leave the etching mask layer in a portion corresponding to the sidewall of the first oxidation-resistant film; etching at least the second oxidation-resistant film using the remaining etching mask layer as a mask;
and a step of selectively oxidizing the semiconductor substrate using the oxidation-resistant film as a mask to form the element isolation region.