JPH0125251B2 - - Google Patents

Info

Publication number
JPH0125251B2
JPH0125251B2 JP55066122A JP6612280A JPH0125251B2 JP H0125251 B2 JPH0125251 B2 JP H0125251B2 JP 55066122 A JP55066122 A JP 55066122A JP 6612280 A JP6612280 A JP 6612280A JP H0125251 B2 JPH0125251 B2 JP H0125251B2
Authority
JP
Japan
Prior art keywords
transistor
signal line
channel
transistors
channel enhancement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55066122A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56162539A (en
Inventor
Hisao Nagata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP6612280A priority Critical patent/JPS56162539A/ja
Publication of JPS56162539A publication Critical patent/JPS56162539A/ja
Publication of JPH0125251B2 publication Critical patent/JPH0125251B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/003Changing the DC level
    • H03K5/007Base line stabilisation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00346Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
JP6612280A 1980-05-19 1980-05-19 Signal-line driving circuit Granted JPS56162539A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6612280A JPS56162539A (en) 1980-05-19 1980-05-19 Signal-line driving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6612280A JPS56162539A (en) 1980-05-19 1980-05-19 Signal-line driving circuit

Publications (2)

Publication Number Publication Date
JPS56162539A JPS56162539A (en) 1981-12-14
JPH0125251B2 true JPH0125251B2 (US08197722-20120612-C00042.png) 1989-05-17

Family

ID=13306750

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6612280A Granted JPS56162539A (en) 1980-05-19 1980-05-19 Signal-line driving circuit

Country Status (1)

Country Link
JP (1) JPS56162539A (US08197722-20120612-C00042.png)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6027211A (ja) * 1983-07-22 1985-02-12 Seiko Epson Corp ブースター回路
JPH0720060B2 (ja) * 1985-08-14 1995-03-06 株式会社東芝 出力回路装置

Also Published As

Publication number Publication date
JPS56162539A (en) 1981-12-14

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