JPH01248989A - Circuit for controlling dc motor - Google Patents

Abstract

PURPOSE:To protect relay contacts preferably, when the polarity of voltage to be fed to a DC motor is switched by driving one relay and subsequently driving the other relay upon elapse of predetermined time which is synchronous to a clock signal. CONSTITUTION:When a switch 2 is switched during counter clockwise rotation of a motor 20, for example, output Q from a flipflop 3 goes to L level at rising position of a clock signal produced from an oscillator 5. Output Q from a flipflop 6 goes to L level at half wave delay position of the clock signal, while output from a flipflop 7 goes to H level. A transistor 19 is turned OFF by the output from a flipflop 13 and the contact 22a of a relay 22 is grounded. Thereafter, a transistor 18 is turned ON by the output from a flipflop 11 and the contact 21a of a relay 21 is connected to the power source side. By such arrangement, the motor 20 rotates clockwise.

Description

[Detailed Description of the Invention] [Objective of the Invention 1. <Industrial Application Field> The present invention provides the following features: When a DC motor is rotating in a direction,
A control circuit for switching the direction of rotation of a motor by switching the polarity of the supply voltage using a pair of relays, in particular a DC current that reverses the motor after stopping the motor drive for a predetermined period of time to protect the contacts of the relay. Related to motor control circuits.

<Prior art> Conventionally, in order to reverse the direction of rotation of a DC motor from a rotating state, a pair of relays linked to a changeover switch have been used, and by switching the switch, the output terminal side and the ground side of the power supply The ends of the motor connected to the motor are switched together to opposite sides so as to reverse the polarity of the voltage supplied to the motor. In this case, in order to protect the relay contacts, first ground one contact connected to the output terminal of the power supply, that is, once both contacts are grounded together, and after a predetermined period of time, connect the other contact to the output terminal of the power supply. A delay circuit is used to connect the

This delay circuit may incorporate a capacitor so as to block the current supplied to the base side of the relay driving transistor for a predetermined period of time.

However, since the delay time in this delay circuit is determined by the capacitance of the capacitor, individual variations in the capacitance directly affect the delay time, making it impossible to always delay the relay appropriately.

<Problems to be Solved by the Invention> The main object of the present invention is to provide a DC motor control circuit that can suitably protect the relay contacts when switching the polarity of the voltage supplied to the DC motor using a pair of relays. It is about providing.

[Structure of the Invention] <Means for Solving the Problems> According to the present invention, the rotation direction of the DC motor can be switched between forward and reverse by reversing the polarity of the voltage supplied to the DC motor. A DC motor control circuit comprising: a pair of relays including contacts for reversing the polarity of a voltage applied to each end of the DC motor; a pair of drive circuits for driving the relays; and a pair of drive circuits for driving the relays. a switch means for switching the circuit between an excited state and a non-excited state, between the switch means and the drive circuit,
This is achieved by providing a DC motor control circuit characterized by comprising a digital delay circuit that operates in synchronization with a predetermined clock signal when the drive circuit switches from an excited state to a non-excited state.

In this way, after one relay is driven, the other relay is driven after a predetermined period of time synchronized with the clock signal has elapsed, and the delay time can be suitably managed.

<Embodiments> Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram showing the configuration of a circuit based on the present invention. The other end of the switch 2, one end of which is connected to the DC power supply 1, is the same as the D input terminal of the D-type flip-flop 3 (
It can be selectively connected to the D input terminal of the D-type flip-flop 4. This flip flop 3.4
The clock input terminal of is connected to the oscillator 5. The output terminal of the flip-flop 3 is connected to the D input terminal of the D-type flip-flop 6. Further, the output terminal of the flip-flop 4 is similarly connected to the D input terminal of the D-type flip-flop 7. These flip-flops 6.7
Both clock input terminals are connected to the oscillator 5 via an inverter 8.

The output terminals of the flips 70 and 16 are connected to one input terminal of the AND gate 9. The output terminal of this AND gate 9 is connected to the set input terminal of an RS type flip-flop 11. Further, the output terminal of the flip-flop 7 is connected to one input terminal of an AND gate 12, and the output terminal of this AND gate 12 is connected to the set input terminal of an R8 type flip-flop 13.

On the other hand, the output terminal of the flip roller 13 is also connected to one input terminal of an AND gate 15 having three input terminals. In addition, the output terminal of the flip-flop 4 is 3
It is connected to one input terminal of an AND gate 16 having two input terminals.

The other input terminal of AND gate 9.12 and one input terminal of AND gate 15.16 are connected to a power-on reset circuit 17, which resets flip-flops 11 and 13 when starting the switching circuit. It looks like this.

The remaining one input terminal of the AND gates 15 and 16 is a limit switch 26 attached to a DC motor 20, which will be described later.
．． It is connected to 27.

The output terminal of the AND gate 15 is connected to the reset input terminal of the flip-flop 13, and the output terminal of the AND gate 16 is connected to the reset input terminal of the flip-flop 13.
The output terminal of is connected to the reset input terminal of flip-flop 11. Further, the output terminal of the flip-flop 11 is connected to the base of a relay driving transistor 18 via a resistor, and the output terminal of the flip-flop 13 is connected to the base of a relay driving transistor 19 via a resistor. The emitters of these transistors 18, 19 are connected to the power supply. The collector of the transistor 18 is connected to a relay 21, and the contact 21a of this relay 21 is connected to the motor 20 when the transistor 18 is turned on.
When the transistor 18 is turned off, it is grounded. The collector of the transistor 19 is connected to a relay 22, and a contact 22a of the relay 22 supplies power to the motor 20 when the transistor 19 is turned on, and is grounded when the transistor 19 is turned off. The motor 20, which is not connected to these relays 21 and 22, is a DC motor that can rotate in both clockwise and counterclockwise directions, and is provided with limit switches 26 and 27 for detecting and regulating its rotational position.

The operation of this embodiment will be explained with reference to FIG. 2, which is a time chart showing the operation of this embodiment.

When switch 2 and both relay contacts 21a and 22a are set to the state shown by the solid lines in FIG. By connecting to the D input terminal of the flip-flop 3, the input signal of the flip-flop 3 becomes level r) (J as shown at the position A in FIG. 2.Then, as shown at the point B in FIG. , flip-flop 3
The output signal q becomes level "L" at the next rising edge of the clock signal generated by the oscillator 5. When the output signal q of the flip-flop 3 is input as an input signal to the flip-flop 6, the output signal of the flip-flop 16 is output at a position delayed by half a wavelength of the clock signal from the input point, that is, at a position C in FIG. Output signal Q becomes level "L".

In the flip-flop 4 and the flip-flop 70, a signal opposite to that of the flip-flop 3.6 described above is generated. That is, at the same time that the input signal of the flip-flop 13 reaches the level rH, the input signal of the level "L" is input to the flip-flop 4, and its output signal q
becomes level rHJ at position B in FIG. Then, it is input to the flip-flop 7, and its output signal Q becomes level "I(" at position C in FIG. 2).

Next, at position B in FIG. 2, the input signal π of the flip-flop 13 becomes level "L" due to the output signal q from the flip-flop 3. Therefore flip-flop 13
The output signal q of becomes the level rHJ, and the transistor 1
9 is turned off, that is, the relay 22 is turned off and the contact 22 is turned off.
a is grounded (dashed line).

At this time, the output signal q of the flip-flop 11 remains at level "H" since its input signals S and π are at the level rH, that is, both contacts of both relays 21 and 22 are both grounded. Become so.

At position C in FIG. 2, the input signal S of the flip-flop 11 becomes level "L" due to the output signal Q from the flip-flop 16. In addition, since the input signal π of the flip-flop 11 remains at the level "H", the output signal q becomes the level "HI" at the position C in FIG. The contact 21a is connected to the power supply side, and the motor 20 rotates in the opposite direction, that is, clockwise.

Next, switch switch 2 at position D in Figure 2, and power supply 1.
is connected to the input terminal of the flip-flop 4, each flip-flop 3.4.6.7.11.13 operates in the opposite manner to that described above, i.e., the output of the flip-flop 11 at position E in FIG. The signal port becomes level "H" and the transistor 18 is turned off, that is, the contact 2 of the relay 21 is turned off.
1a is grounded. Then, at position F in FIG. 2, the output signal port of the flip-flop 13 becomes level "L",
The transistor 19 turns on, and the contact 22a of the relay 22 is connected to the power supply side, causing the motor 20 to rotate counterclockwise.

The limit switches 26 and 27 input signals at levels rl and J to the AND gate 15 or 16 when the corresponding one of these switches is turned on, depending on the rotational position of the motor 20. When a signal of level "L" is input to AND gate 15 or 16,
The output signal becomes the level "L", that is, the input signal π of the flip-flop 11 or 13 becomes the level rH, and in order to turn off the transistor on the on side, both contacts 21a and 22a of both relays 21 and 22 are turned off. Both are grounded.

[Effects of the Invention] As described above, according to the present invention, after driving one relay, the other relay is driven after a predetermined period of time synchronized with a clock signal has elapsed, and the delay time can be suitably managed and both relays can be driven. Since the contacts can be suitably protected, the effect is great.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a control circuit based on the present invention. FIG. 2 is a time chart showing the operation based on the present invention. 1...Power supply 2...Switch 3.4...
・Flip-flop 5...Oscillator 6.7...Flip-flop 8...Inverter 9...AND gate 11
...Flip-flop 12...AND gate 13...Flip-flop 15.16...AND gate 17...Power-on reset circuit 18.19...Transistor 20...Motor 21.22...・Relay 21
a, 22a...Contact 26.27...Limit switch

Claims (1)

[Scope of Claims] A DC motor control circuit capable of switching the direction of rotation of a DC motor between forward and reverse by reversing the polarity of the voltage supplied to the DC motor, the circuit comprising: a voltage applied to each end of the DC motor; a pair of relays having contacts for reversing the polarity of voltage; a pair of drive circuits for driving the relay; and a switch means for switching the drive circuit between an excited state and a non-excited state; A DC motor, comprising: a digital delay circuit located between the switch means and the drive circuit, which operates in synchronization with a predetermined clock signal when the drive circuit switches from an excited state to a non-excited state. Control circuit.