JPS6321198Y2 - - Google Patents
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- Publication number
- JPS6321198Y2 JPS6321198Y2 JP7565483U JP7565483U JPS6321198Y2 JP S6321198 Y2 JPS6321198 Y2 JP S6321198Y2 JP 7565483 U JP7565483 U JP 7565483U JP 7565483 U JP7565483 U JP 7565483U JP S6321198 Y2 JPS6321198 Y2 JP S6321198Y2
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- Control Of Stepping Motors (AREA)
Description
【考案の詳細な説明】
この考案は、サ−ボモ−、ステツピングモ−タ
等を制御するモータ制御装置に関し、操作性およ
び信頼性の向上を図ることを目的とする。[Detailed Description of the Invention] The purpose of this invention is to improve the operability and reliability of a motor control device that controls a servo motor, a stepping motor, etc.
一般に、サ−ボモ−タ、ステツピングモ−タ等
を制御するモ−タ制御装置は、モ−タ駆動回路の
種類に応じ、正転パルス信号および逆転パルス信
号の出力と、ハイレベル、ロ−レベルのいずれか
の正転信号、逆転信号および所定のパルス信号の
出力とを切り換えるようになつており、従来たと
えば第１図に示すように構成されている。 In general, motor control devices that control servo motors, stepping motors, etc., output forward rotation pulse signals and reverse rotation pulse signals, and output high-level and low-level signals, depending on the type of motor drive circuit. The output of a normal rotation signal, a reverse rotation signal, and a predetermined pulse signal is switched between the output of a normal rotation signal, a reverse rotation signal, and a predetermined pulse signal.
同図において、１は基本パルス信号を出力する
パルス信号発生部に接続された第１接続端子、２
はスイツチ等からなる操作部の操作に応じてハイ
レベルの正転指令信号またはローレベルの逆転指
令信号を出力する指令信号発生部に接続された第
２接続端子、３，４は直流電源の正出力端子に接
続された第３、第４接続端子、５，６はそれぞれ
一端が第３、第４接続端子３，４に接続された限
流用抵抗、７，８はそれぞれ一端が接地され他端
が両抵抗５，６の他端に接続され両抵抗５，６と
ともに制御部９を構成する第１、第２スイツチ、
１０は両入力端子が第１接続端子１および第２ス
イツチ８の他端に接続された第１アンドゲ−ト、
１１は両入力端子が第２接続端子２および第１ス
イツチ７の他端に接続された第２アンドゲ−ト、
１２〜１４はそれぞれ入力端子が第２アンドゲ−
ト１１の出力端子、第２スイツチ８の他端および
第１スイツチ７の他端に接続された第１〜第３イ
ンバ−タ、１５は両入力端子が第１、第２アンド
ゲ−ト１０，１１の出力端子に接続された第３ア
ンドゲ−ト、１６は両入力端子が第１アンドゲ−
ト１０の出力端子および第１インバ−タ１２の出
力端子に接続された第４アンドゲ−ト、１７は両
入力端子が第１接続端子１および第２インバ−タ
１３の出力端子に接続された第５アンドゲ−ト、
１８は両入力端子が第２接続端子２および第３イ
ンバ−タ１４の出力端子に接続された第６アンド
ゲ−トであり、第１〜第６アンドゲ−ト１０，１
１，１５〜１８および各インバ−タ１２〜１４に
より出力部１９が構成されている。 In the figure, 1 is a first connection terminal connected to a pulse signal generator that outputs a basic pulse signal;
is a second connection terminal connected to a command signal generator that outputs a high-level forward rotation command signal or a low-level reverse rotation command signal in response to the operation of an operating unit consisting of a switch, etc.; 3 and 4 are the positive terminals of the DC power supply; The third and fourth connection terminals 5 and 6 are connected to the output terminal, respectively, one end of which is a current-limiting resistor connected to the third and fourth connection terminals 3 and 4, and 7 and 8, one end of which is grounded and the other end of which is connected to the third and fourth connection terminals. are connected to the other ends of both resistors 5 and 6, and constitute a control section 9 together with both resistors 5 and 6;
10 is a first AND gate whose both input terminals are connected to the first connection terminal 1 and the other end of the second switch 8;
11 is a second AND gate whose both input terminals are connected to the second connection terminal 2 and the other end of the first switch 7;
12 to 14 each have an input terminal connected to the second AND gate.
The first to third inverters 15 are connected to the output terminal of the gate 11, the other end of the second switch 8, and the other end of the first switch 7; The third AND gate is connected to the output terminal of 11, and both input terminals of 16 are connected to the first AND gate.
A fourth AND gate 17 has both input terminals connected to the first connection terminal 1 and the output terminal of the second inverter 13. 5th and gate,
18 is a sixth AND gate whose both input terminals are connected to the second connection terminal 2 and the output terminal of the third inverter 14;
1, 15-18 and each inverter 12-14 constitute an output section 19.
そして、両スイツチ７，８をともにオフするこ
とにより、第２接続端子２からの正転、逆転指令
信号に応じて第３、第４アンドゲ−ト１５，１６
が能動となるとともに、第５、第６アンドゲ−ト
１７，１８が非能動となり、第３、第４アンドゲ
−ト１５，１６の出力端子２０，２１から前記基
本パルス信号に基づく正転パルス信号または逆転
パルス信号がモ−タ駆動回路に出力され、両スイ
ツチ７，８をともにオンすることにより、第５、
第６アンドゲ−ト１７，１８が能動となるととも
に、第３、第４アンドゲ−ト１５，１６が非能動
となり、第５、第６アンドゲ−ト１７，１８の出
力端子２２，２３から前記基本パルス信号、前記
両指令信号がそのままモ−タ駆動回路に出力され
る。 By turning off both switches 7 and 8, the third and fourth AND gates 15 and 16 are activated in response to the forward and reverse rotation command signals from the second connection terminal 2.
becomes active, the fifth and sixth AND gates 17 and 18 become inactive, and normal rotation pulse signals based on the basic pulse signal are output from the output terminals 20 and 21 of the third and fourth AND gates 15 and 16. Alternatively, by outputting a reverse pulse signal to the motor drive circuit and turning on both switches 7 and 8, the fifth,
The sixth AND gates 17, 18 become active, the third and fourth AND gates 15, 16 become inactive, and the output terminals 22, 23 of the fifth and sixth AND gates 17, 18 are connected to the basic The pulse signal and both command signals are output as they are to the motor drive circuit.
したがつて、両スイツチ７，８をともにオン、
オフすることにより、モ−タ駆動回路の種類に応
じ、出力部１９の出力状態を切り換えることがで
きるが、両スイツチ７，８を同時にオン、オフさ
せなければなず、しかも一方のスイツチに接触不
良等が生じた場合には、正常な信号が出力されな
くなり、操作性および信頼性に欠けるという欠点
がある。 Therefore, both switches 7 and 8 are turned on,
By turning it off, the output state of the output section 19 can be changed depending on the type of motor drive circuit, but both switches 7 and 8 must be turned on and off at the same time, and it is necessary to touch one switch. If a defect occurs, a normal signal will no longer be output, resulting in poor operability and reliability.
この考案は、前記の点に留意してなされたもの
であり、パルス信号発生部からのパルス列からな
る基本パルス信号が入力される第１の接続端子
と、指令信号発生部からのモ−タの正転用正転指
令信号および前記正転指令信号とレベルの異なる
モ−タの逆転用逆転指令信号が入力される第２の
接続端子と、一端が抵抗を介して直流電源の正出
力端子に接続され他端がア−スされた１個の切換
スイツチと、入力端子が前記スイツチの一端に接
続された第１のインバ−タと、一方の入力端子が
ともに前記第１のインバ−タの出力端子に接続さ
れ、他方の入力端子がそれぞれ前記両接続端子に
接続された第１、第２のアンドゲ−トと、両入力
端子が前記第１、第２のアンドゲ−トの出力端子
に接続された第３のアンドゲ−トと、入力端子が
前記第２のアンドゲ−トの出力端子に接続された
第２のインバ−タと、一方の入力端子が前記第１
のアンドゲ−トの出力端子に接続され他方の入力
端子が前記第２のインバ−タの出力端子に接続さ
れた第４のアンドゲ−トと、一方の入力端子がそ
れぞれ前記両接続端子に接続され他方の入力端子
がともに前記スイツチの一端に接続された第５、
第６のアンドゲ−トと、両入力端子が前記第３、
第５のアンドゲ−トの出力端子に接続された第１
のオアゲ−トと、両入力端子が前記第４、第６の
アンドゲ−トの出力端子に接続された第２のオア
ゲ−トとを備えたモ−タ制御装置を提供するもの
である。 This invention was made with the above points in mind, and includes a first connection terminal into which a basic pulse signal consisting of a pulse train from a pulse signal generation section is input, and a motor control terminal from a command signal generation section. A second connection terminal into which a normal rotation command signal for forward rotation and a reverse rotation command signal for reversing the motor having a level different from the normal rotation command signal are input, and one end is connected to the positive output terminal of the DC power supply via a resistor. a changeover switch whose other end is grounded, a first inverter whose input terminal is connected to one end of the switch, and whose one input terminal is both connected to the output of the first inverter. first and second AND gates, the other input terminals of which are connected to the first and second AND gates, and the other input terminals of which are connected to the first and second connection terminals; a third AND gate, a second inverter whose input terminal is connected to the output terminal of the second AND gate, and one input terminal of which is connected to the output terminal of the second AND gate;
a fourth AND gate connected to the output terminal of the AND gate, the other input terminal of which is connected to the output terminal of the second inverter; and one input terminal connected to both of the connection terminals, respectively. a fifth whose other input terminals are both connected to one end of the switch;
a sixth AND gate; both input terminals are connected to the third;
The first gate connected to the output terminal of the fifth AND gate
and a second OR gate whose input terminals are connected to the output terminals of the fourth and sixth AND gates.
したがつて、この考案のモ−タ制御装置による
と、１個の切換スイツチのオン、オフにより、両
オアゲ−トの出力状態の切り換えを容易に行なう
ことができ、操作性の向上を図ることができると
ともに、従来のように２個のスイツチを必要とし
ないため、一方のスイツチの接触不良等による異
常の発生もなく、信頼性の向上を図ることができ
る。 Therefore, according to the motor control device of this invention, the output states of both OR gates can be easily switched by turning on and off one changeover switch, thereby improving operability. In addition, since two switches are not required as in the conventional case, there is no occurrence of abnormality due to poor contact of one of the switches, and reliability can be improved.
つぎに、この考案を、その１実施例を示した第
２図とともに詳細に説明する。 Next, this invention will be explained in detail with reference to FIG. 2 showing one embodiment thereof.
同図において、２はパルス信号発生部（図示せ
ず）からのパルス列からなる基本パルス信号が入
力される第１の接続端子である第５接続端子、２
５は指令信号発生部（図示せず）からのハイレベ
ルのモ−タの正転用正転指令信号およびロ−レベ
ルのモータの逆転用逆転指令信号が入力される第
２の接続端子である第６接続端子、２６は直流電
源（図示せず）の正出力端子に接続された第７接
続端子、２７は一端が第７接続端子２６に接続さ
れたプルアツプ抵抗、２８は一端が抵抗２７の他
端に接続され他端がア−スされ抵抗２７とともに
制御部２９を構成する１個の切換スイツチであ
り、該スイツチ２８のオン時およびオフ時にロ−
レベルの第１制御信号およびハイレベルの第２制
御信号が制御部２９の出力端子から出力されるこ
とになる。 In the figure, reference numeral 2 denotes a fifth connection terminal which is a first connection terminal into which a basic pulse signal consisting of a pulse train from a pulse signal generator (not shown) is input;
Reference numeral 5 denotes a second connection terminal to which a high-level normal rotation command signal for forward rotation of the motor and a low-level reversal command signal for reverse rotation of the motor are input from a command signal generation unit (not shown). 6 connection terminal, 26 is a seventh connection terminal connected to the positive output terminal of a DC power supply (not shown), 27 is a pull-up resistor whose one end is connected to the seventh connection terminal 26, and 28 is a pull-up resistor whose one end is connected to the resistor 27 and other terminals. It is a changeover switch that is connected to one end and grounded at the other end and constitutes a control section 29 together with a resistor 27, and is low when the switch 28 is on and off.
The first control signal at the high level and the second control signal at the high level are output from the output terminal of the control section 29.
３０は入力端子がスイツチ２８の一端に接続さ
れた第１のインバ−タである第４インバ−タ、３
１，３２は一方の入力端子がともに第４インバ−
タ３０の出力端子に接続され、他方の入力端子が
それぞれ第５、第６接続端子２４，２５に接続さ
れた第１、第２のアンドゲ−トそれぞれである第
７、第８アンドゲ−ト、３３は第２のインバ−タ
である第５インバ−タであり、入力端子が第８ア
ンドゲ−ト３２の出力端子に接続されている。 A fourth inverter 30 is a first inverter whose input terminal is connected to one end of the switch 28;
1 and 32 both have one input terminal connected to the fourth inverter.
seventh and eighth AND gates, which are first and second AND gates connected to the output terminal of the terminal 30, respectively, and whose other input terminals are connected to the fifth and sixth connection terminals 24 and 25, respectively; A fifth inverter 33 is a second inverter, and its input terminal is connected to the output terminal of the eighth AND gate 32.
３４は両入力端子が第７、第８アンドゲ−ト３
１，３２の出力端子に接続された第３のアンドゲ
−トである第９アンドゲ−ト、３５は一方の入力
端子が第７アンドゲ−ト３１の出力端子に接続さ
れ他方の入力端子が第５インバ−タ３３の出力端
子に接続された第４のアンドゲ−トである第10ア
ンドゲ−ト、３６，３７は一方の入力端子がそれ
ぞれ第５、第６接続端子２４，２５に接続され他
方の入力端子がともにスイツチ２８の一端に接続
された第５、第６のアンドゲ−トである第11、第
12アンドゲ−ト、３８は両入力端子が第９、第11
アンドゲ−ト３４，３６の出力端子に接続された
第１オアゲ−ト、３９は両入力端子が第10、第12
アンドゲ−ト３５，３７の出力端子に接続された
第２オアゲ−トであり、第７〜第12アンドゲ−ト
３１，３２，３４〜３７、両インバ−タ３０，３
３および両オアゲ−ト３８，３９により出力部４
０が構成されており、両オアゲ−ト３８，３９の
出力端子４１，４２から前記両指令信号および前
記基本パルス信号に基づく正転パルス信号、逆転
パルス信号がそれぞれ出力されるとともに前記基
本パルス信号および前記両指令信号がそのまま出
力される。 34 has both input terminals connected to the seventh and eighth AND gates 3
The ninth AND gate 35 is the third AND gate connected to the output terminals of the seventh AND gate 31, and the third AND gate 35 has one input terminal connected to the output terminal of the seventh AND gate 31 and the other input terminal connected to the fifth AND gate 31. The 10th AND gates 36 and 37, which are the fourth AND gates connected to the output terminal of the inverter 33, have one input terminal connected to the fifth and sixth connection terminals 24 and 25, respectively, and the other gate. 11th and 6th AND gates whose input terminals are both connected to one end of the switch 28;
12 AND gate, 38 has both input terminals 9th and 11th
The first OR gate 39 is connected to the output terminals of AND gates 34 and 36;
It is a second OR gate connected to the output terminals of AND gates 35, 37, and connects the seventh to twelfth AND gates 31, 32, 34 to 37, both inverters 30, 3
3 and both OR gates 38 and 39, the output section 4
0 is configured, and output terminals 41 and 42 of both OR gates 38 and 39 output forward rotation pulse signals and reverse rotation pulse signals based on the above-mentioned both command signals and the above-mentioned basic pulse signal, respectively, and the above-mentioned basic pulse signal And both of the command signals are output as they are.
そして、スイツチ２８をオンすることにより、
第４インバ−タ３０の入力端子および第11、第12
アンドゲ−ト３６，３７の他方の入力端子にロ−
レベルの第１制御信号が出力され、第11、第12ア
ンドゲ−ト３６，３７が非能動となり、前記正転
指令信号の入力時に、第７、第８アンドゲ−ト３
１，３２が能動となるとともに、第１、第２オア
ゲ−ト３８，３９がそれぞれ能動、非能動とな
り、出力端子４１から前記基本パルス信号に基づ
く正転パルス信号が出力されるとともに、前記逆
転指令信号の入力時に、第７、第８アンドゲ−ト
３１，３２がそれぞれ能動、非能動なり、第１、
第２オアゲ−ト３８，３９がそれぞれ非能動、能
動となり、出力端子４２から前記基本パルス信号
に基づく逆転パルス信号が出力される。 Then, by turning on the switch 28,
The input terminal of the fourth inverter 30 and the eleventh and twelfth inverters
A low voltage is connected to the other input terminal of AND gates 36 and 37.
The first level control signal is output, the 11th and 12th AND gates 36 and 37 become inactive, and when the normal rotation command signal is input, the 7th and 8th AND gates 36 and 37 become inactive.
1 and 32 become active, the first and second OR gates 38 and 39 become active and inactive, respectively, and the output terminal 41 outputs a forward pulse signal based on the basic pulse signal, and the reverse rotation pulse signal is output from the output terminal 41. When a command signal is input, the seventh and eighth AND gates 31 and 32 become active and inactive, respectively, and the first and eighth AND gates 31 and 32 become active and inactive, respectively.
The second OR gates 38 and 39 become inactive and active, respectively, and the output terminal 42 outputs a reverse pulse signal based on the basic pulse signal.
つぎに、スイツチ２８をオフすることにより、
第４インバ−タ３０の入力端子および第11、第12
アンドゲ−ト３６，３７の他方の入力端子にハイ
レベルの第２制御信号が出力され、第11、第12ア
ンドゲ−ト３６，３７が能動となり、前記正転指
令信号の入力時に、第７、第８アンドゲ−ト３
１，３２が非能動となるとともに、第１、第２オ
アゲ−ト３８，３９が能動となり、両出力端子４
１，４２からそれぞれ第５接続端子２４への前記
基本パルス信号および第６接続端子２５へのハイ
レベルの前記正転指令信号がそのまま出力される
とともに、前記逆転指令信号の入力時に、第７、
第８アンドゲ−ト３１，３２が非能動となり、両
出力端子４１，４２からそれぞれ前記基本パルス
信号およびロ−レベルの前記逆転指令信号がその
まま出力される。 Next, by turning off the switch 28,
The input terminal of the fourth inverter 30 and the eleventh and twelfth inverters
A high-level second control signal is output to the other input terminals of the AND gates 36 and 37, and the eleventh and twelfth AND gates 36 and 37 become active, and when the forward rotation command signal is input, the seventh, 8th and gate 3
1 and 32 become inactive, the first and second OR gates 38 and 39 become active, and both output terminals 4
The basic pulse signal from 1 and 42 to the fifth connection terminal 24 and the high level forward rotation command signal to the sixth connection terminal 25 are output as they are, and when the reverse rotation command signal is input, the seventh,
The eighth AND gates 31 and 32 become inactive, and the basic pulse signal and the low-level reverse rotation command signal are output as they are from both output terminals 41 and 42, respectively.
したがつて、前記実施例によると、出力部４０
の出力状態を切り換える第１、第２制御信号を出
力する１個のスイツチからなる制御部２９を設け
たことにより、スイツチ２８をオン、オフさせる
のみで出力部４０の出力状態の切り換えを容易に
行なうことができ、操作性の向上を図ることがで
きるとともに、従来のような一方のスイツチの接
触不良等による異常の発生もなく、信頼性の向上
を図ることができる。 Therefore, according to the embodiment, the output section 40
By providing a control section 29 consisting of one switch that outputs first and second control signals for switching the output state of the output section 40, the output state of the output section 40 can be easily switched by simply turning the switch 28 on and off. This makes it possible to improve the operability, and also to improve reliability without the occurrence of abnormalities due to poor contact of one of the switches as in the conventional case.
第１図は従来のモ−タ制御装置の結線部、第２
図はこの考案のモ−タ制御装置の１実施例の結線
図である。
２４，２５……接続端子、２８……切換スイツ
チ、３０，３３……インバ−タ、３１，３２、３
４〜３７……アンドゲ−ト、３８，３９……オア
ゲ−ト。
Figure 1 shows the connection section of a conventional motor control device.
The figure is a wiring diagram of one embodiment of the motor control device of this invention. 24, 25... Connection terminal, 28... Changeover switch, 30, 33... Inverter, 31, 32, 3
4-37...and gate, 38,39...or gate.
Claims (1)
パルス信号が入力される第１の接続端子と、 指令信号発生部からのモ−タの正転用正転指令
信号および前記正転指令信号とレベルの異なるモ
−タの逆転用逆転指令信号が入力される第２の接
続端子と、 一端が抵抗を介して直流電源の正出力端子に接
続され他端がア−スされた１個の切換スイツチ
と、 入力端子が前記スイツチの一端に接続された第
１のインバ−タと、 一方の入力端子がともに前記第１のインバ−タ
の出力端子に接続され、他方の入力端子がそれぞ
れ前記両接続端子に接続された第１、第２のアン
ドゲ−トと、 両入力端子が前記第１、第２のアンドゲ−トの
出力端子に接続された第３のアンドゲ−トと、 入力端子が前記第２のアンドゲ−トの出力端子
に接続された第２のインバ−タと、 一方の入力端子が前記第１のアンドゲ−トの出
力端子に接続され他方の入力端子が前記第２のイ
ンバ−タの出力端子に接続された第４のアンドゲ
−トと、 一方の入力端子がそれぞれ前記両接続端子に接
続され他方の入力端子がともに前記スイツチの一
端に接続された第５、第６のアンドゲ−トと、 両入力端子が前記第３、第５のアンドゲ−トの
出力端子に接続された第１のオアゲ−トと、 両入力端子が前記第４、第６のアンドゲ−トの
出力端子に接続された第２のオアゲ−トと を備えたモ−タ制御装置。[Claims for Utility Model Registration] A first connection terminal into which a basic pulse signal consisting of a pulse train from a pulse signal generation section is input; a normal rotation command signal for normal rotation of the motor from a command signal generation section; A second connection terminal into which a reversing command signal for reversing the motor, which has a different level from the reversing command signal, is input, and one end is connected to the positive output terminal of the DC power supply via a resistor, and the other end is grounded. one changeover switch, a first inverter having an input terminal connected to one end of the switch, one input terminal both connected to an output terminal of the first inverter, and the other input terminal connected to an output terminal of the first inverter; are connected to both connection terminals, respectively; and a third AND gate, both input terminals of which are connected to output terminals of the first and second AND gates; a second inverter having an input terminal connected to the output terminal of the second AND gate; and one input terminal connected to the output terminal of the first AND gate and the other input terminal connected to the output terminal of the second AND gate. a fourth AND gate connected to the output terminal of the second inverter; and a fifth AND gate, one input terminal of which is connected to both of the connection terminals, and the other input terminal of which is both connected to one end of the switch. a sixth AND gate; a first OR gate having both input terminals connected to the output terminals of the third and fifth AND gates; and a first OR gate having both input terminals connected to the output terminals of the fourth and sixth AND gates. and a second OR gate connected to the output terminal of the gate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7565483U JPS59183199U (en) | 1983-05-19 | 1983-05-19 | Motor control device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7565483U JPS59183199U (en) | 1983-05-19 | 1983-05-19 | Motor control device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59183199U JPS59183199U (en) | 1984-12-06 |
| JPS6321198Y2 true JPS6321198Y2 (en) | 1988-06-10 |
Family
ID=30205718
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7565483U Granted JPS59183199U (en) | 1983-05-19 | 1983-05-19 | Motor control device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59183199U (en) |
-
1983
- 1983-05-19 JP JP7565483U patent/JPS59183199U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59183199U (en) | 1984-12-06 |
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