JPS6345398Y2

JPS6345398Y2 -

Info

Publication number: JPS6345398Y2
Application number: JP991182U
Authority: JP
Priority date: 1982-01-29
Filing date: 1982-01-29
Publication date: 1988-11-25
Also published as: JPS58113569U

Description

【考案の詳細な説明】本考案はワイパ間欠作動装置に関するもので、
特にライズアツプ型のワイパ払拭システムにおい
て間欠作動を行わせる場合に、従来のワイパ間欠
リレーを用いると第１回目の払拭範囲がしまい込
み位置から間欠作動時の停止位置までの狭い範囲
に止まるのを、第１回目から該間欠作動時の停止
位置を乗越えて払拭できるようにしようとするも
のである。[Detailed description of the invention] This invention relates to an intermittent wiper operating device.
In particular, when intermittent operation is performed in a rise-up type wiper wiping system, when using a conventional wiper intermittent relay, the first wiping range is limited to a narrow range from the stowed position to the stop position during intermittent operation. The aim is to enable wiping to be performed beyond the stop position during the intermittent operation from the first time.

第１図Ａは間欠スイツチがOFFの状態を、第
１図Ｂは同じくONの状態を示すものであるが、
間欠スイツチがONの場合はブレード１は通常の
払拭範囲Ａ−Ｂを間欠的に払拭し、Ａにおいて間
欠的に停止する。ところが、第１図Ａの状態の停
止時に、しまい込み位置Ｃにあつたブレード１は
間欠スイツチがONとなつた第１回の払拭時には
従来Ｃ−Ａと払拭してＡで間欠的に停止し第２回
以後通常の払拭Ａ−Ｂを行うものであつて第１回
にはＡを乗越えてＢに達しないので必要時に十分
な払拭効果を得られないという欠点がある。その
理由は第２図のタイムチヤートにおいて間欠スイ
ツチがONとなつた場合にワイパ間欠リレーの第
１回目のON時間ｔが短いために発生するのであ
る。 Figure 1A shows the intermittent switch in the OFF state, and Figure 1B shows the same in the ON state.
When the intermittent switch is ON, the blade 1 intermittently wipes the normal wiping range A-B and stops intermittently at A. However, when the blade 1 is stopped in the state shown in Fig. 1A, the blade 1, which was in the stowed position C, wipes at C-A and stops intermittently at A when the intermittent switch is turned on for the first time. After the second wiping, normal wiping A-B is performed, and in the first wiping, A is overcome and B is not reached, so there is a drawback that a sufficient wiping effect cannot be obtained when necessary. The reason for this is that when the intermittent switch is turned on in the time chart of FIG. 2, the first ON time t of the wiper intermittent relay is short.

そこで本考案においては第３図に示すように、
この第１回目のON時間Ｔを通常のリレーON時
間よりも長くして上記欠点を除去しようとするも
のである。 Therefore, in this invention, as shown in Figure 3,
This first ON time T is made longer than the normal relay ON time in an attempt to eliminate the above-mentioned drawbacks.

第４図は本考案の実施第１例を示す回路図で、 (A) はライズアツプ機構を具えたワイパモータ回
路 (B) は普通のワイパ間欠リレー回路 (C) は間欠スイツチのON時だけ一定時間リレー
RLをONさせるタイマー回路であつて、上記(A)，(B)，(C)を組合わせることによ
り下記の通りライズアツプ型のワイパの間欠作動
ができる。 Figure 4 is a circuit diagram showing the first example of implementation of the present invention. (A) is a wiper motor circuit equipped with a rise-up mechanism (B) is an ordinary wiper intermittent relay circuit (C) is a wiper motor circuit equipped with a rise-up mechanism (C) is a wiper motor circuit that operates for a certain period only when the intermittent switch is ON. relay
This is a timer circuit that turns on RL, and by combining (A), (B), and (C) above, it is possible to intermittent operation of a rise-up type wiper as shown below.

今間欠スイツチ２をONすると、回路Ｃにより
リレーRLを一定時間ONする。それによりワイ
パモータＭはブレード１のしまい込み位置より動
き出し、ブレード１は間欠作動の停止位置Ａを過
ぎ窓を払拭する。次で回路Ｃのタイマーが切れ、
リレーRLがOFFする。よつてワイパモータは間
欠スイツチ２のON後窓を１回払拭して停止位置
Ａに停止し以後は回路Ｂにより通常の間欠作動を
続ける。第５図は本考案の実施第２例を示す回路
図で、この場合はＣのタイマー回路に代つて回路
Ｄを用いて、間欠スイツチ２がONした後、ワイ
パモータＭがブレード１のしまい込み位置Ｃから
間欠作動の停止位置Ａを過ぎて払拭開始するまで
リレーRLをONし続け、払拭開始したらリレー
RLをOFFさせるようにした回路であつて、Ａ，
Ｂ，Ｄの組合せにより同様の作動が得られる。 When intermittent switch 2 is turned on now, circuit C turns on relay RL for a certain period of time. As a result, the wiper motor M starts moving from the retracted position of the blade 1, and the blade 1 passes the intermittent operation stop position A and wipes the window. Next, the timer of circuit C goes off,
Relay RL turns OFF. Therefore, after turning on the intermittent switch 2, the wiper motor wipes the window once and stops at the stop position A, and thereafter continues normal intermittent operation by circuit B. FIG. 5 is a circuit diagram showing a second example of implementing the present invention. In this case, circuit D is used in place of the timer circuit C, and after the intermittent switch 2 is turned on, the wiper motor M is moved to the retracted position of the blade 1. Continue to turn on relay RL from C until it passes the intermittent operation stop position A and starts wiping, and when wiping starts, relay RL is turned on.
This is a circuit designed to turn off RL, and A,
A similar operation can be obtained by combining B and D.

その動作を詳細に説明すると下記の通りであ
る。 The operation will be explained in detail as follows.

(1) 間欠スイツチ２がOFFの時、コンデンサC₁
は回路中電流i₁により放電状態にあり、端子
は（−）の状態にある。(1) When intermittent switch 2 is OFF, capacitor C ₁
is in a discharge state due to the current _i1 in the circuit, and the terminal is in a (-) state.

(2) 間欠スイツチ２をONすると、回路中端子
が（−）のためトランジスタTr₁はOFF状態で
トランジスタTr₂もOFF状態となる。そのため
トランジスタTr₃はONとなり、リレーRLが吸
引しモータＭは電流i₆で回転を始める。(2) When the intermittent switch 2 is turned ON, the terminal in the circuit is (-), so the transistor Tr ₁ is turned OFF and the transistor Tr ₂ is also turned OFF. Therefore, the transistor Tr ₃ is turned on, the relay RL is attracted, and the motor M starts rotating with the current i ₆ .

(3) ワイパモータＭが半回転して端子が（＋）
となると、コンデンサC₁は電流i₂にて充電を開
始する。しかし端子が（＋）のためTr₁が
OFF状態なのでワイパモータＭは回転を続け
る。(3) Wiper motor M rotates half a turn and the terminal becomes (+)
Then, capacitor _C1 starts charging with current _i2 . However, since the terminal is (+), Tr ₁ is
Since it is in the OFF state, wiper motor M continues to rotate.

(4) ワイパモータＭが回転を続け端子が（＋）
から（−）へ変化すると、コンデンサC₁は電
流i₃にて徐々に放電を始める。それによりトラ
ンジスタTr₁がONしTr₂もONする。その結果
Tr₃がOFFし、リレーRLがOFFするが、ワイ
パモータＭは電流i₇によりなお回転し続ける。(4) Wiper motor M continues to rotate and the terminal is (+)
When the current changes from (-) to (-), the capacitor _C1 gradually starts discharging at the current _i3 . This turns on transistor Tr ₁ and turns on transistor Tr ₂ as well. the result
Although Tr ₃ is turned off and relay RL is turned off, wiper motor M continues to rotate due to current _i7 .

(5) そしてワイパモータＭが１回転して端子が
（＋）となるとワイパモータＭは閉回路i₈にて
停止する。その際コンデンサC₁は電流i₂にて充
電状態でTr₁はOFF状態であるため、コンデン
サC₂の放電電流i₅がTr₂に流れるので、Tr₂は
ONしてTr₃をOFFさせ、リレーRLをOFFさせ
る。つまり、コンデサC₂の放電電流i₅が流れて
いる間ワイパモータＭは停止していることにな
る。(5) When the wiper motor M rotates once and the terminal becomes (+), the wiper motor M stops at the closed circuit _i8 . At this time, capacitor C ₁ is in a charged state with current i ₂ and Tr ₁ is in an OFF state, so the discharging current i ₅ of capacitor C ₂ flows to Tr ₂ , so Tr ₂ is
Turn on, turn off Tr ₃ , and turn off relay RL. In other words, the wiper motor M is stopped while the discharge current _i5 of the capacitor _C2 is flowing.

(6) よつてコンデンサC₂が放電すると、Tr₂が
OFF、Tr₃がON、リレーRLがONしてワイパ
モータＭが電流i₆によつて回転を始め、端子
が（＋）から（−）になるとコンデンサC₁が
電流i₃にて放電を始め、Tr₁をON、Tr₂をON
させるのでTr₃がOFFし、リレーRLがOFFす
る。しかしワイパモータＭは電流i₇により回転
を続ける。(6) Therefore, when capacitor C ₂ discharges, Tr ₂
OFF, Tr ₃ is ON, relay RL is ON, wiper motor M starts rotating with current i ₆ , and when the terminal changes from (+) to (-), capacitor C ₁ starts discharging with current i ₃ , Turn on Tr ₁ , turn on Tr ₂
As a result, Tr ₃ turns OFF and relay RL turns OFF. However, the wiper motor M continues to rotate due to the current _i7 .

(7) ワイパモータＭが１回転して端子が（−）
から（＋）へ変化すると、ワイパモータＭは閉
回路i₈にて停止する。(7) Wiper motor M rotates once and the terminal becomes (-)
When the value changes from to (+), the wiper motor M stops in the closed circuit _i8 .

(8) 以下同様にしてワイパモータＭは間欠動作を
行う。(8) The wiper motor M performs intermittent operation in the same manner.

第６図は上記第５図の場合の各部のタイムチヤ
ートであり、この場合は起動時の負荷変動による
モータ回転数の影響を受けないという利点があ
る。 FIG. 6 is a time chart of each part in the case of FIG. 5. In this case, there is an advantage that the motor rotation speed is not affected by load fluctuations at the time of startup.

以上実施の２例について説明したが、本考案に
よると簡単な回路の付設により第１回の払拭にお
いて間欠停止位置を越えて広い範囲の払拭を可能
とするものである。 Two examples of implementation have been described above, and according to the present invention, by adding a simple circuit, it is possible to wipe a wide range beyond the intermittent stop position in the first wiping.

[Brief explanation of the drawing]

第１図Ａ，Ｂはワイパブレードの払拭範囲を示
す説明図、第２図は従来方式のタイムチヤート、
第３図は本考案のもののタイムチヤート、第４図
は本考案の実施第１例を示す回路図、第５，６図
は本考案の実施第２例を示す回路図およびタイム
チヤートである。図中の符号はそれぞれ下記部材を示す。１：ブ
レード、２：間欠スイツチ、Ｍ：モータ、RL：
リレー。 Figures 1A and B are explanatory diagrams showing the wiping range of the wiper blade, Figure 2 is a time chart of the conventional method,
FIG. 3 is a time chart of the present invention, FIG. 4 is a circuit diagram showing a first embodiment of the present invention, and FIGS. 5 and 6 are a circuit diagram and time chart showing a second embodiment of the present invention. The symbols in the drawings indicate the following members, respectively. 1: Blade, 2: Intermittent switch, M: Motor, RL:
relay.

Claims

[Claims for Utility Model Registration] 1. A wiper motor equipped with a rise-up mechanism and a wiper intermittent relay circuit,
Relay for a certain period of time only when the intermittent switch is ON
A timer circuit that turns on the relay, or a circuit that keeps the relay on from when the intermittent switch is turned on until the second wiping starts, is attached, so that when the intermittent switch is turned on, the first relay ON time is longer than the normal relay ON time. An intermittent wiper operating device that is characterized by its long life. 2. Scope of Utility Model Registration Claim 1, which is characterized by a combination of a wiper motor circuit A equipped with a rise-up mechanism, an ordinary wiper intermittent relay circuit B, and a timer circuit C that turns on the relay for a certain period of time only when the intermittent switch is turned on. The intermittent wiper operating device described in . 3 Wiper motor circuit A equipped with a rise-up mechanism, ordinary wiper intermittent relay circuit B, and circuit D that keeps the relay ON from the blade storage position until the intermittent operation stop position is passed and wiping starts, and then turns the relay OFF after wiping starts. An intermittent wiper operating device according to claim 1, characterized in that the wiper intermittent operating device is combined with the following. 4. The wiper intermittent operating device according to claim 1 or 3, which uses a combination of a capacitor C ₁ and a transistor Tr ₁ as the circuit D.