US3873888A

US3873888A - Liquid crystal protection circuit

Info

Publication number: US3873888A
Application number: US455372A
Authority: US
Inventors: George Draper Hanchett
Original assignee: RCA Corp
Current assignee: RCA Corp
Priority date: 1974-03-27
Filing date: 1974-03-27
Publication date: 1975-03-25
Anticipated expiration: 1992-03-25
Also published as: DE2501114B2; GB1485061A; SU563931A3; CH74475A4; CH610713B5; JPS50129241A; DE2501114A1; MY8100199A; DE2501114C3; CA1033480A; FR2266207B1; FR2266207A1; HK55180A

Abstract

When the oscillator which supplies the alternating drive voltage for a liquid crystal display fails, the circuit of the present application senses this condition and in response thereto removes the operating voltage from the liquid crystal driver transistors.

Description

JiDk/"JJfi an I E197! KR 06733888 V 1 1 Mar. 25, 11975 LHQUKD CRYSTAL PROTECTIGN CIRCUIT 3,588,608 6/1971 H2111|1Sk18181 315/ 20 7 1 lnvgntorz George Draper Handle, m t 3,784 87O 1/1974 Dorsey 315/4) [73] Assignee: RCA Corporation, New York, NY. Primary Examiner*j ames m Attorney, Agent, or F1rm1-1. Chnstoffersen; S. Cohen [22] F11C13 Mar. 27, 1974 [21] App1. No.: 455,372

57 ABSTRACT 317/31 g gg i When the oscillator which-supplies the alternating [58] 11616 M Search 315/20; 331/62; 317/31, drive voltage for a quid-Crystal display fails the cuit of the present app1ication senses this condiinm and in response thereto removes the operating voltage from the liquid crystaI driver transistors.

[56] References Cited UNITED STATES PATENTS 7 Uaims, 3 Drawing Figures 2,222.426 11/1940 White et a1. 315/20 15 V C, 2/ i 17 00= 01300110 OSCILLATOR PATENIEDEMRwQE & 973, 55

, BACKPLATE 1 MQUTD CRYSTAL PROTECTKON CHRCUHT Liquid crystal displays such as numeric indicators e.g. in electronic timepieces are often driven by integrated circuits. Such circuits may be battery operated and they apply unipolarity alternating voltages to the backplate and segments of the display. The backplate may receive, for example, a relatively low frequency unipolarity voltage of one phase and the segments may receive a signal of the same frequency which is either iii-phase with or out-of-phase with the backplate volt age. It sometimes occurs that the oscillator for the circuit, that is, the generator of the low-frequency unipolarity voltage, fails while the battery serving as the operating voltage source for the liquid crystal driver circuits still is producing a substantial direct voltage level. Under these circumstances, that is, the oscillator inoperative and the transistor driver operating voltage still present, direct voltages may develop across certain segments of the display and the backplate of the display and these static voltages may seriously affect the life of the liquid crystal.

In the circuit of the present application, the condition of the oscillator is sensed and when its oscillations cease, the direct voltage for the liquid crystal driver transistors is interrupted. The circuit includes a charge storage means connected through the conduction path of a transistor to a terminal for the operating voltage. The control electrode of the transistor receives the oscillations. When these oscillations are present, the charge storage means is charged, once each period of the oscillations, and this charge storage means operates as the operating voltage source. When the oscillations cease, the transistor is turned off and the charge of the charge storage means dissipates within a short period of time, thereby removing the source of operating voltage.

The invention is discussed in detail below and is illustrated in the drawing of which:

FIG. 1 is a block circuit diagram of a prior art liquid crystal display and driver circuit;

FIG. 2 is a block and schematic circuit diagram illustrating the improvement of the present invention; and

FIG. 3 is a more detailed showing of a portion of the system of HO. 2.

The problem dealt with in the present application is illustrated in the prior art system of FIG. 1. Oscillator it), which may be operated from a 5 volt operating voltage source V,,- supplies a unipolarity alternating voltage to the integrated circuit 12. This voltage may, for example, be at a frequency of 30 HZ and may have an amplitude of 5 volts, that is, it may vary between limits of O and -5 volts.

The integrated circuit 12 may be the commercially available CD4055AE, such as described in the RCA Solid State Data Book COS/MOS Digital Integrated Circuits for 1973. This circuit includes a level shifter receptive of the oscillations produced by oscillator and of a binary coded decimal (BCD) input. The four BCD voltages are applied to

pins

2, 3, 4, 5 and the oscillations to pin 6. The level shifter within the circuit 12 is connected to a BCD-to-seven segment decoder and the decoder is connected to the display driver transistors.

Pins 915 of the integrated circuit 12 connect to the seven segments of number indicator 14. Pin 1 of the circuit connects to the backplate of the numeric indicator.

ln the operation of the circuit of FIG. 1, the level shifter within circuit 12 applies amplified oscillations to pin 1. These oscillations may have an amplitude of 15 volts, that is, the alternating voltage may swing between limits of O and -l5 volts. This signal is applied to the backplate. The level shifter also drives the BCD to seven segment decoder in response to the four control voltages received at pins 2-5, and the decoder applies its output to the display driver within circuit 12. The latter, in response to these decoder outputs and to the amplified oscillations from the level shifter, applies to the respective segments a 15 volt amplitude (O to -15 volt swing) 30 Hz unipolarity signal which is either inphase with or out-of-phase with the backplate voltage. For example, when it is desired that the indicator display the numeral 3, then the display drivers apply a 30 Hz voltage in-phase with the backplate voltage to the segments e and fand a 30 Hz voltage which is outof-phase with the backplate voltage to the remaining segments a, b, c, a and g. The result of this operation is the simulation of a 30 volt bipolar alternating voltage across the liquid crystal at segments a, b, c, d and g and 0 volts appears across the liquid crystal at segments 0 and f. The 30 volt excitation causes the liquid crystal, in the event that it is of dynamic scattering type, to become excited and to scatter light. (Other types of liquid crystals, such as that which in its excited state is dark and in its unexcited state is clear, may be used instead.)

It sometimes occurs in the system of HG. 1 that the V supply voltage decreases sufficiently that the oscillator 10 goes off. This may occur while the V supply voltage is still at some substantial value such as lO or 1 l or some higher (or lower) voltage. When the oscillator goes off, the backplate voltage may go to ground. The'driver transistors no longer receive oscillations either. However, the states they assume, whether conducting or not, will depend upon the values of the direct control voltages they receive from the BCD decoder. Some of these transistors will be in a conducting state and rather than applying a unipolarity alternating voltage to the respective segments they drive, will instead apply a direct voltage almost equal to V Thus, when the oscillator stops and the backplate goes to ground, while some of the segments also will go to ground, others will *hang at almost V in view of the conducting path via a driver transistor between pin 7 (to which the V voltage is applied) and these seg ments. This direct voltage component, if not removed, may damage or destroy the liquid crystal.

The circuit of FIG. 2 illustrates the solution of a preferred embodiment of the present invention to the problem above. The circuit includes a transitor 16 connected at its collector 17 to the V supply voltage terminal and at its emitter 19 to pin 7 ofthe integrated circuit. Thus, as contrasted to the FIG. 1 circuit, the emitter-to-collector path of a transistor is now located between the operating voltage terminal and pin 7. The base 21 oftransistor 16 is connected through capacitor C, to the oscillator 10 output terminal. The base 21 also connects through resistor 18 to the emitter 19 of the transistor. The capacitor C is connected between the emitter 19 and pin 16 of the integrated circuit. Pin 16 is the one at V that is,'at ground potential.

In the operation of the circuit of FIG. 2, when the oscillator is on, the oscillations are applied through capticitor C to the base 21. Each time the oscillator voltage goes to volts, transistor 16 goes on and current flows from ground through capacitor C and the emitter-to-collector path oftransistor 16 to the V terminal. Within a very short period of time, capacitor C becomes charged almost to l5 volts, applying this l5 volts to pin 7 ofthe integrated circuit. Indeed the resistor 18 and the capacitor C operate as a low pass filter and produce a direct voltage close in value to V When V drops sufficiently so that the oscillator stops, the output terminal of the oscillator assumes a direct voltage level. It may be assumed that this direct voltage level is ground for purposes of the present explanation. This direct voltage cannot pass through ca pacitor C,. Resistor 1.8 places the base electrode 21 at the same potential as the emitter electrode so that transistor 16 goes off. The charge present on capacitor C now leaks off through certain of the transistors in the integrated circuit 12, and within a short period of time (usually within seconds or so) the voltage at pin 7 reduces to ground level. This removes any direct current components from across the liquid crystal.

The drive circuit for one segment of display (which also operates as the discharge circuit for the capacitor) is shown in greater detail in FIG. 3. It includes two complementary symmetry. metal-oxide-semiconductor (COS/MOS) inverter drivers P,. N, and P N respectively. The N type transistors N, and N connect at their source electrodes to one terminal of capacitor C and the P type transistors P, and P connect at their source electrode to V (ground). Each inverter receives at its common gate electrode connection (its input terminal) a level shifted Hz signal having an amplitude The common drain connection of inverter P 1 1 connects to one of the segments and the common drain connection ofinverter-P N connects to the backplate of the liquid crystal numeric indicator.

The switch 51, in practice, comprises MOS transmission gates. in the position of the switch shown, it applies the wave 50 to input terminal 52, this wave being complementary to the wave 54 applied to input terminal 5 3. Thus the segment shown is a selected" segment in the sense that in normal operation it will receive a voltage 180 out of phase with the voltage applied to the backplate, and an alternating voltage of amplitude substantially equal to 2 V will appear across and excite the liquid crystal.

In the operation of the circuit of FlG. 2., the bipolar transistor 16 is driven by the 30 Hz signal of amplitude V as already described. Assume that V reduces sufficiently so that the oscillator goes off and the driving voltage for transistor T6 stops at ground level. The absence of the alternating voltage 58 causes transistor 16 to go off; however, the voltage across capacitor C is at that moment close to V Assume also that when the oscillator goes off, the wave 50 applied through switch 51 to input terminal 52 of inverter P N is at ground level and the wave 54 applied to input terminal 56 of inverter P N is at V level. (It is of course understood that the level shifted

waves

50 and 54 are derived within the chip 1?. from the wave 58 produced by the oscillator so that when wave 58 stops at a given level, waves 50 and 534 also stop at given static levels.)

As the voltage applied to terminal 50 is at ground, transistor P is cut off and transistor N is turned on. As wave 54 is at V transistor P is turned on and transistor N is turned off. Thus there is low impedance conduction path from capacitor C through transistor N to the segment shown in FIG. 3. Similarly, there is a low impedance conduction path from ground through tran sistor P to the backplate shown in FIG. 3. The liquid crystal itself is of relatively high impedance; however, within a reasonable period oftime, the capacitor C discharges through transistor N,, the liquid crystal and transistor P to ground. The discharge time is a matter of 10 seconds or so and will depend largely upon the value of capacitance C and the resistance exhibited by the liquid crystal.

ln the example given above by way of illustration, the oscillation stopped oscillating at a time such that W .1. 58 was at a level of zero volts. It is equally possible i" the oscillator to stop oscillating when the wave 55? l the V level. In this case, in the example illustraiw, wave 50 would be at the V level and wave at ll zero level. This would mean that the discharge path of capacitorC would be through transistor the liquid crystal, and transistor P, to ground. The capacitor C discharge time is approximately the same as for the first case, namely 10 seconds or so.

When the BCD input voltages are such that switch 51 applies wave 50 to terminal 52, the segment is nonselected. in normal operation, the non-selected segment receives a voltage which is in phase with the backplate voltage so that Zero volts develop across the liquid crystal. When the oscillator fails, both

input terminals

52 and 56 are at V so that transistors P and P are both on. This places both the non-selected segment and backplate at ground and no voltage is present across the portion of the liquid crystal beneath the nonselected segment. The capacitor C of course, in due course, discharge through other of the inverter driver circuits within the chip and through the liquid crystal, via selected segments, as already described.

It is also possible in the case of a non-selected ment, for

waves

50 and 54 both to stop at ground level. in this case transistors N and N would be on at the same time so that the non-selected segment and backplate would both be at V Here too there would be no problem because zero volts would be present across the liquid crystal. Again this condition is just a momentary condition because within 10 seconds or so the capacitor C discharges through other of the circuits within chip 12 such as shown in FlG, 3 and the non-selected segment and bacltplate both go to ground level.

In a practical circuit such as described, in most cases V and V are separate batteries. The electrical capacities ofthese batteries are picked to have equal lives but it is rare that both batteries fail at the same moment. lf the V battery fails first, no permanent harm can result. However. if the V battery fails and the display oscillations (58 of FlG. 3) stop, damage to the liquid crystal as described above is almost certain. In this practical circuit, the oscillator generally stops when the V voltage drops somewhat below 2 volts, it being quite abnormal for the oscillator to continue working much below l.5 volts.

What is claimed is:

Lina circuit which includes: a liquid crystal display means having at least first and second conductors with a liquid crystal thcrebetween', an oscillator producing a unipolarity alternating voltage at a frequency at which excitation of the liquid crystal occurs; and driver circuit means receptive of alternating voltages derived from the alternating voltage produced by said oscillator for" applying between said first and second conductors an alternating voltage for exciting said liquid crystal, a source of power for said driver circuit means comprising, in combination:

an operating voltage terminal;

a transistor having a conduction path, first and second electrodes, one at each end of said conduction path and a control electrode for controlling the conduction of said conduction path, said transistor connected at its first electrode to said driver circuit means and at its second electrode to said operating voltage terminal;

charge storage means connected between said first electrode and a point of reference potential;

means for alternating voltage coupling the alternating voltage produced by said oscillator to said control electrode; and

a direct current impedance means connecting said control electrode to said first electrode, whereby when said oscillator is operative, said storage means is charged once each period of said unipolarity voltage via the conduction path of said transister, and when said oscillator becomes inoperative. said transistor cuts off and said charge. storage means discharges via said driver circuit means. r

2. In a circuit as set forth in claim 1, said charge storage means comprising a capacitor.

3. In a circuit as set forth in claim 2, said alternating voltage coupling means comprising a capacitor.

4. In a circuit as set forth in claim 3, said direct current impedance means comprising a resistor.

5. In a circuit as set forth in claim 1, said transistor comprising a bipolar transistor, said first, second and control electrodes comprising the emitter, collector and base electrodes, respectively, of said transistor.

6. The combination of: v

first and second field-effect transistor inverters each said inverter comprising: two field effect transistors of different conductivity types, each having a control electrode and a conduction path, said cond uction paths connected in series between a reference voltage terminal and a second terminal, an input terminal connected to both control electrodes, and an output terminal connected to the point along the series connected conduction paths where they join;

a capacitor connected between said reference voltage and second terminals;

a bipolar transistor having emitter, base and collector electrodes, connected at its emitter electrode to said second terminal and at its collector electrode to a voltage supply terminal;

means for alternating voltage coupling a unipolarity voltage to the base electrode of said bipolar transistor in a sense to turn on said transistor once each period;

a direct current impedance connecting said base electrode to said emitter electrode;

means for applying to the input terminal of said first inverter a unipolarity voltage derived from and in phase with the voltage applied to the base of said bipolar transistor;

means for applying to the input terminal of said second inverter a unipolarity voltage derived from and substantially out of phase with the voltage applied to the base of said bipolar transistor; and

a load connected between the output terminals of said first and second inverters.

7. The combination as set forth in claim 5 wherein saidloacl comprises a liquid crystal.

UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Patent No. 73,8 Dated March 25, 1975 Inventor(s) orge Draper Hanchett It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:

Column 4, line 24, "50" should be O Column 4, line 38, "50" should be FF- Signed and Scaled this twenty-second Day Of July 1975 [SEAL] Arrest:

RUTH C. MASON C. MARSHALL DANN Arresting Officer Commissioner of Parents and Trademarkx

Claims

1. In a circuit which includes: a liquid crystal display means having at least first and second conductors with a liquid crystal therebetween; an oscillator producing a unipolarity alternating voltage at a frequency at which excitation of the liquid crystal occurs; and driver circuit means receptive of alternating voltages derived from the alternating voltage produced by said oscillator for applying between said first and second conductors an alternating voltage for excitIng said liquid crystal, a source of power for said driver circuit means comprising, in combination: an operating voltage terminal; a transistor having a conduction path, first and second electrodes, one at each end of said conduction path and a control electrode for controlling the conduction of said conduction path, said transistor connected at its first electrode to said driver circuit means and at its second electrode to said operating voltage terminal; charge storage means connected between said first electrode and a point of reference potential; means for alternating voltage coupling the alternating voltage produced by said oscillator to said control electrode; and a direct current impedance means connecting said control electrode to said first electrode, whereby when said oscillator is operative, said storage means is charged once each period of said unipolarity voltage via the conduction path of said transistor, and when said oscillator becomes inoperative, said transistor cuts off and said charge storage means discharges via said driver circuit means.

6. The combination of: first and second field-effect transistor inverters each said inverter comprising: two field effect transistors of different conductivity types, each having a control electrode and a conduction path, said conduction paths connected in series between a reference voltage terminal and a second terminal, an input terminal connected to both control electrodes, and an output terminal connected to the point along the series connected conduction paths where they join; a capacitor connected between said reference voltage and second terminals; a bipolar transistor having emitter, base and collector electrodes, connected at its emitter electrode to said second terminal and at its collector electrode to a voltage supply terminal; means for alternating voltage coupling a unipolarity voltage to the base electrode of said bipolar transistor in a sense to turn on said transistor once each period; a direct current impedance connecting said base electrode to said emitter electrode; means for applying to the input terminal of said first inverter a unipolarity voltage derived from and in phase with the voltage applied to the base of said bipolar transistor; means for applying to the input terminal of said second inverter a unipolarity voltage derived from and substantially 180* out of phase with the voltage applied to the base of said bipolar transistor; and a load connected between the output terminals of said first and second inverters.

7. The combination as set forth in claim 5 wherein said load comprises a liquid crystal.