JPS5813441Y2 - Noise reduction circuit for magnetic recording and playback equipment - Google Patents

Noise reduction circuit for magnetic recording and playback equipment

Info

Publication number
JPS5813441Y2
JPS5813441Y2 JP2821876U JP2821876U JPS5813441Y2 JP S5813441 Y2 JPS5813441 Y2 JP S5813441Y2 JP 2821876 U JP2821876 U JP 2821876U JP 2821876 U JP2821876 U JP 2821876U JP S5813441 Y2 JPS5813441 Y2 JP S5813441Y2
Authority
JP
Japan
Prior art keywords
recording
playback
switch
transistor
noise reduction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2821876U
Other languages
Japanese (ja)
Other versions
JPS52119811U (en
Inventor
内野忠治
Original Assignee
シャープ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by シャープ株式会社 filed Critical シャープ株式会社
Priority to JP2821876U priority Critical patent/JPS5813441Y2/en
Publication of JPS52119811U publication Critical patent/JPS52119811U/ja
Application granted granted Critical
Publication of JPS5813441Y2 publication Critical patent/JPS5813441Y2/en
Expired legal-status Critical Current

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  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Description

【考案の詳細な説明】 本考案は磁気録音再生機の録音状態と再生状態とを切換
えるスイッチ(以下録再スイッチという)により発生す
る雑音を低減する回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit for reducing noise generated by a switch (hereinafter referred to as a recording/playback switch) for switching between a recording state and a playback state of a magnetic recording/playback device.

一般に磁気録音再生機の録再スイッチを、再生側から録
音側に切換えるときは、手動により直接または間接的に
スイッチを動作させる為、このときのスイッチの切換速
度は余り速くなく、生じるパルス性雑音も差程大きくは
ない。
Generally, when switching the recording/playback switch of a magnetic recording/playback device from the playback side to the recording side, the switch is manually operated directly or indirectly, so the switching speed at this time is not very fast, and pulse noise occurs. The difference is not that big either.

しかし録音側から再生側へ切換える場合、(通常録音状
態の解除を意味する。
However, when switching from the recording side to the playback side, (this means canceling the normal recording state.

)録再スイッチはコイルバネ等の力を利用して急激に録
音から再生へ切換える為、このとき発生するパルス性雑
音は前者に比較して極めて大きいという欠点がある。
) Since the recording/playback switch uses the force of a coil spring or the like to abruptly switch from recording to playback, it has the disadvantage that the pulse noise generated at this time is extremely large compared to the former.

また増幅回路の過渡特性の影響により、大きなパルス性
雑音は遅延現象を起し、実際に発生したパルス巾よりや
や時間的に長い、且つ、中、低域周波数成分をもった雑
音となって出力端子に現われる欠点があった。
Also, due to the transient characteristics of the amplifier circuit, large pulse noise causes a delay phenomenon, and is output as noise that is slightly longer in time than the actual pulse width and has middle and low frequency components. There was a defect that appeared on the terminal.

そのため、この種の雑音が出力端子に完全に現われない
ようにするためには、雑音発生と同時に増幅器の動作を
完全停止させておかなければならなかった。
Therefore, in order to completely prevent this type of noise from appearing at the output terminal, it is necessary to completely stop the operation of the amplifier at the same time as the noise occurs.

本考案は上記の欠点を解消するため、増幅器の動作を停
止させておく時間を設定するために、特に専用の回路素
子を用意することなく簡単に実現せしめたものである。
In order to solve the above-mentioned drawbacks, the present invention is designed to easily set the time during which the operation of the amplifier is stopped without preparing any special circuit elements.

以下、本考案の一実施例を図面とともに説明する。An embodiment of the present invention will be described below with reference to the drawings.

図に釦いて、1は録音入力端子、2は録再増幅器、3は
再生出力端子、4は録音再生用磁気ヘッド、9はヘッド
の交流バイアス用発振器、抵抗7とコンデンサ8はバイ
アス発振器9の直流電源中に含捷れるリップル電圧を減
少するために、更にバイアス発振器9の動作停止(録音
状態解除時)に際し、直流電圧の供給を停止させた後、
コンデンサ8の放電電流により発振器9の出力が徐々に
減少するように設定し、磁気ヘッド4が帯磁するのを防
止するために設けられた時定数回路である。
In the figure, 1 is the recording input terminal, 2 is the recording/reproducing amplifier, 3 is the playback output terminal, 4 is the recording/playback magnetic head, 9 is the oscillator for AC bias of the head, and resistor 7 and capacitor 8 are the bias oscillator 9. In order to reduce the ripple voltage contained in the DC power supply, when the operation of the bias oscillator 9 is stopped (when the recording state is released), after stopping the supply of DC voltage,
This is a time constant circuit that is set so that the output of the oscillator 9 gradually decreases due to the discharge current of the capacitor 8, and is provided to prevent the magnetic head 4 from becoming magnetized.

渣たトランジスタ5は録再スイッチ10の切換時に生ず
るパルス性雑音を低減するために設けられ、このトラン
ジスタ50ベースに直流を流スことによりトランジスタ
5は導通となり、増幅器2の動作を停止させ得るように
構成したものである。
The residual transistor 5 is provided to reduce pulse noise generated when the recording/reproducing switch 10 is switched, and by passing a direct current through the base of this transistor 50, the transistor 5 becomes conductive, so that the operation of the amplifier 2 can be stopped. It is composed of

スイッチ10 11 12 13はすべて録再スイッチ
で再生Pから録音R1及びこの逆の動作において、−組
のスイッチの端子、三つ、全てが瞬間的に短絡される、
いわゆるショーティン5グ・タイプの構造のものであり
、図は再生状態を示している。
Switches 10, 11, 12, and 13 are all recording/reproducing switches, and in the operation from playback P to recording R1 and vice versa, all three terminals of the - group of switches are momentarily shorted.
It has a so-called shorting type structure, and the figure shows the playback state.

尚、抵抗6はトランジスタ50ベース電流を制限するも
のである。
Note that the resistor 6 limits the base current of the transistor 50.

上記構成に於て、録再スイッチ10の録音側端子Rにバ
イアス発振器用電源子Bを接続し、中立(コモン)端子
に抵抗7、コンデンサ8からなる時定数回路を介してバ
イアス発振器9を接続し、一方再生側端子Pにトランジ
スタ50ベースヲ抵抗6を介して接続するように構成し
、録再スイッチ10が再生から録音に切換わるときは、
スイッチ10の端子のすべてが短絡されている間のみト
ランジスタ5をオンにし、録音から再生へ切換わるとき
は、スイッチ10の端子がすべて短絡された時点より、
コンデンサ8が放電する1での間トランジスタ5をオン
にするように構成したものである。
In the above configuration, the bias oscillator power supply B is connected to the recording side terminal R of the recording/playback switch 10, and the bias oscillator 9 is connected to the neutral (common) terminal via a time constant circuit consisting of a resistor 7 and a capacitor 8. On the other hand, the base of the transistor 50 is connected to the playback side terminal P via the resistor 6, and when the recording/playback switch 10 is switched from playback to recording,
The transistor 5 is turned on only while all the terminals of the switch 10 are short-circuited, and when switching from recording to playback, from the time when all the terminals of the switch 10 are short-circuited,
The structure is such that the transistor 5 is turned on during the period 1 when the capacitor 8 is discharged.

本考案は以上のように構成されるから、とくに録音側か
ら再生側へ切換えるときのパルス性雑音を除去すること
ができ、録再増幅器の動作を停止させておく時間を設定
するために、特に専用の回路素子を用意することなく簡
単に実現できるものである。
Since the present invention is constructed as described above, it is possible to eliminate pulse noise especially when switching from the recording side to the playback side, and in particular, it is possible to eliminate pulse noise when switching from the recording side to the playback side. This can be easily realized without preparing a dedicated circuit element.

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本考案の一実施例を示す磁気録音再生機の雑音低
減回路の回路構成図である。 図中、1・・・・・・録音入力端子、2・・・・・・増
幅器、3・・・・・・再生出力端子、4・・・・・・録
再ヘッド、5・・・・・・トランジスタ、7,8・・・
・・・抵抗及びコンデンサからなる時定数回路、9・・
・・・・バイアス発振器、10〜13・・・・・・録再
スイッチ。
The drawing is a circuit configuration diagram of a noise reduction circuit for a magnetic recording/reproducing machine showing an embodiment of the present invention. In the figure, 1...recording input terminal, 2...amplifier, 3...playback output terminal, 4...recording/playback head, 5...・Transistor, 7, 8...
...Time constant circuit consisting of a resistor and a capacitor, 9...
...Bias oscillator, 10-13...Recording/playback switch.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 録音スイッチの録音側端子をバイアス発振器用電源に接
続し、中立端子を時定数回路を介してバイアス発振器に
接続すると共に、再生側端子を導通時録再増幅器の動作
を停止させるトランジスタのベース端子に接続するよう
に構成し、上記録再スイッチを再生側から録音側に切換
えるときは該スイッチの全ての端子が短絡されている間
のみ、上記トランジスタを導通にし、録音側から再生側
へ切換えるときは上記スイッチの全ての端子が短絡され
た時点から上記時定数回路の放電時間上記トランジスタ
を導通にするように構成したことを特徴とする磁気録音
再生機の雑音低減回路。
Connect the recording side terminal of the recording switch to the power supply for the bias oscillator, connect the neutral terminal to the bias oscillator via a time constant circuit, and connect the playback side terminal to the base terminal of the transistor that stops the operation of the recording re-amplifier when it is turned on. When switching the above recording/re-switch from the playback side to the recording side, the above transistor is made conductive only while all terminals of the switch are short-circuited, and when switching from the recording side to the playback side, the above transistor is made conductive. A noise reduction circuit for a magnetic recording/reproducing machine, characterized in that the transistor is made conductive for a period of time during which the time constant circuit discharges from the time when all terminals of the switch are short-circuited.
JP2821876U 1976-03-09 1976-03-09 Noise reduction circuit for magnetic recording and playback equipment Expired JPS5813441Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2821876U JPS5813441Y2 (en) 1976-03-09 1976-03-09 Noise reduction circuit for magnetic recording and playback equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2821876U JPS5813441Y2 (en) 1976-03-09 1976-03-09 Noise reduction circuit for magnetic recording and playback equipment

Publications (2)

Publication Number Publication Date
JPS52119811U JPS52119811U (en) 1977-09-10
JPS5813441Y2 true JPS5813441Y2 (en) 1983-03-16

Family

ID=28487893

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2821876U Expired JPS5813441Y2 (en) 1976-03-09 1976-03-09 Noise reduction circuit for magnetic recording and playback equipment

Country Status (1)

Country Link
JP (1) JPS5813441Y2 (en)

Also Published As

Publication number Publication date
JPS52119811U (en) 1977-09-10

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