JPH01248560A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To exclude a collector-base junction capacity which does not perform a transistor function, and to improve high frequency characteristic by burying an oxide film in a semiconductor substrate of a high frequency transistor. CONSTITUTION:After an n-type epitaxial layer 1B is formed on an n<+> type silicon substrate 1A, the layer 1B is thermally oxidized to form a silicon oxide film, part of which is removed by etching to form a buried oxide film 2. Then, after an n-type epitaxial layer 3 is formed on the oxide 2 and the layer 1B, p-type impurity ions are implanted to form a p-type active base region 4. After a silicon oxide film 5 is then again formed on the surface, an opening 8E and an opening 8B are formed. Then, after an n<+> type polycrystalline silicon layer 6 and a nitride film 7 are formed, the opening 8E, the film 7 of the peripheral edge of the opening and the layer 6 are sequentially removed by etching, and the surface of the base region is exposed. Thereafter, a base contact is diffused in the opening 8B to form a region 9 and a region 10, and the region 4 is simultaneously made to arrive at the film 2. Subsequently, the film 7 is entirely removed by etching, and electrodes E and B are shaped and isolated. Thus, the device is obtained whose collector-base junction capacity is small, and whose high frequency characteristic is good.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Conventional technology]

With the recent trend toward higher frequencies of bipolar transistors and integrated circuits, collector-base junction capacitance has become increasingly problematic.

FIGS. 3(a) to 3(c) are cross-sectional views of a semiconductor chip shown in order of steps for explaining a conventional method of manufacturing a semiconductor device.

First, as shown in FIG. 3A, a p-type active base region 4 is formed on the surfaces of a 1♂-type silicon substrate IA and a thin n-type epitaxial layer 19, and then a silicon oxide film 5 is formed on the surface of the base region 40. form.

Next, an emitter aperture 8E for general use as an emitter and a base aperture 8B for a base contact are formed using a normal photolithography technique.

Next, as shown in FIG. 3(b), an n medium polycrystalline silicon layer 6 and a nitride film 7 are formed on the surface of the semiconductor chip.

Next, the base opening 8B and the nitride film 7 on the upper layer of the silicon oxide film 5 around the periphery are formed using a normal photolithography technique.
After sequentially etching and removing the polycrystalline silicon layer 6,
A base contact region IO and an n-type emitter region 9 are formed by thermal diffusion at 950° C. for 40 minutes.

Next, as shown in FIG. 3(c), after the nitride film 7 is completely removed and KAfi is deposited on the entire surface, the emitter electrode E and the base electrode B are shaped and separated using the usual photolithography technique.

Here, a collector-base junction JCB is formed between the n-type epitaaxial layer IB and the pm active base region 4.

[Problems to be Solved by the Invention] Generally, in order to improve the high frequency characteristics of a high frequency transistor, it is important to reduce the collector-base junction capacitance and base resistance by miniaturizing the element.

Therefore, it is required to narrow the emitter-to-emitter pitch and the width of the emitter 1 pole and base electrode.

On the other hand, when high-frequency transistors operate at large currents,
It is generally well known that current, both direct current and alternating current, flows in a concentrated manner around the emitter region due to the peripheral effect.

Therefore, in order to handle large currents and operate efficiently at high frequencies, it is necessary to have a structure in which the length of the peripheral portion is increased and the area of the effective portion that exercises the transistor function is made as small as possible.

The above-mentioned conventional semiconductor device manufacturing method naturally has a limit to the miniaturization of elements, and inevitably creates a collector-base junction that does not effectively exercise the transistor function. There was a problem in that the high frequency characteristics were unnecessarily deteriorated.

An object of the present invention is to provide a method for manufacturing a semiconductor device with small collector-base junction capacitance and good high frequency characteristics.

[Means to solve the problem]

The method for manufacturing a semiconductor device of the present invention includes: (A) After covering the surface of a collector region of a semiconductor substrate of one conductivity type with an insulating film, a buried insulating film corresponding to a base electrode is formed using photolithography technology. (B) forming an epitaxial layer of one conductivity type covering the surfaces of the semiconductor substrate and the buried insulating film; (C) diffusing impurities of the opposite conductivity type into at least a portion of the epitaxial layer; (D) After covering the surface of the base region with an insulating film,
forming an opening corresponding to the buried insulating film and exposing the base region; (E) forming a base contact layer by diffusing impurities of opposite conductivity type from the surface of the base region; The method includes the step of increasing the depth of the base region until it reaches at least the surface of the buried insulating film.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1(a) to 1(f) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining a first embodiment of the present invention.

First, as shown in FIG.
form.

Next, the epitaxial layer IB is thermally oxidized to a thickness of 1100 nm.
After forming a silicon oxide film, a part of the silicon oxide film is etched away using a normal photolithography technique to form a buried oxide film 2.

Next, an n-type epitaxial layer 3 having a thickness of 200 nm is formed on the surface of the buried oxide film 2 and the epitaxial layer IB by a normal MBE method.

Next, as shown in FIG. 1(b), an epitaxial layer 3 is formed.
p-type impurity ions from the 0 surface with an intensity of 20 keV,
The p-type active base region 4 is implanted at a depth of 2×10 13 /cnl to a depth that does not reach the buried oxide film 2 .

Next, as shown in FIG. 1(c), a silicon oxide film 5 is again formed on the surface.

Next, as shown in FIG. 1(d), a base aperture 8 for a base contact corresponding to an emitter aperture aperture 8E1 and a buried oxide film 2 is formed by a normal photolithography technique.
Form B.

Next, a nitride film 7 is formed on the n+ type polycrystalline silicon layer 6 and its surface by a vapor phase growth method.

Next, as shown in FIG. 1(e), the base opening 8B and the silicon oxide film 7 and the polycrystalline silicon layer 6 at its periphery are sequentially etched away using a normal photolithography technique, and the buried oxide film 2 is removed. Atomize the surface of the base area above the surface.

Next, by performing base contact diffusion at 950° C. for 30 minutes in the base opening 8B, an n-type emitter region 9 and a base contact region 10 are formed, and at the same time, the base region 4 is formed in the buried oxide film 2. reach it.

Therefore, base contact region 1°0 and buried oxide film 2
The collector-base junction JCB between the epitaxial layer 3 and the base region 4 that existed between them disappears.

Next, as shown in FIG. 1(f) IC, the 1 nitride film 7 is etched away from the entire surface, and finally the M layer is deposited on the entire surface, and then the emitter electrode E and the base electrode I3f are shaped by ordinary photolithography technology. To separate.

The bipolar transistor according to this embodiment has a collector
The base junction JCB is directly under the emitter region 9 where the transistor action mainly operates effectively, and the transistor/distributor 2
Since the collector-base junction 'Tcn does not exist directly below the base-contact region 10 where the effect was small, the base-collector junction capacitance 1 ccB is reduced by 20 to 30% corresponding to the reduction in the joint surface area. be.

FIGS. 2(a) to 2(f) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining a second embodiment of the present invention.

To manufacture a bipolar IC, first, as shown in FIG. 2(a), a layer is formed on the surface of an n-type silicon substrate IC with a buried collector region ID provided in the upper layer using normal photolithography technology.
In the same process as in FIG. 1(a), the n-type epitaxial layer IB is formed.
and a buried oxide film 2 is formed on its surface.

Next, as shown in FIG. 2(b), a thin epitaxial layer 3 is formed by the usual MBE method.

Next, the entire semiconductor substrate is thermally oxidized to form a silicon oxide film 15, and then a part of the oxide film 15 is etched away using a normal photolithography technique, thereby exposing a part of the epitaxial layer 3 to gold.

Next, as shown in FIG. 2(c), a large amount of p-type impurity is thermally diffused to form an insulating diffusion layer 16.

Next, the entire surface of the oxide film 15 is removed by etching.

Next, the n-type impurity is thermally diffused for many tK to form the collector diffusion layer 1.
After forming 7"f, the semiconductor substrate was thermally oxidized again to form a silicon oxide film 18fK. Then, 1 m of silicon oxide 111!18 corresponding to the transistor formation region was etched away using ordinary photolithography technology. , a part of the epitaxial layer 3 is exposed.

(After that, as shown in FIGS. 2(d) to 2(f), the active base area 4.''J6 crystal silicon!f46. .An emitter electrode E, a base electrode B, and a collector electrode C are formed.

The effect of reducing the collector-base junction capacitance is similar to that of the whistle 1 embodiment.

〔Effect of the invention〕

As explained above, when applied to a high-frequency transistor, the present invention 8A becomes effective by embedding an oxide film in the semiconductor substrate to eliminate the collector-base junction space that does not perform the transistor function. , has the effect of significantly improving high frequency characteristics.

[Brief explanation of the drawing]

8g1 Figures (a) to (f) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining the first embodiment of the present invention;
Figures (a) to (e) are cross-sectional views of a semiconductor chip shown in the order of steps to explain the second embodiment of the present invention, and Figure 3 (a).
-(c) are cross-sectional views of a semiconductor chip shown in the order of steps to explain a conventional method of manufacturing a semiconductor device. 1 person... n-type silicon substrate, IB...
・N-type epitaxial layer, 2...Different a pass 1 (
Satan film, 3...N-type epitaxial I9.4.
...p-sensitive base region, 5... silicon insulating film, 8B... base opening, 10...
...Base contact layer, 18a...Silicon oxide film. Agent Patent Attorney Otsuki Uchihara 1 Portion 32 Figures M and 3

Claims (1)

[Claims] (A) After covering the surface of the collector region of a semiconductor substrate of one conductivity type with an insulating film, a step of forming a buried insulating film by leaving a portion corresponding to the base electrode using photolithography technology; (B) forming an epitaxial layer of one conductivity type covering the surfaces of the semiconductor substrate and the buried insulating film; (C) diffusing impurities of the opposite conductivity type into at least a portion of the epitaxial layer; (D) After covering the surface of the base region with an insulating film, forming an opening corresponding to the buried insulating film. (E) forming a base contact layer by diffusing impurities of opposite conductivity type from the surface of the base region, and forming a base contact layer in the depth of the base region to expose the base region; A method for manufacturing a semiconductor device, comprising the step of spreading the film until it reaches at least the surface of the film.