JPH0122981B2 - - Google Patents
Info
- Publication number
- JPH0122981B2 JPH0122981B2 JP56130476A JP13047681A JPH0122981B2 JP H0122981 B2 JPH0122981 B2 JP H0122981B2 JP 56130476 A JP56130476 A JP 56130476A JP 13047681 A JP13047681 A JP 13047681A JP H0122981 B2 JPH0122981 B2 JP H0122981B2
- Authority
- JP
- Japan
- Prior art keywords
- pellet
- lead frame
- recesses
- disk
- pellets
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000008188 pellet Substances 0.000 claims abstract description 52
- 238000004519 manufacturing process Methods 0.000 claims abstract description 10
- 239000004065 semiconductor Substances 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims description 5
- 229910000679 solder Inorganic materials 0.000 abstract description 14
- 238000010438 heat treatment Methods 0.000 abstract description 3
- 238000005476 soldering Methods 0.000 abstract description 3
- 238000000034 method Methods 0.000 description 22
- 239000011347 resin Substances 0.000 description 6
- 229920005989 resin Polymers 0.000 description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 5
- 239000004332 silver Substances 0.000 description 5
- 239000000463 material Substances 0.000 description 3
- 238000000465 moulding Methods 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 1
- ZTXONRUJVYXVTJ-UHFFFAOYSA-N chromium copper Chemical compound [Cr][Cu][Cr] ZTXONRUJVYXVTJ-UHFFFAOYSA-N 0.000 description 1
- 238000007606 doctor blade method Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000013022 venting Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
- H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
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- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3205—Shape
- H01L2224/32057—Shape in side view
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/32257—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H01L2224/732—Location after the connecting process
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- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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- H01L2224/92—Specific sequence of method steps
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- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Die Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
この発明は生産性の向上を目的としたマルチペ
レツトマウント方式の半導体装置の製造方法に関
するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device using a multi-pellet mounting method for the purpose of improving productivity.
一般に、トランジスタやICなどの樹脂封止型
半導体装置の製造工程にはペレツトマウント工程
やワイヤボンデイング工程、樹脂モールド工程な
どがあり、これら各工程には量産性を図る目的で
複数のリードと被ペレツトマウント基板を一連に
一体化したリードフレームが用いられる。例えば
トランジスタの場合は第1図及び第2図に示すよ
うなリードフレーム1を用いて次の要領で製造さ
れている。但し、リードフレーム1における2は
複数のリード、3は所定のリード2,2…にかし
め等の手段で一体化された複数の一連に並ぶ被ペ
レツトマウント基板で例えば放熱板、4は複数の
リード2,2…を連結して一体化するタイバー部
である。 Generally, the manufacturing process for resin-sealed semiconductor devices such as transistors and ICs includes a pellet mounting process, a wire bonding process, and a resin molding process, and each of these processes requires multiple leads and covers for the purpose of mass production. A lead frame is used in which a series of pellet mount substrates are integrated. For example, a transistor is manufactured using a lead frame 1 as shown in FIGS. 1 and 2 in the following manner. However, in the lead frame 1, 2 is a plurality of leads, 3 is a plurality of pellet mounting substrates lined up in a series that are integrated with predetermined leads 2, 2, etc. by means such as caulking, for example, a heat sink, and 4 is a plurality of This is a tie bar portion that connects and integrates the leads 2, 2, . . .
まずリードフレーム1を水平に保持して長手方
向に放熱板3の配列ピツチ毎に間歇送りして各放
熱板3,3…を半田供給ポジシヨンとペレツトマ
ウントポジシヨンに1放ずつ順番に送り込む。そ
して、1枚の放熱板3が半田供給ポジシヨンにく
るとこの放熱板3上に定量の半田5を供給し、次
のペレツトマウントポジシヨンにくると先に供給
されて溶融した半田5上に半導体ペレツト(以下
単にペレツトと称す)6を供給してペレツトマウ
ントを行う。このように1個ずつのペレツトマウ
ントが完了すると、次はリードフレーム1を同じ
姿勢でワイヤボンデイングポジシヨンに間歇送り
して、各ペレツト6,6…と対応するリード2,
2…とに金線等のワイヤ7,7…を順番にボンデ
イングする。そして、全てのワイヤボンデイング
が完了したリードフレーム1を金型内にセツトし
て複数の要所に外装樹脂材8,8…を一括してモ
ールド成形し、最後に金型からリードフレーム1
を取出してリードフレーム1のタイバー部4を一
括して切断除去して個々に分割された複数の半導
体装置を得る。 First, the lead frame 1 is held horizontally and the heat sinks 3 are intermittently fed in the longitudinal direction at each array pitch, and each heat sink 3, 3, . When one heat sink 3 comes to the solder supply position, a certain amount of solder 5 is supplied onto this heat sink 3, and when the next pellet mount position is reached, the solder 5 that was previously supplied and melted is poured onto the heat sink 3. Semiconductor pellets (hereinafter simply referred to as pellets) 6 are supplied and pellet mounting is performed. When the pellet mounting is completed one by one in this way, the lead frame 1 is intermittently fed to the wire bonding position in the same posture, and each pellet 6, 6... and the corresponding lead 2,
2. Wires 7, 7, etc., such as gold wires, are bonded in order to the wires 7, 7, and so on. Then, the lead frame 1 on which all wire bonding has been completed is set in a mold, and exterior resin materials 8, 8, etc. are molded all at once at multiple key points.Finally, the lead frame 1 is removed from the mold.
The lead frame 1 is taken out and the tie bar portions 4 of the lead frame 1 are cut and removed all at once to obtain a plurality of individually divided semiconductor devices.
ところで、上記のペレツトマウント工程は外部
で位置決めされたペレツト6を真空吸着コレツト
などで取出して、定ポジシヨンに送り込まれた放
熱板3の定位置に供給する動作を1枚のリードフ
レーム1に対して複数回繰り返して行う必要があ
るため、ペレツトマウント工程のインデツクスが
悪く、全体の生産性の改善が難しかつた。また、
マウント時のペレツト位置ズレなどがあつて放熱
板3上にペレツト6を正確に位置決め固定するこ
とが難しく、そのため次のワイヤボンデイング工
程が繁雑化する傾向にあり、尚更に生産性の改善
が難しかつた。 By the way, the above pellet mounting process involves taking out the externally positioned pellet 6 using a vacuum suction collet, etc., and supplying it to the fixed position of the heat dissipation plate 3 that has been fed into the fixed position, with respect to one lead frame 1. Because the process had to be repeated multiple times, the index of the pellet mounting process was poor, making it difficult to improve overall productivity. Also,
Due to misalignment of the pellets during mounting, it is difficult to accurately position and fix the pellets 6 on the heat sink 3, which tends to complicate the next wire bonding process, making it even more difficult to improve productivity. Ta.
本発明はかかる問題点に鑑みてなされたもの
で、特にペレツトマウント工程をリードフレーム
の単位で複数箇所一括して行うマルチ方式の製造
方法を開発し、提供する。以下、本発明を図面を
参照して説明する。 The present invention has been made in view of the above problems, and particularly aims to develop and provide a multi-method manufacturing method in which the pellet mounting process is performed at a plurality of locations on a lead frame basis. Hereinafter, the present invention will be explained with reference to the drawings.
例えば、本発明を上記リードフレーム1を用い
た半導体装置の製造に適用して説明すると、本発
明の特徴はリードフレーム1に対応して第3図及
び第4図に示すような帯板状の金属製デイスク9
を用いてペレツトマウント工程及びそれ以降の各
工程を行うことである。このデイスク9はクロム
銅や鉄−ニツケル合金などの金属薄板で、リード
フレーム1の長さとほぼ同じ長さを有し、また幅
はペレツト6の一辺の長さより少し大きい程度に
設定される。更にデイスク9にはリードフレーム
1の複数の放熱板3,3…の被ペレツトマウント
箇所に対応する複数の箇所に表面から裏面にかけ
てプレス加工した凹部10,10…が形成され
る。この凹部10,10…の底面はペレツトサイ
ズとほぼ一致する矩形を有しまた、凹部10,1
0…の内側面は底面から外方に向かうテーパ側面
に形成される。また凹部10,10…の底面まで
の深さはペレツト6の高さ(厚み)より若干小さ
目に設けられる。 For example, when the present invention is applied to the manufacture of a semiconductor device using the lead frame 1 described above, the feature of the present invention is that the lead frame 1 has a strip-like shape as shown in FIGS. 3 and 4. metal disk 9
The pellet mounting process and subsequent steps are carried out using the following method. The disk 9 is a thin metal plate made of chromium copper or iron-nickel alloy, and has a length approximately equal to the length of the lead frame 1, and its width is set to be slightly larger than the length of one side of the pellet 6. Further, in the disk 9, recesses 10, 10, . . . are formed by pressing from the front surface to the back surface at a plurality of locations corresponding to the pellet mounting locations of the plurality of heat dissipating plates 3, 3, . . . of the lead frame 1. The bottom surfaces of the recesses 10, 10... have a rectangular shape that almost matches the pellet size.
The inner surface of 0... is formed into a tapered side surface facing outward from the bottom surface. Further, the depth to the bottom of the recesses 10, 10, . . . is slightly smaller than the height (thickness) of the pellet 6.
次に上記リードフレーム1とデイスク9を用い
たペレツトマウント工程を第5図を参照して説明
する。まずデイスク9の各凹部10,10…の底
面に定量の半田11,11…を一括供給する(第
5図イ)。この半田供給は、例えば第6図に示す
ように凹部10,10…と同じ配列ピツチで並ぶ
複数本一体の真空吸着ペン12,12…の各々の
下端で定量の半田片11′,11′…を吸着して凹
部10,10…に供給するようにすればよい。ま
たこの時のデイスク9は加熱台14上に塔載して
加熱しておき、半田片11′,11′…が供給され
るとこれを加熱して凹部10,10…の底面上で
溶融させる。次にデイスク9を幅方向に1ピツチ
移動させて、各凹部10,10…にペレツト6,
6…を一括供給して半田付けする(第5図ロ)。
このペレツト供給も前述の半田供給と同じように
複数本一体の真空吸着ペン(図示せず)を使つて
行えばよい。また、このペレツト供給用真空吸着
ペンは例えば接着シート上に互いに離隔させて接
着して格子状に配列したペレツト6,6…を複数
個一括吸着して接着シートから取出してデイスク
9へ供給するものや、平板状のトレー上に一定の
間隔で位置決め載置された複数のペレツト6,6
…を複数個一括吸着して、トレーから取出してデ
イスク9へ供給するものが用いられる。また、こ
のデイスク9へのペレツト供給に際し第7図の鎖
線で示すように凹部10に対してペレツト6が位
置ズレを起していても、このペレツト6は凹部1
0のテーパ内側面にガイドされて自ずと位置決め
されて半田付けされる。また、このペレツト半田
付けの時、ペレツト6に真空吸着ノズルで微振動
を与える等の工夫をすればより確実な半田付け、
及び位置決めが行える。 Next, a pellet mounting process using the lead frame 1 and disk 9 will be explained with reference to FIG. First, a fixed amount of solder 11, 11... is supplied all at once to the bottom surface of each recess 10, 10... of the disk 9 (FIG. 5A). This solder supply is carried out, for example, as shown in FIG. 6, by applying a fixed amount of solder pieces 11', 11', . What is necessary is to adsorb it and supply it to the recesses 10, 10, . . . . In addition, the disk 9 at this time is placed on the heating table 14 and heated, and when the solder pieces 11', 11'... are supplied, they are heated and melted on the bottom surfaces of the recesses 10, 10... . Next, the disk 9 is moved one pitch in the width direction, and the pellets 6,
6... are supplied all at once and soldered (Figure 5 B).
This pellet supply may also be performed using a plurality of integrated vacuum suction pens (not shown) in the same manner as the solder supply described above. In addition, this vacuum suction pen for supplying pellets, for example, sucks at once a plurality of pellets 6, 6, etc., which are arranged in a lattice shape by adhering them at a distance from each other on an adhesive sheet, takes them out from the adhesive sheet, and supplies them to the disk 9. A plurality of pellets 6, 6 placed at regular intervals on a flat tray.
. . are adsorbed at once, taken out from the tray, and supplied to the disk 9. Moreover, even if the pellet 6 is misaligned with respect to the recess 10 as shown by the chain line in FIG.
It is guided by the tapered inner surface of 0 and is automatically positioned and soldered. Also, when performing pellet soldering, it is possible to achieve more reliable soldering by applying a slight vibration to the pellet 6 using a vacuum suction nozzle.
and positioning.
一方、第5図のハに示すようにリードフレーム
1の各放熱板3,3…の被ペレツトマウント位置
上に導電性接着材、例えば銀ペースト13,13
…を定量ずつ一括供給して付着させる。この銀ペ
ースト13,13…の供給は複数本のノズルを用
いた注出法や、複数の透孔を有するマスクを用い
たドクターブレード法などで行えばよい。而し
て、第5図ニに示すようにリードフレーム1の各
放熱板3,3…の銀ペースト13,13…上にデ
イスク9の各凹部10,10…の裏面を押し当て
て銀ペースト13,13…を等厚に拡げデイスク
9を位置決め接着する。そして、全体を加熱炉に
送つて半田11の融点より低い温度(250℃程度)
で熱処理して銀ペースト13,13…を加熱乾燥
させて、リードフレーム1にデイスク9を一体に
固定化する。 On the other hand, as shown in FIG.
...is supplied in a fixed amount at once and deposited. The silver pastes 13, 13, . . . may be supplied by a pouring method using a plurality of nozzles, a doctor blade method using a mask having a plurality of through holes, or the like. Then, as shown in FIG. 5D, the silver paste 13 is pressed onto the silver paste 13, 13,... of each of the heat sinks 3, 3,... of the lead frame 1 by pressing the back side of each concave portion 10, 10,... of the disk 9. , 13... are spread to have the same thickness, and the disk 9 is positioned and glued. Then, the whole is sent to a heating furnace at a temperature lower than the melting point of solder 11 (about 250℃).
The silver pastes 13, 13, . . . are heated and dried to fix the disk 9 integrally to the lead frame 1.
このようにリードフレーム1の各放熱板3,3
…上の定位置にデイスク9を介してペレツト6,
6…を固定してペレツトマウントが完了すると、
次に全体をワイヤボンデイングポジシヨンに送つ
て第8図に示すように各ペレツト6,6…の表面
電極と対応するリード2,2…にワイヤ15,1
5…をボンデイングする。このワイヤボンデイン
グは複数本のボンデイングツール(図示せず)を
用意して複数箇所同時に行うことも可能だが、最
近のボンデイング速度の高速化により、1本のボ
ンデイングツールで複数箇所を順次に行つても時
間的に大差はない。次にリードフレーム1にデイ
スク9を固定したまま樹脂モールド成形用金型を
用いて、第9図に示すように複数の要所に外装樹
脂材16,16…をモールドする。そして、リー
ドフレーム1のタイバー部4を切断する時に外装
樹脂材16,16…の側面に沿つてカツターを入
れてデイスク9の露出部分を切断すれば、第10
図に示す半導体装置が複数個一括して得られる。 In this way, each heat sink 3, 3 of the lead frame 1
...The pellet 6 is placed in the upper position via the disk 9,
6. When the pellet mounting is completed by fixing...
Next, the whole is sent to a wire bonding position, and as shown in FIG.
5. Bonding... It is possible to perform wire bonding at multiple locations at the same time by preparing multiple bonding tools (not shown), but with the recent increase in bonding speed, it is also possible to perform wire bonding at multiple locations sequentially using a single bonding tool. There is no big difference in time. Next, with the disk 9 fixed to the lead frame 1, a resin molding die is used to mold exterior resin materials 16, 16, . . . at a plurality of key points as shown in FIG. Then, when cutting the tie bar portion 4 of the lead frame 1, if the cutter is inserted along the side surface of the exterior resin material 16, 16... and the exposed portion of the disk 9 is cut, the 10th
A plurality of semiconductor devices shown in the figure can be obtained at once.
尚、上記デイスク9を用いた製造方法におい
て、デイスク9の凹部10,10…の裏面に銀ペ
ーストを塗着しておいてデイスク9をリードフレ
ーム1の放熱板3,3…上に固着するようにして
もよい。また、デイスク9の各凹部10,10…
の底面や側面に空気抜き用の小孔を穿設して半田
11,11…の流動性を良くし、ペレツト6,6
…との接着面積の均一化や、ペレツト6,6…の
放熱性の改善等を図る工夫も可能である。 In addition, in the manufacturing method using the disk 9 described above, silver paste is applied to the back surface of the recesses 10, 10... of the disk 9, and the disk 9 is fixed onto the heat sinks 3, 3... of the lead frame 1. You may also do so. In addition, each recess 10, 10... of the disk 9.
Small holes for air venting are made on the bottom and sides of the solder to improve the fluidity of the solder 11, 11..., and the pellets 6, 6
It is also possible to make efforts to make the adhesion area uniform with the pellets 6, 6, etc., and to improve the heat dissipation of the pellets 6, 6, etc.
以上説明したように、本発明によればデイスク
の使用によつてペレツトマウントがリードフレー
ム単位のマルチマウント方式で簡単に行えるの
で、生産性が大幅に向上し、製造原価の低減が図
れる。また、デイスクの凹部にペレツトを嵌める
ことによりペレツトの位置決めができるので、ペ
レツトマウント前にペレツトを正確に位置決めす
る必要がなく、またペレツトマウント時にペレツ
トが配置ズレを起す心配がなくて後工程のワイヤ
ボンデイング等が正確に行え歩留り向上が図れ
る。 As explained above, according to the present invention, by using a disk, pellet mounting can be easily performed in a multi-mounting method for each lead frame, thereby greatly improving productivity and reducing manufacturing costs. In addition, since the pellets can be positioned by fitting them into the recesses of the disk, there is no need to accurately position the pellets before mounting the pellets, and there is no need to worry about the pellets being misaligned during the pellet mounting process. Wire bonding, etc. can be performed accurately and yields can be improved.
第1図及び第2図は従来の製造方法で製造した
半導体装置の一部断面平面図及びA―A線に沿う
断面図、第3図及び第4図は本発明で使用するデ
イスクの一例を示す平面図及びB―B線に沿う断
面図、第5図は本発明によるペレツトマウント工
程を説明するためのデイスクとリードフレームの
各段階での要部拡大断面図、第6図は第5図のイ
の段階における半田供給例を説明するデイスクの
断面図、第7図は第5図のロの段階におけるペレ
ツト供給時のデイスク一部拡大断面図、第8図乃
至第10図は第5図のペレツトマウント工程後の
ワイヤボンデイング工程及び樹脂モールド工程及
び切断分離工程における各平面図である。
1……リードフレーム、2,2……リード、
3,3……被ペレツトマウント基板(放熱板な
ど)、6,6……半導体ペレツト、9……デイス
ク、10,10……凹部。
1 and 2 are a partially sectional plan view and a sectional view taken along line A-A of a semiconductor device manufactured by a conventional manufacturing method, and FIGS. 3 and 4 are an example of a disk used in the present invention. FIG. 5 is an enlarged sectional view of the main parts of the disk and lead frame at each stage to explain the pellet mounting process according to the present invention, and FIG. FIG. 7 is a partially enlarged cross-sectional view of the disk during pellet supply in step B of FIG. 5, and FIGS. FIG. 6 is a plan view of a wire bonding process, a resin molding process, and a cutting separation process after the pellet mounting process shown in the figure. 1... Lead frame, 2, 2... Lead,
3, 3... Pellet mounting substrate (heat sink, etc.), 6, 6... Semiconductor pellet, 9... Disk, 10, 10... Recessed portion.
Claims (1)
多連形成したリードフレームの被ペレツトマウン
ト箇所と対応する複数の箇所に凹部を形成した帯
板状デイスクを用いて、各凹部に半導体ペレツト
を一括挿入して半田付けする工程、及びリードフ
レームの各被ペレツトマウント基板上に前記デイ
スクの対応する各凹部裏面を一括して固着する工
程を含むペレツトマウント工程を有することを特
徴とする半導体装置の製造方法。1. Semiconductor pellets are inserted all at once into each recess using a strip-shaped disk with recesses formed at multiple locations corresponding to the pellet mounting locations of a lead frame on which multiple leads and pellet mounting substrates are formed. and a step of collectively fixing the back surfaces of the corresponding recesses of the disk onto each of the pellet-mounted substrates of the lead frame. Production method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56130476A JPS5831543A (en) | 1981-08-19 | 1981-08-19 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56130476A JPS5831543A (en) | 1981-08-19 | 1981-08-19 | Manufacture of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5831543A JPS5831543A (en) | 1983-02-24 |
JPH0122981B2 true JPH0122981B2 (en) | 1989-04-28 |
Family
ID=15035155
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56130476A Granted JPS5831543A (en) | 1981-08-19 | 1981-08-19 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5831543A (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6184027A (en) * | 1984-10-01 | 1986-04-28 | Mitsubishi Electric Corp | Method for assembling semiconductor device |
JPH0514200Y2 (en) * | 1986-11-18 | 1993-04-15 | ||
JPS63159740A (en) * | 1986-12-23 | 1988-07-02 | Kawasaki Steel Corp | Heat constant measuring instrument by laser flash method |
JPS6413723U (en) * | 1987-07-15 | 1989-01-24 | ||
JPH01161141A (en) * | 1987-12-16 | 1989-06-23 | Sanki Eng Kk | Heat constant measuring instrument |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS567445A (en) * | 1979-06-28 | 1981-01-26 | Mitsubishi Electric Corp | Bonding head |
-
1981
- 1981-08-19 JP JP56130476A patent/JPS5831543A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS567445A (en) * | 1979-06-28 | 1981-01-26 | Mitsubishi Electric Corp | Bonding head |
Also Published As
Publication number | Publication date |
---|---|
JPS5831543A (en) | 1983-02-24 |
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