JPS62112333A - Manufacture of minimold type semiconductor element - Google Patents

Manufacture of minimold type semiconductor element

Info

Publication number
JPS62112333A
JPS62112333A JP25224885A JP25224885A JPS62112333A JP S62112333 A JPS62112333 A JP S62112333A JP 25224885 A JP25224885 A JP 25224885A JP 25224885 A JP25224885 A JP 25224885A JP S62112333 A JPS62112333 A JP S62112333A
Authority
JP
Japan
Prior art keywords
resin
mold
substrates
substrate
resins
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP25224885A
Other languages
Japanese (ja)
Other versions
JPH0793338B2 (en
Inventor
Shunichi Ishikawa
俊一 石川
Isato Oba
勇人 大場
Toshiya Ogawa
俊也 小川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Stanley Electric Co Ltd
Original Assignee
Stanley Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stanley Electric Co Ltd filed Critical Stanley Electric Co Ltd
Priority to JP60252248A priority Critical patent/JPH0793338B2/en
Publication of JPS62112333A publication Critical patent/JPS62112333A/en
Publication of JPH0793338B2 publication Critical patent/JPH0793338B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Abstract

PURPOSE:To produce homogeneous products with excellent yield by a method wherein semiconductor chips per column are molded to form the sections into mesa type; adhesive tapes are bonded on mold resins and substrates; the substrates and mold resin parts are simultaneously cut off by a dicer. CONSTITUTION:To manufacture a minimold type LED, multiple LED chips 13 are diebonded on a substrate 12 whereon through holes 11 are made in specified arrayal state in addition to metallic wire bonding process. Next, the chips 13 are sealed by transfer molding process to form resins 14 on the substrates 12 so that the section per column of resin 14 may be formed into mesa type. Successively adhesive sheet are bonded on the mold resins 14 and the substrates 12 for the substrates and resins to be cut off simultaneously by a dicer. Through these procedures, the metallic mold for resin molding process is provided with continuous mold type excavation and only one resin leading-in gate to improve the fluidity of resin.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、セラミック基板にチップをボンディングし、
樹脂モールドした後、ダイサーで切断して発光ダイオー
ド(L IE D )などの半導体素子とするミニモー
ルド型半導体素子の製造方法に関゛す”るものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to bonding a chip to a ceramic substrate,
This invention relates to a method of manufacturing a mini-mold type semiconductor element, which is molded with a resin and then cut with a dicer to produce a semiconductor element such as a light emitting diode (LIED).

1従来技術] 例えば、LEDを製造する場合、第4図に示すように短
冊状に成形したセラミック基板(ボンディング基板)八
にL E Dチップをボンディングし、ボッティング成
型法により樹脂Bで封止した後、基板Aを裁断して個々
の製品とすることがある。
1 Prior Art] For example, when manufacturing LEDs, as shown in Fig. 4, an LED chip is bonded to a ceramic substrate (bonding substrate) formed into a rectangular shape, and then sealed with resin B using a botting molding method. After that, the substrate A may be cut into individual products.

しかし、このようにして製造したのでは、基板Aのスル
ーホールに形成された電極部Cに成型樹脂が付着し易く
、歩留りが悪くなる。それは、ボンディング済みの基板
Aを金型に装着する前に、予め樹脂を金型に入れておか
なければならないため、成型工程中に電極部Cに成を樹
脂が入り込み易いからである。
However, when manufactured in this manner, the molded resin tends to adhere to the electrode portions C formed in the through holes of the substrate A, resulting in poor yield. This is because resin must be placed in the mold before the bonded substrate A is mounted in the mold, and the resin easily enters the electrode portion C during the molding process.

また、セラミック基板△をけットする際には、特殊な寸
法、材質の歯を持ったダイシングソーが必要な上、カッ
チiングが困難であり、量産性に乏しいといった問題が
ある。
Furthermore, when cutting the ceramic substrate Δ, a dicing saw with teeth of special dimensions and material is required, and cutting is difficult, resulting in poor mass productivity.

更に、1〜ランスフアーモールドで金型にピラミック基
板を圧力を加えて装着すると、基板に1や1れが生じる
おそれがある。
Furthermore, if the pyramidal substrate is attached to the mold by applying pressure in the 1 to 1-lance firm mold, there is a possibility that 1 or 1 scratches may occur on the substrate.

なお、製品としてLEDを例示したが、他のICの場合
でも同様である。また、短冊状ではない広い面の正方形
または長方形の場合には、いずれも必要とする回路部毎
、またはチップ都電に樹脂が部分的にボッティングされ
ることになる。
Note that although an LED is exemplified as a product, the same applies to other ICs. Furthermore, in the case of a square or rectangular shape with a wide surface rather than a strip shape, the resin will be partially potted for each required circuit section or for the chip Toden.

[発明の目的] 本発明の目的は、恒産性にすぐれたミニモールド型半導
体素子の製造方法を提供することにある。
[Object of the Invention] An object of the present invention is to provide a method for manufacturing a mini-mold type semiconductor element with excellent productivity.

[発明の概要] 本発明は、多数のスルーホールを所定の配列状態で形成
した基板にLEDチップなど多数の半導体チップをボン
ディングし、これらを樹脂で被覆するに際して、一列毎
に断面が台形状になるように樹脂でモールドし、その後
、モールド樹脂及び基板に粘着シートを貼り、ダイサー
により基板部とモールド樹脂部を同時に切断して個々の
製品とすることを特徴とするものである。
[Summary of the Invention] The present invention provides bonding of a large number of semiconductor chips such as LED chips to a substrate in which a large number of through holes are formed in a predetermined arrangement, and when covering these with resin, the cross section of each row becomes trapezoidal. This method is characterized by molding with resin so that the mold resin and the substrate have the following properties, and then applying an adhesive sheet to the mold resin and the substrate, and cutting the substrate portion and the mold resin portion at the same time using a dicer to obtain individual products.

[実施例] 第1図及び第2図は本発明の一実施例を示すもので、ミ
ニモールド型LEI)の場合である。即ち、電極部とな
るスルーホール11を所定の配列状態に形成した基板1
2に多数のL E Dチッ7′13をグイボンディング
するとともに、金線ワイヤボンディングを行う。
[Example] Figures 1 and 2 show an example of the present invention, which is a case of a mini-mold type LEI. That is, a substrate 1 in which through-holes 11 serving as electrode portions are formed in a predetermined arrangement state.
A large number of LED chips 7'13 are bonded to 2 and gold wire wire bonding is performed.

次に、トランスファーモー・ルドによりLEDチップ1
3を封止する。この場合、トランスファー金型はボンデ
ィング「板上を直線的に樹脂が流れる掘り込みを有する
形状でよい。このモールドにJ:り樹脂14が基板12
上に一列毎に断面が台形状となるように形成される。
Next, LED chip 1 is molded using a transfer mold.
Seal 3. In this case, the transfer mold may have a shape having a groove in which the resin flows linearly over the bonding plate.
Each row on the top is formed so that its cross section is trapezoidal.

続いて、最終製品形状となるようにモールド樹脂14及
び基板12に粘着シート(図示せず)を貼り、ダイサ−
−(同一のグイシングツ−)によって基板部と樹脂部を
同時に切断する。この切断はカットラインj!  、f
J2に沿って行われる。この後、出荷検査を行い、テー
ピング出荷する。
Next, an adhesive sheet (not shown) is applied to the mold resin 14 and the substrate 12 so as to form the final product shape, and a dicer is used.
- Cut the substrate part and the resin part at the same time using the same cutting tool. This cut is the cut line j! , f
It is carried out along J2. After this, a shipping inspection is performed and the product is taped and shipped.

この結果、樹脂し一ルドの際に用いる金型は、連続した
モールド形状をなす掘り込みを有し、かつ樹脂流入のゲ
ートを1個とするものでよく、従来のようにチップf5
にゲー]・を設ける必要がなくなり、樹脂の流動性が良
好となって、均質で歩留りのよい製品が得られる。即ち
、微小な成形部に発生し勝ちなモールド樹脂材料の流れ
込み不足や気泡の発生がなくなり、樹脂材料の型内の流
動性が良好となる。
As a result, the mold used for molding the resin only needs to have a recess that forms a continuous mold shape and only one gate for resin inflow, unlike the conventional chip f5.
It is no longer necessary to provide a gate, the resin has good fluidity, and a homogeneous product with a high yield can be obtained. That is, the insufficient flow of the mold resin material and the generation of air bubbles, which tend to occur in minute molded parts, are eliminated, and the fluidity of the resin material within the mold is improved.

なお、上記実施例はり、 E Dの1チツプの場合であ
るが、第3図に示す2チツプの場合も同様である。また
、一定の機能を有する回路を、半導体チップその他の微
小部品を搭載したハイブリッドICのプリント基板上に
回路ブロックを密集した状態でモールドし、カットして
得る際にも適用できる。
Although the above embodiment deals with one ED chip, the same applies to the two-chip case shown in FIG. It can also be applied to obtain a circuit having a certain function by molding circuit blocks densely on a printed circuit board of a hybrid IC on which semiconductor chips and other microcomponents are mounted, and then cutting the circuit blocks.

[効 果] (1)ボンディング基板(スルーホール基板)上にLE
Dチップを統一された間隔でボンディングすることによ
り、作業が容易となり、量産性が向上する。
[Effects] (1) LE on bonding board (through-hole board)
By bonding the D chips at uniform intervals, the work becomes easier and mass productivity is improved.

(2)簡単なモールド法及び金型fS造により多数個の
製品を一時に製造することが可能である。
(2) It is possible to manufacture many products at once using a simple molding method and mold fS construction.

(3)1枚の基板より多数の製品を作ることができ、材
料の有効利用が図れて恒産性、ロス1−パフォーマンス
の向上に寄与できる。
(3) A large number of products can be manufactured from one substrate, and materials can be used effectively, contributing to improved productivity and loss-1 performance.

(4)ダイサーによるカット後の出荷検査は、製品がバ
ラバラにならないようにシートに貼ったままで点灯、電
圧特性のチェックが可能である。
(4) During shipping inspection after cutting with a dicer, it is possible to turn on the product while it is attached to the sheet and check the voltage characteristics to prevent the product from falling apart.

(5)既存のテーピング規格を利用して出荷が可能であ
る。
(5) Shipping is possible using existing taping standards.

(6)プリン1−配線板(ガラス入り等)にボンディン
グしているため、高温下でも高信頼性の製品が得られる
(6) Pudding 1 - Because it is bonded to a wiring board (glass-containing, etc.), a highly reliable product can be obtained even under high temperatures.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明方法の一実施例を示す斜視図、第2図及
び第3図は最終製品形状を示す斜視図、第4図は従来の
方法を説明するための斜視図ぐある。 11・・・スルーホール   12・・・基 板13・
・・LEDチップ   14・・・七−ルド樹脂15・
・・金線(導電線) 手続補正層 昭和61年11月、4−日
FIG. 1 is a perspective view showing an embodiment of the method of the present invention, FIGS. 2 and 3 are perspective views showing the final product shape, and FIG. 4 is a perspective view for explaining the conventional method. 11... Through hole 12... Board 13.
・・LED chip 14・7-old resin 15・
...Gold wire (conductive wire) Procedural correction layer November 1988, 4-day

Claims (1)

【特許請求の範囲】[Claims] 多数のスルーホールを所定の配列状態で形成した基板に
LEDチップなど多数の半導体チップをボンディングし
、これらを樹脂で被覆するに際して、一列毎に断面が台
形状になるように樹脂でモールドし、その後、モールド
樹脂及び基板に粘着シートを貼り、ダイサーにより基板
部とモールド樹脂部を同時に切断して個々の製品とする
ことを特徴とするミニモールド型半導体素子の製造方法
A large number of semiconductor chips such as LED chips are bonded to a substrate on which a large number of through holes are formed in a predetermined arrangement, and when covering them with resin, each row is molded with resin so that the cross section becomes trapezoidal. A method for manufacturing a mini-mold type semiconductor device, which comprises applying an adhesive sheet to a mold resin and a substrate, and simultaneously cutting the substrate portion and the mold resin portion using a dicer to obtain individual products.
JP60252248A 1985-11-11 1985-11-11 Manufacturing method of mini-mold type LED Expired - Lifetime JPH0793338B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60252248A JPH0793338B2 (en) 1985-11-11 1985-11-11 Manufacturing method of mini-mold type LED

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60252248A JPH0793338B2 (en) 1985-11-11 1985-11-11 Manufacturing method of mini-mold type LED

Publications (2)

Publication Number Publication Date
JPS62112333A true JPS62112333A (en) 1987-05-23
JPH0793338B2 JPH0793338B2 (en) 1995-10-09

Family

ID=17234575

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60252248A Expired - Lifetime JPH0793338B2 (en) 1985-11-11 1985-11-11 Manufacturing method of mini-mold type LED

Country Status (1)

Country Link
JP (1) JPH0793338B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5977613A (en) * 1996-03-07 1999-11-02 Matsushita Electronics Corporation Electronic component, method for making the same, and lead frame and mold assembly for use therein
US7098081B2 (en) 2001-09-27 2006-08-29 Hamamatsu Photonics K.K. Semiconductor device and method of manufacturing the device
KR100646630B1 (en) 2004-10-08 2006-11-23 서울반도체 주식회사 Manufacturing process of Printed circuit board for Light Emitting Diode and Printed circuit board for Light Emitting Diode
JP2011082576A (en) * 2011-01-24 2011-04-21 Renesas Electronics Corp Method of manufacturing semiconductor device
USRE45931E1 (en) 1999-11-29 2016-03-15 Renesas Electronics Corporation Method of manufacturing a semiconductor device

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4565723B2 (en) * 2000-09-26 2010-10-20 ローム株式会社 Semiconductor light emitting device
JP2008153698A (en) * 2008-03-07 2008-07-03 Matsushita Electric Ind Co Ltd Surface-mounting photoelectric conversion device
JP7194518B2 (en) * 2018-05-31 2022-12-22 浜松ホトニクス株式会社 Electronic component, method for manufacturing electronic component, electronic device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5572054A (en) * 1978-11-27 1980-05-30 Nec Corp Preparation of semiconductor device
JPS58201347A (en) * 1982-05-20 1983-11-24 Unie Kurisutaru Kk Leadless chip parts and preparation thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5572054A (en) * 1978-11-27 1980-05-30 Nec Corp Preparation of semiconductor device
JPS58201347A (en) * 1982-05-20 1983-11-24 Unie Kurisutaru Kk Leadless chip parts and preparation thereof

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5977613A (en) * 1996-03-07 1999-11-02 Matsushita Electronics Corporation Electronic component, method for making the same, and lead frame and mold assembly for use therein
US6187614B1 (en) 1996-03-07 2001-02-13 Matsushita Electronics Corporation Electronic component, method for making the same, and lead frame and mold assembly for use therein
EP0794572A3 (en) * 1996-03-07 2003-09-03 Matsushita Electric Industrial Co., Ltd. Electronic component, method for making the same, and lead frame and mold assembly for use therein
USRE45931E1 (en) 1999-11-29 2016-03-15 Renesas Electronics Corporation Method of manufacturing a semiconductor device
US7098081B2 (en) 2001-09-27 2006-08-29 Hamamatsu Photonics K.K. Semiconductor device and method of manufacturing the device
KR100646630B1 (en) 2004-10-08 2006-11-23 서울반도체 주식회사 Manufacturing process of Printed circuit board for Light Emitting Diode and Printed circuit board for Light Emitting Diode
JP2011082576A (en) * 2011-01-24 2011-04-21 Renesas Electronics Corp Method of manufacturing semiconductor device

Also Published As

Publication number Publication date
JPH0793338B2 (en) 1995-10-09

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