JPH0122940B2 - - Google Patents

Info

Publication number
JPH0122940B2
JPH0122940B2 JP57109513A JP10951382A JPH0122940B2 JP H0122940 B2 JPH0122940 B2 JP H0122940B2 JP 57109513 A JP57109513 A JP 57109513A JP 10951382 A JP10951382 A JP 10951382A JP H0122940 B2 JPH0122940 B2 JP H0122940B2
Authority
JP
Japan
Prior art keywords
address
input
output
memory
data transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57109513A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58225422A (ja
Inventor
Kazutoshi Eguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP57109513A priority Critical patent/JPS58225422A/ja
Priority to US06/505,817 priority patent/US4646230A/en
Publication of JPS58225422A publication Critical patent/JPS58225422A/ja
Publication of JPH0122940B2 publication Critical patent/JPH0122940B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0692—Multiconfiguration, e.g. local and global addressing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP57109513A 1982-06-25 1982-06-25 デ−タ制御装置 Granted JPS58225422A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP57109513A JPS58225422A (ja) 1982-06-25 1982-06-25 デ−タ制御装置
US06/505,817 US4646230A (en) 1982-06-25 1983-06-20 Data transfer control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57109513A JPS58225422A (ja) 1982-06-25 1982-06-25 デ−タ制御装置

Publications (2)

Publication Number Publication Date
JPS58225422A JPS58225422A (ja) 1983-12-27
JPH0122940B2 true JPH0122940B2 (OSRAM) 1989-04-28

Family

ID=14512164

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57109513A Granted JPS58225422A (ja) 1982-06-25 1982-06-25 デ−タ制御装置

Country Status (2)

Country Link
US (1) US4646230A (OSRAM)
JP (1) JPS58225422A (OSRAM)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5566313A (en) * 1987-09-19 1996-10-15 Hudson Soft Co., Ltd. Apparatus for controlling the transfer of data
US5226140A (en) * 1987-09-19 1993-07-06 Hudson Soft Co., Ltd. Apparatus for controlling the transfer of data
JP2612715B2 (ja) * 1987-10-16 1997-05-21 株式会社日立製作所 アドレスバス制御装置
US5159686A (en) * 1988-02-29 1992-10-27 Convex Computer Corporation Multi-processor computer system having process-independent communication register addressing
US5050070A (en) * 1988-02-29 1991-09-17 Convex Computer Corporation Multi-processor computer system having self-allocating processors
JP2907451B2 (ja) * 1989-08-31 1999-06-21 キヤノン株式会社 ダイレクトメモリアクセス方法および装置
JP2829091B2 (ja) * 1990-04-19 1998-11-25 株式会社東芝 データ処理システム
JPH04163655A (ja) * 1990-10-26 1992-06-09 Mitsubishi Electric Corp 入出力装置
US5367639A (en) * 1991-12-30 1994-11-22 Sun Microsystems, Inc. Method and apparatus for dynamic chaining of DMA operations without incurring race conditions
US5377337A (en) * 1993-06-08 1994-12-27 International Business Machines Corporation Method and means for enabling virtual addressing control by software users over a hardware page transfer control entity
JPH07104996A (ja) * 1993-10-05 1995-04-21 Kofu Nippon Denki Kk マイクロプログラム制御装置
US7636857B2 (en) * 2004-05-24 2009-12-22 Interdigital Technology Corporation Data-mover controller with plural registers for supporting ciphering operations
US7805589B2 (en) * 2006-08-31 2010-09-28 Qualcomm Incorporated Relative address generation
CN101803206B (zh) * 2008-08-15 2013-09-04 Lsi公司 近码字的rom列表解码

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5096148A (OSRAM) * 1973-12-24 1975-07-31
JPS52137223A (en) * 1976-05-12 1977-11-16 Hitachi Ltd Address expansion system of channel
US4092715A (en) * 1976-09-22 1978-05-30 Honeywell Information Systems Inc. Input-output unit having extended addressing capability
JPS5358731A (en) * 1976-11-08 1978-05-26 Mitsubishi Electric Corp Memory address extension method
US4133030A (en) * 1977-01-19 1979-01-02 Honeywell Information Systems Inc. Control system providing for the transfer of data in a communications processing system employing channel dedicated control blocks
US4156932A (en) * 1977-07-05 1979-05-29 Honeywell Information Systems Inc. Programmable communications controller
US4155119A (en) * 1977-09-21 1979-05-15 Sperry Rand Corporation Method for providing virtual addressing for externally specified addressed input/output operations
JPS55157027A (en) * 1979-05-25 1980-12-06 Matsushita Electric Ind Co Ltd Input and output transfer control unit

Also Published As

Publication number Publication date
US4646230A (en) 1987-02-24
JPS58225422A (ja) 1983-12-27

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